NCV4254CPDAJR2G [ONSEMI]
Low Dropout Voltage Tracking Regulator;
| 型号： | NCV4254CPDAJR2G |
| 厂家： | 
ONSEMI |
| 描述： | Low Dropout Voltage Tracking Regulator |
| 文件： | 总14页 (文件大小：192K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV4254C
Low Dropout Voltage
Tracking Regulator
The NCV4254C is a monolithic integrated low dropout tracking
voltage regulator designed to provide an adjustable buffered output
voltage that closely tracks the reference input voltage. The output
delivers up to 70 mA while being able to be configured higher, lower
or equal to the reference voltages.
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The part can be used in automotive applications with remote sensors
or any situation where it is necessary to isolate the output of the other
regulator. The NCV4254C also enables the user to bestow a quick
upgrade to their module when added current is needed and the existing
regulator cannot provide.
MARKING
DIAGRAMS
8
SOIC8
D SUFFIX
CASE 751
4254Cx
ALYWW
G
8
Features
1
1
• Up to 70 mA Source Capability
• Low Output Tracking Tolerance
• Low Dropout (typ. 220 mV @ 70 mA)
• Low Disable Current in Stand−by Mode
• Wide Input Voltage Operating Range
8
SOIC8 EP
PD SUFFIX
CASE 751AC
4254Cx
ALYWW
G
8
1
1
• Protection Features:
x
= A for Adjust version
= S for Status version
= Assembly Location
= Wafer Lot
♦ Current Limitation
♦ Thermal Shutdown
♦ Reverse Input Voltage and Reverse Bias Voltage
A
L
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Grade 1 Qualified and PPAP Capable
Y
= Year
= Work Week
= Pb−Free Device
WW
G
(Note: Microdot may be in either location)
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
PIN CONNECTIONS
Typical Applications
• Off the module loads (e.g. sensors power supply)
V
V
IN
OUT
GND
GND
GND
GND
ADJ or ST
V
EN/REF
SOIC−8 (Top View)
V
OUT
V
IN
NC
NC
NC
GND
ADJ or ST
V
EN/REF
SOIC−8 EP (Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
November, 2018 − Rev. 0
NCV4254C/D
NCV4254C
Vin
Vout
VEN/REF
CURRENT LIMIT
SATURATION PROTECTION
THERMAL
SHUTDOWN
BIAS
ADJ
−
+
GND
EN/REF
Figure 1. Block Diagram for Adjust Version NCV4254C
Vin
Vout
VEN/REF
STATUS
GENERATOR
CURRENT LIMIT
SATURATION PROTECTION
THERMAL
SHUTDOWN
BIAS
ST
−
+
GND
EN/REF
Figure 2. Block Diagram for Status Output for NCV4254C
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2
NCV4254C
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
Pin No.
Pin
SOIC−8
SOIC−8 EP
Name
Description
1
1
V
out
Tracker Output Voltage. Connect 2.2 µF capacitor with ESR < 5 W to ground be connected
directly or by a voltage divider for lower output voltages.
2, 3, 6, 7
6
2, 3, 7
4
GND
NC
Power Supply Ground.
−
Not Connected. Connect to GND
4
ADJ
Voltage Adjust Input. The adjust input can be connected directly to output pin for Vout = VEN/REF
or by a voltage divider for higher/lower output voltages. The adjust pin can be also connected to
ground in case of using this device as a High−Side Driver.
4
5
4
5
ST
Tracking Regulator Status Output. Open collector output. Connect via a pull−up resistor to a
positive voltage rail.
A low signal indicates fault conditions at the regulator’s output.
EN/REF
Enable / Reference.
Connect the reference to this pin. A low signal disables the IC; a high signal switches it on.
The reference voltage can be connected directly or by a voltage divider for lower output voltages.
8
8
V
in
Positive Power Supply Input. Connect 0.1 µF capacitor to ground.
−
PAD
PAD
Exposed Pad. Connect to GND
Table 2. MAXIMUM RATINGS
Rating
Symbol
Min
Max
45
Unit
V
Input Voltage DC (Note 1)
DC
V
−20
in
in
Peak Transient Voltage (Load Dump) (Note 2)
Output Voltage
V
45
V
V
out
−5
40
V
Enable / Reference Input Voltage
Adjust Voltage (Adjust Version)
Status output Voltage (Status Output Version)
Maximum Junction Temperature
Storage Temperature
DC
DC
DC
V
/
−20
−20
−0.3
−40
−55
40
V
EN REF
V
40
V
ADJ
V
7
V
ST
T
150
150
°C
°C
J(max)
T
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in
production. Passed Class B according to ISO16750−1.
Table 3. ESD CAPABILITY (Note 3)
Rating
Symbol
ESD
Min
Max
Unit
ESD Capability, Human Body Model
−4
4
kV
HBM
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
2
Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes <50 mm due
to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform
characteristic defined in JEDEC JS−002−2014
Table 4. LEAD SOLDERING TEMPERATURE AND MSL (Note 4)
Rating
Symbol
Min
Max
Unit
Moisture Sensitivity Level
SOIC−8
SOIC−8 EP
MSL
1
2
−
4. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
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3
NCV4254C
Table 5. THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
°C/W
Thermal Characteristics, SOIC−8
R
115
11.5
Thermal Resistance, Junction−to−Ambient (Note 5)
Thermal Reference, Junction−to−Case Top (Note 5)
q
JA
R
Y
JT
°C/W
Thermal Characteristics, SOIC−8 EP
R
75
11.5
Thermal Resistance, Junction−to−Ambient (Note 5)
Thermal Reference, Junction−to−Case Top (Note 5)
q
JA
R
Y
JT
2
2
5. Values based on copper area of 645 mm (or 1 in ) of 1 oz copper thickness and FR4 PCB substrate.
Table 6. RECOMMENDED OPERATING RANGES
Rating
Symbol
Min
4
Max
45
Unit
V
Input Voltage
V
in
EN/REF
Enable / Reference Input Voltage
Junction Temperature
V
2
−
V
T
J
−40
150
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 7. ELECTRICAL CHARACTERISTICS V = 13.5 V, V
>= 2.5 V, C = 0.1 µF, C = 2.2 µF, for typical values T =
in out J
in
EN/REF
25°C, for min/max values T = −40°C to 150°C; unless otherwise noted. (Note 6)
J
Parameter
REGULATOR OUTPUT
Test Conditions
Symbol
Min
Typ
Max
Unit
Output Voltage Tracking Accuracy
Output Voltage Tracking Accuracy
Output Voltage Tracking Accuracy
Line Regulation
V
= 5.7 V to 26 V, I = 0.1 mA to 60 mA DV
out
−3
−10
−10
−5
−
−
−
−
3
10
10
5
mV
mV
mV
mV
in
out
2.5 V ≤ V
≤ (V − 600 mV)
IN
EN/REF
V
V
= 5.5 V to 26 V, I = 0.1 mA to 60 mA DV
out
in
out
out
= 5 V
EN/REF
V
V
= 5.5 V to 32 V, I = 0.1 mA to 30 mA DV
out
in
= 5 V
EN/REF
V
= 5.5 V to 32 V, I = 5 mA, V
=
Reg
line
in
out
EN/REF
5 V
Load Regulation
I
I
= 0.1 mA to 70 mA, V
= 5 V
Reg
−5
−
5
mV
mV
out
out
EN/REF
load
Dropout Voltage (Note 7)
= 70 mA, V
= 5 V
V
DO
−
220
400
EN/REF
DISABLE AND QUIESCENT CURRENTS
Disable Current, Stand−by Mode
V
≤ 0.4 V, T ≤ 125°C
I
−
0.01
5
mA
EN/REF
J
DIS
Quiescent Current, I = I − I
I
I
≤ 0.1 mA, V
= 5 V
= 5 V
I
q
−
−
65
1
80
2
mA
mA
q
in
out
out
EN/REF
≤ 70 mA, V
out
EN/REF
CURRENT LIMIT PROTECTION
Current Limit
V
out
= (V
– 0.1 V), V
= 5 V
I
71
110
150
mA
EN/REF
EN/REF
LIM
REVERSE CURRENT PROTECTION
Reverse Current
V
V
= 0 V, V = 32 V, V
= 5 V
I
out_rev
−15
−1
−10
−
−
mA
mA
in
out
EN/REF
Reverse Current at Negative Input Voltage
PSRR
= −16 V, V = 0 V, V
= 5 V
I
in_rev
−0.2
in
out
EN/REF
Power Supply Ripple Rejection (Note 8)
ENABLE / REFERENCE
f = 100 Hz, 1 V
PSRR
−
60
−
dB
V
p−p
Enable / Reference Input Threshold Voltage
V
th(EN/R
EF)
Logic Low
Logic High
V
out
= 0 V, I ≤ 5 mA, Tj ≤ 125°C
−
2
−
−
0.4
−
out
|V − V
| < 10 mV
out
EN/REF
6. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T ≈ T . Low duty
A
J
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
7. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.5 V.
8. Values based on design and/or characterization.
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4
NCV4254C
Table 7. ELECTRICAL CHARACTERISTICS V = 13.5 V, V
>= 2.5 V, C = 0.1 µF, C = 2.2 µF, for typical values T =
in out J
in
EN/REF
25°C, for min/max values T = −40°C to 150°C; unless otherwise noted. (Note 6)
J
Parameter
ENABLE / REFERENCE
Test Conditions
Symbol
Min
Typ
Max
Unit
Enable / Reference Input Current
V
V
= 5 V
I
I
−
−
2
3
mA
EN/REF
EN/REF
Enable / Reference Input Current if Input tied
to GND
= 0 V, V
= 5 V
0.003
0.6
mA
in
EN/REF
EN/REF
Enable / Reference Internal Pull−Down Resis-
R
1.7
2.2
3.3
MW
mA
EN/REF
tor
ADJUST (only Adjust Version)
Adjust Input Biasing Current
V
ADJ
= 5 V
I
−
0.03
0.5
ADJ
STATUS OUTPUT (only Status Version)
Status Switching Threshold, Undervoltage
V
decreasing
increasing
V
V
V
V
V
V
mV
mV
out
out_UV
EN/REF
−120
EN/REF
−77
EN/REF
−50
Status Switching Threshold, Overvoltage
V
out
V
V
EN/REF EN/REF
out_OV
EN/REF
+50
+77
+120
Status reaction Time
t
10
−
23
−
33
0.4
−
ms
V
ST
Status Output Low Voltage
I
= 1 mA, V ≥ 4 V
V
ST_low
ST
in
Status Output Sink Current Limitation
Status Output Leakage Current
THERMAL SHUTDOWN
V
= 0.8 V
I
1
−
mA
mA
ST
ST_max
V
= V , V = 5 V
EN/REF ST
I
ST_leak
−
−
2
out
Thermal Shutdown Temperature (Note 8)
T
SD
151
175
200
°C
6. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T ≈ T . Low duty
A
J
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
7. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.5 V.
8. Values based on design and/or characterization.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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5
NCV4254C
TYPICAL CHARACTERISTICS
3
2
100
Unstable Region
V
V
= 13.5 V
= 5 V
in
REF
10
1
1
I
= 0.1 mA
= 70 mA
out
0
Stable Region
I
out
−1
C
= 2.2 mF
= 13.5 V
= 5 V
out
0.1
V
V
in
−2
−3
REF
T = 25°C
J
0.01
−40 −20
0
20
40
60
80 100 120 140
0
0
0
10
20
, OUTPUT CURRENT (mA)
out
30
40
50
60
70
T , JUNCTION TEMPERATURE (°C)
J
I
Figure 3. Tracking Accuracy DVout vs.
Figure 4. Output Capacitor Series Resistor
ESR vs. Output Current Iout
Junction Temperature Tj
6
5
4
3
2
6
5
4
V
= 13.5 V
V
= 5 V
in
REF
T = 25°C
J
I
= 70 mA
out
3
2
T = −40°C
J
1
0
1
0
T = 25°C
J
T = 150°C
J
0
1
2
3
4
5
6
1
2
3
4
5
6
7
8
V
, REFERENCE VOLTAGE (V)
V , INPUT VOLTAGE (V)
in
REF
Figure 5. Output Voltage Vout vs. Reference
Voltage VEN/REF
Figure 6. Output Voltage Vout vs. Input Voltage
Vin
T = 150°C
160
140
120
100
80
160
140
120
100
80
J
V
= 2 V
V
= 5 V
T = 150°C
J
EN/REF
EN/REF
T = 25°C
T = 25°C
J
J
T = −40°C
J
T = −40°C
J
60
60
40
40
20
0
20
0
0
5
10
15
20
25
30
35
40
5
10
15
20
25
30
35
40
V , INPUT VOLTAGE (V)
in
V , INPUT VOLTAGE (V)
in
Figure 7. Output Current Limitation Iout_max vs.
Input Voltage Vin, VREF = 5 V
Figure 8. Output Current Limitation Iout_max vs.
Input Voltage Vin, VREF = 2 V
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NCV4254C
TYPICAL CHARACTERISTICS
350
300
350
T = 150°C
J
300
250
200
150
100
I
= 70 mA
out
250
T = 25°C
J
200
150
100
T = −40°C
J
V
= 5 V
70
V
= 5 V
50
0
50
0
REF
REF
0
10
20
30
40
50
60
80
−40 −20
0
20
40
60
80 100 120 140
I
, OUTPUT CURRENT (mA)
T , JUNCTION TEMPERATURE (°C)
J
out
Figure 9. Dropout Voltage VDR vs. Output
Current Iout
Figure 10. Dropout Voltage VDR vs. Junction
Temperature Tj
0
0
−2
−0.1
T = −40°C
J
−4
−0.2
−0.3
−0.4
T = 150°C
J
T = −40°C
J
−6
−8
T = 150°C
J
−10
V
V
= 13.5 V
in
−0.5
−0.6
V
= 5 V
REF
−12
−14
= 5 V
REF
−32 −28 −24
−20 −16 −12
V , INPUT VOLTAGE (V)
−8
−4
0
0
4
8
12
, OUTPUT VOLTAGE (V)
out
16
20
24
28
32
V
in
Figure 11. Reverse Current Iin vs. Input
Voltage Vin
Figure 12. Reverse Current Iin vs. Output
Voltage Vout
1.4
1.2
1.0
0.8
0.6
0.4
90
80
70
60
50
40
30
20
V
= 13.5 V
= 5 V
in
T = 150°C
J
V
REF
T = −40°C
J
T = 25°C
out
J
I
= 1 mA
0.2
0
10
0
V
REF
= 5 V
0
10
20
30
40
50
60
70
5
10
15
20
25
30
35
40
I
, OUTPUT CURRENT (mA)
V , INPUT VOLTAGE (V)
in
out
Figure 13. Quiescent Current Iq vs. Output
Current Iout
Figure 14. Quiescent Current Iq vs. Input
Voltage Vin
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NCV4254C
TYPICAL CHARACTERISTICS
3.0
2.5
2.0
1.5
1.0
60
V
= 5 V
REF
50
40
30
20
T = 150°C
J
V
V
= 13.5 V
in
10
0
0.5
0
= 5 V
REF
−40 −20
0
20
40
60
80 100 120 140
0
5
10
15
20
25
30
35
40
45
T , JUNCTION TEMPERATURE (°C)
J
V , INPUT VOLTAGE (V)
in
Figure 15. Enable / Reference Input Current
Figure 16. Enable / Reference Input Current
EN/REF vs. Input Voltage Vin
IEN/REF vs. Junction Temperature Tj
I
35
30
25
20
T = 25°C
in
J
70 mA
V = 13.5 V
C
= 2.2 mF
out
t
= 1 ms (I
)
rise/fall
out
0.1 mA
5.113 V
5 V
15
10
V
V
= 13.5 V
in
= 5 V
REF
4.910 V
−40 −20
0
20
40
60
80 100 120 140
TIME (400 ms/div)
T , JUNCTION TEMPERATURE (°C)
J
Figure 17. Load Transient
Figure 18. Status Reaction Time tST vs.
Junction Temperature TJ
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NCV4254C
APPLICATION INFORMATION
The NCV4254C tracking regulator is self−protected with
internal thermal shutdown and internal current limit. Typical
characteristics are shown in Figure 3 to Figure 18.
temperature above 150°C is outside the maximum ratings
and reduces the IC lifetime.
The NCV4254C allows a negative supply voltage.
However, several small currents are flowing into the IC. For
details see electrical characteristics table and typical
performance graphs. The thermal protection circuit is not
operating during reverse polarity condition.
Input Decoupling (Cin)
A ceramic or tantalum 0.1 mF capacitor is recommended
and should be connected close to the NCV4254C package.
Higher capacitance and lower ESR will improve the overall
line and load transient response.
Thermal Considerations
If extremely fast input voltage transients are expected then
appropriate input filter must be used in order to decrease
rising and/or falling edges below 50 V/ms for proper
operation. The filter can be composed of several capacitors
in parallel.
As power in the NCV4254C increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the NCV4254C has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
NCV4254C can handle is given by:
Output Decoupling (Cout
)
The output capacitor for the NCV4254C is required for
stability. Without it, the regulator output will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst−case is determined at the minimum ambient
temperature and maximum load expected.
The output capacitor can be increased in size to any
desired value above the minimum. One possible purpose of
this would be to maintain the output voltage during brief
conditions of negative input transients that might be
characteristic of a particular system.
ƪT
ƫ
J(MAX) * TA
PD(MAX)
+
(eq. 1)
RqJA
Since T is not recommended to exceed 150°C, then the
J
2
NCV4254C (SOIC−8 EP) soldered on 645 mm , 1 oz copper
area, FR4 can dissipate up to 1.667 W when the ambient
temperature (T ) is 25°C. See Figure 19 and 20 for R
A
qJA
versus PCB Cu area. The power dissipated by the
NCV4254C can be calculated from the following equations:
The capacitor must also be rated at all ambient
temperatures expected in the system. To maintain regulator
stability down to −40_C, a capacitor rated at that
temperature must be used.
ǒ
Ǔ
ǒ
Ǔ
P
D [ Vin Iq@Iout ) Iout Vin * Vout
(eq. 2)
(eq. 3)
or
ǒ
Ǔ
PD(MAX) ) Vout Iout
Tracking Regulator
Vin(MAX)
[
Iout ) Iq
The output voltage V is controlled by comparing it to
out
the voltage applied at pin EN/REF and driving a PNP pass
transistor accordingly. The control loop stability depends on
160
140
120
100
80
the output capacitor C , the load current, the chip
out
1 Layer
4 Layer
temperature and the poles/zeros introduced by the integrated
circuit.
Protection circuitry prevents the IC as well as the
application from destruction in case of catastrophic events.
These safeguards contain output current limitation, reverse
polarity protection as well as thermal shutdown in case of
over temperature.
In order to avoid excessive power dissipation that could
never be handled by the pass element and the package, the
maximum output current is decreased at high input voltages.
The over temperature protection circuit prevents the IC
from immediate destruction under fault conditions (e.g.
Output continuously short−circuited) by reducing the output
current. A thermal balance below 200°C junction
temperature is established. Please note that a junction
60
40
20
0
0
100
200
300
400
500 600 700 800
2
PCB Cu AREA (mm )
Figure 19. RqJA vs. PCB CU Area
(SOIC−8 Package)
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9
NCV4254C
140
120
100
80
Hints
V
and GND printed circuit board traces should be as
in
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the NCV4254C and
make traces as short as possible.
The NCV4254C is not developed in compliance with
ISO26262 standard. If application is safety critical then the
below application diagram shown in Figure 21 or 22 can be
used.
1 Layer
4 Layer
60
40
20
0
0
100
200 300
400
500 600
700 800
2
PCB Cu AREA (mm )
Figure 20. RqJA vs. PCB CU Area
(SOIC−8 EP Package)
VBAT
VIN
VDD
VOUT
COUT1
1μF
VCC
CIN1
100nF
I/O
RESET
Main supply e.g.
Voltage
Microprocessor
Supervisor
NCV8772(C)
(e.g. NCV30X, NCV809)
GND
OFF ON
EN
RO
I/O
I/O
GND
VOUT
VOUT
VIN
COUT2
2.2μF
CIN2
100nF
NCV4254C
REF/EN
ADJ
GND
Figure 21. Application Diagram for ADJ version
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NCV4254C
VBAT
VIN
VDD
I/O
VOUT
COUT1
1μF
VCC
CIN1
100nF
RESET
Main supply e.g.
Voltage
Microprocessor
Supervisor
NCV8772(C)
(e.g. NCV30X, NCV809)
GND
OFF ON
EN
RO
I/O
I/O I/O
GND
VOUT
VOUT
VIN
COUT2
2.2μF
CIN2
100nF
NCV4254C
REF/EN
ST
GND
RST
10kΩ
Figure 22. Application Diagram for ST version
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11
NCV4254C
CIRCUIT DESCRIPTION
ENABLE Function
Output Voltage
By pulling the V
is disabled and enters a Stand−by mode where the device
draws less then 5 μA from supply. When the V
is greater then 1.75 V, V
normally.
lead below 0.4 V typically, the IC
The output is capable of supplying 70 mA to the load
while configured as a similar (Figure 26), lower (Figure 27)
or higher (Figure 25) voltage as the reference lead. The Adj
lead acts as the inverting terminal of the op amp and the
REF/EN
lead
lead
REF/EN
tracks the V
REF/EN
OUT
V
REF
lead as the non−inverting.
The device can also be configured as a high−side driver as
displayed in Figure 28.
STATUS Output
The status output is used as the power on indicator to the
microcontroller. This signal indicates when the output
voltage is suitable for reliable operation of the sensor. It pulls
low when the output is not considered to be ready. ST is
VIN
Vout
Vin
Vout
Cin
100nF
Cout
2.2mF
NCV4254C
pulled up to V
(Figure 23) or V (Figure 24) by an
REF
out
VREF
external resistor, typically 10 kW.
REF/EN
ADJ
V
GND
CREF/EN
10nF
+ V
VIN
Vin
Cin
Vout
Cout
out
REF
Vout
Figure 26. Adjust Version Application Circuit:
Output Voltage Equal to the Reference Voltage
100 nF
NCV4254C
2.2 mF
VREF
I/O
ST
REF/EN
GND
Vout
VIN
RST
10 kW
CREF/EN
10 nF
Vin
Vout
Cin
100nF
Cout
2.2mF
NCV4254C
VREF
VREF
R1
Figure 23. Status Version Application Circuit:
Status to Reference Voltage
REF/EN
ADJ
GND
CREF/EN
10nF
R2
R
) R
2
ǒ Ǔ
V
+ V
REF
out
Vout
Cout
VIN
R
1
2
Vin
Vout
Cin
100nF
Figure 27. Adjust Version Application Circuit:
Output Voltage Lower Than the Reference Voltage
RST
10kΩ
NCV4254C
2.2mF
VREF
I/O
ST
REF/EN
GND
Vout
VIN
CREF/EN
10nF
Vin
Vout
Cin
100nF
Cout
2.2mF
NCV4254C
Figure 24. Status Version Application Circuit:
Status to Output Voltage
VREF
REF/EN
ADJ
GND
CREF/EN
10nF
VIN
Vout
Vin
Vout
Cin
100nF
Cout
2.2mF
NCV4254C
Figure 28. Adjust Version Application Circuit:
R1
R2
High−Side Driver
VREF
REF/EN
ADJ
GND
CREF/EN
10nF
R
1
ǒ1 ) Ǔ
V
+ V
ADJ
out
R
2
Figure 25. Adjust Version Application Circuit:
Output Voltage Higher Than the Reference Voltage
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12
NCV4254C
ORDERING INFORMATION
Device
†
Version
Package
Shipping
NCV4254CDAJR2G
NCV4254CDSTR2G
NCV4254CPDAJR2G
NCV4254CPDSTR2G
ADJ
ST
SOIC−8
(Pb−Free)
2500 / Tape & Reel
ADJ
ST
SOIC−8 EP
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
PACKAGE DIMENSIONS
SOIC−8 EP
CASE 751AC
ISSUE C
455 CHAMFER
h
NOTES:
NOTE 4
0.10 C D
1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.004mm IN
EXCESS OF MAXIMUM MATERIAL CONDITION.
H
D
NOTE 5
A
q
D
E
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.006mm PER SIDE.
DIMENSION E1 DOES NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.010mm PER SIDE.
8
1
5
SEATING
PLANE
L
C
E1
NOTE 4
(L1)
5. DATUMS A AND B TO BE DETERMINED AT DATUM PLANE H.
DETAIL A
MILLIMETERS
0.10 C D
DIM MIN
MAX
1.75
0.10
1.65
0.51
0.48
0.25
0.23
4
0.20 C D
A
A1
A2
b
b1
c
1.35
−−−
1.35
0.31
0.28
0.17
0.17
8X b
PIN ONE
0.25 C A-B D
LOCATION
B
NOTE 5
NOTES 3
TOP VIEW
c1
D
DETAIL A
0.10
C
A2
4.90 BSC
NOTE 7
c
E
E1
e
6.00 BSC
3.90 BSC
1.27 BSC
0.10
C
A
A
F
G
h
2.24
3.20
2.51
0.50
1.27
A
SEATING
PLANE
1.55
0.25
0.40
e
A1
C
END VIEW
SIDE VIEW
F
L
L1
q
1.04 REF
0
8
_
_
1
4
(b)
RECOMMENDED
SOLDERING FOOTPRINT*
c
G
b1
SECTION A−A
c1
3.20
8
5
BOTTOM VIEW
8X
1.52
2.51 7.00
1
8X
0.76
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
13
NCV4254C
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
−X−
A
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−Z−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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