NCV4274C [ONSEMI]
400 mA Low Dropout Voltage Regulator;
| 型号： | NCV4274C |
| 厂家： | 
ONSEMI |
| 描述： | 400 mA Low Dropout Voltage Regulator |
| 文件： | 总13页 (文件大小：125K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV4274C
400 mA Low Dropout
Voltage Regulator
Description
The NCV4274C is a precision micro−power voltage regulator with
an output current capability of 400 mA available in the DPAK and
D2PAK packages.
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The output voltage is accurate within 2.0% with a maximum
dropout voltage of 0.5 V with an input up to 40 V. Low quiescent
current is a feature drawing only 125 mA with a 1 mA load. This part is
ideal for automotive and all battery operated microprocessor
equipment.
The regulator is protected against reverse battery, short circuit, and
thermal overload conditions. The device can withstand load dump
transients making it suitable for use in automotive environments.
MARKING DIAGRAMS
4
1
Input
74C−xxG
2, 4 Ground
3
ALYWW
Output
x
DPAK
DT SUFFIX
CASE 369C
2
1
3
Features
• 3.3 V, 5.0 V, 2.0% Output Options
• Low 125 mA Quiescent Current at 1 mA load current
• 400 mA Output Current Capability
• Fault Protection
1
Input
2, 4 Ground
Output
NC
3
V4274C−xx
AWLYYWWG
D2PAK
DS SUFFIX
CASE 418AF
• +60 V Peak Transient Voltage with Respect to GND
S −42 V Reverse Voltage
S Short Circuit
S Thermal Overload
xx
A
= 33 (3.3 V)
= 50 (5.0 V)
• Very Low Dropout Voltage
= Assembly Location
• AEC−Q100 Grade 1 Qualified and PPAP Capable
• These are Pb−Free Devices
L, WL = Wafer Lot
Y
WW
G
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information on page 11 of
this data sheet.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
May, 2015 − Rev. 1
NCV4274C/D
NCV4274C
I
Q
Current Limit and
Saturation Sense
Bandgap
Refernece
−
+
Thermal
Shutdown
GND
Figure 1. Block Diagram
Pin Definitions and Functions
Pin No.
Symbol
Function
1
2,4
3
I
Input; Bypass directly at the IC a ceramic capacitor to GND.
Ground
GND
Q
Output; Bypass with a capacitor to GND.
ABSOLUTE MAXIMUM RATINGS
Pin Symbol, Parameter
Symbol
Condition
Min
Max
Unit
V
I, Input−to−Regulator
Voltage
Current
V
I
−42
45
I
I
Internally
Limited
Internally
Limited
I, Input peak Transient Voltage to Regulator with Respect
to GND (Note 1)
V
60
V
V
I
Q, Regulated Output
Voltage
Current
V
Q
−1.0
40
VQ = V
I
I
Q
Internally
Limited
Internally
Limited
GND, Ground Current
I
−
100
mA
GND
Junction Temperature
Storage Temperature
T
−40
−50
150
150
°C
°C
J
T
Stg
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESD
4
200
1
kV
V
HB
ESD
MM
ESD Capability, Charged Device Model (Note 2)
ESD
kV
CDM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Load Dump Test B (with centralized load dump suppression) according to ISO16750-2 standard. Guaranteed by design. Not tested in
production. Passed Class C.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD MM tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD CDM tested per EIA/JES D22/C101, Field Induced Charge Model
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2
NCV4274C
OPERATING RANGE
Parameter
Symbol
Condition
Min
5.5
Max
40
Unit
V
Input Voltage (5.0 V Version)
Input Voltage (3.3 V Version)
Junction Temperature
V
V
T
I
4.5
40
V
I
−40
150
°C
J
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
THERMAL RESISTANCE
Parameter
Symbol
Condition
Min
Max
Unit
Junction−to−Ambient
Junction−to−Ambient
DPAK
R
−
112.3
(Note 3)
°C/W
thja
D2PAK
R
−
89.7
(Note 3)
°C/W
thja
Junction−to−Case
Junction−to−Case
DPAK
R
−
−
5.8
5.8
°C/W
°C/W
thjc
D2PAK
R
thjc
2
3. 1 oz copper, 100 mm copper area, single−sided FR4 PCB.
Pb−FREE SOLDERING TEMPERATURE AND MSL
Parameter
Symbol
Condition
Min
Max
Unit
Pb−Free Soldering, (Note 4)
Reflow (SMD styles only),
T
60s − 150s Above 217s
40s Max at Peak
°C
sld
Pb−Free
−
1
265 pk
−
Moisture Sensitivity Level
MSL
DPAK and D2PAK
4. Per IPC/JEDEC J−STD−020C
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3
NCV4274C
ELECTRICAL CHARACTERISTICS
−40°C < T < 150°C; V = 13.5 V unless otherwise noted.
J
I
Parameter
Symbol
Test Conditions
Min Typ
Max
Unit
REGULATOR
Output Voltage (5.0 V Version)
Output Voltage (5.0 V Version)
Output Voltage (3.3 V Version)
Output Voltage (3.3 V Version)
V
V
V
V
5 mA < I < 400 mA
4.9
4.9
5.0
5.0
5.1
5.1
3.37
3.37
−
V
V
Q
Q
Q
Q
Q
6 V < V < 28 V
I
5 mA < I < 200 mA
Q
6 V < V < 40 V
I
5 mA < I < 400 mA
3.23 3.3
3.23 3.3
400 600
V
Q
4.5 V < V < 28 V
I
5 mA < I < 200 mA
V
Q
4.5 V < V < 40 V
I
Current Limit (All Versions)
Quiescent Current
I
Q
V
I
= 90% V
QTYP
mA
Q
I
q
= 1 mA
Q
V
= 5.0 V
= 3.3 V
−
−
125
125
250
250
mA
mA
Q
V
Q
I
I
= 250 mA
Q
V
V
= 5.0 V
= 3.3 V
−
−
5
5
15
15
mA
mA
Q
Q
= 400 mA
Q
V
V
= 5.0 V
= 3.3 V
−
−
10
10
35
35
mA
mA
Q
Q
Dropout Voltage
V
DR
I
Q
= 250 mA,
V
DR
= V − V
I Q
5.0 V Version
V = 5.0 V
−
−
−
250
3
500
20
mV
mV
mV
I
Load Regulation (3.3 V and 5 V Versions)
Line Regulation (3.3 V and 5 V Versions)
DV
DV
I = 5 mA to 400 mA
Q
Q
DV = 12 V to 32 V
4
25
Q
I
I
Q
= 5 mA
Power Supply Ripple Rejection
Thermal Shutdown Temperature*
P
ƒr = 100 Hz,
V = 0.5 V
−
60
−
dB
SRR
r
PP
T
I
Q
= 5 mA
150
−
210
°C
SD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
*Guaranteed by design, not tested in production
V
I
I
Q
I
V
V
V
Q
I
I
Q
Q
I
1
3
1
3
NCV4274C
NCV4274C
C
C
C
C
C *
Q
11
1.0 mF
12
Q
I
Input
Output
100 nF
10 mF
or
22 mF
100 nF
V
Q
R
load
V
I
2,4
2,4
GND
GND
I
GND
*C = 10 mF for V ≤ 3.3 V
Q
Q
Q
C
= 22 mF for V ≥ 5 V
Q
Figure 2. Measuring Circuit
Figure 3. Application Circuit
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4
NCV4274C
TYPICAL CHARACTERISTIC CURVES − 5 V VERSION
100
10
5.1
Unstable Region
Stable Region
5.05
5
1
4.95
4.9
0.1
0.01
V = 13.5 V
R = 1 kW
L
I
C
= 22 mF
Q
0
100
200
300
400
−40
0
40
80
120
160
I , OUTPUT CURRENT (mA)
Q
T , JUNCTION TEMPERATURE (°C)
J
Figure 4. Output Stability with Output
Capacitor ESR
Figure 5. Output Voltage vs.
Junction Temperature
400
350
300
250
200
150
100
50
6
5
4
3
2
1
0
T = 125°C
J
T = 25°C
J
T = 25°C
R = 20 W
L
J
0
0
50
100 150 100
250 300 350 400
0
2
4
6
8
10
I , OUTPUT CURRENT (mA)
Q
V , INPUT VOLTAGE (V)
I
Figure 6. Output Voltage vs. Input Voltage
Figure 7. Dropout Voltage vs. Output Current
700
600
500
400
300
200
100
0
1.6
1.2
0.8
0.4
0
−0.4
−0.8
−1.2
R = 6.8 kW
T = 25°C
J
T = 25°C
Q
L
J
V
= 0 V
0
5
10
15
20
25
30
35
40 45
−50
−30
−10
10
30
50
V , INPUT VOLTAGE (V)
I
V , INPUT VOLTAGE (V)
I
Figure 8. Input Current vs. Input Voltage
Figure 9. Maximum Output Current vs. Input
Voltage
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5
NCV4274C
TYPICAL CHARACTERISTIC CURVES − 5 V VERSION
11
10
9
0.7
0.6
0.5
0.4
0.3
0.2
0.1
8
7
6
5
4
3
2
V = 13.5 V
T = 25°C
J
V = 13.5 V
T = 25°C
J
I
I
1
0
0
0
50
100 150 200
250 300 350 400 450
0
10
20
30
40
50
60
I , OUTPUT CURRENT (mA)
Q
I , OUTPUT CURRENT (mA)
Q
Figure 10. Quiescent Current vs.
Output Current (High Load)
Figure 11. Quiescent Current vs. Output
Current (Low Load)
10
9
8
7
6
5
4
3
2
1
0
T = 25°C
R = 20 W
L
J
0
5
10 15
20
25 30
35 40
45
V , INPUT VOLTAGE (V)
I
Figure 12. Quiescent Current vs. Input Voltage
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6
NCV4274C
TYPICAL CHARACTERISTIC CURVES − 3.3 V VERSION
100
10
3.36
3.34
Unstable Region
3.32
3.3
1
Stable Region
3.28
3.26
0.1
0.01
V = 13.5 V
R = 660 W
L
I
C
= 10 mF
Q
3.24
−40
0
100
200
300
400
0
40
80
120
160
I , OUTPUT CURRENT (mA)
Q
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. Output Stability with Output
Capacitor ESR
Figure 14. Output Voltage vs.
Junction Temperature
1.4
1.2
1
4
3
2
1
0
0.8
0.6
0.4
0.2
0
−0.2
−0.4
−0.6
−0.8
−1
T = 25°C
R = 20 W
L
J
T = 25°C
J
R = 3.3 kW
L
0
2
4
6
8
10
−50
−30
−10
10
30
50
V , INPUT VOLTAGE (V)
I
V , INPUT VOLTAGE (V)
I
Figure 15. Output Voltage vs. Input Voltage
Figure 16. Input Current vs. Input Voltage
4
3.5
3
700
600
500
400
300
200
100
0
2.5
2
1.5
1
T = 25°C
J
0.5
0
T = 25°C
Q
J
V
R = 20 W
L
= 0 V
0
5
10
15
20
25
30
35
40 45
0
5
10
15
20
25
30
35
40 45
V , INPUT VOLTAGE (V)
I
V , INPUT VOLTAGE (V)
I
Figure 17. Maximum Output Current vs. Input
Voltage
Figure 18. Quiescent Current vs. Input Voltage
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7
NCV4274C
TYPICAL CHARACTERISTIC CURVES − 3.3 V VERSION
11
10
9
0.7
0.6
0.5
0.4
0.3
0.2
0.1
8
7
6
5
4
3
2
V = 13.5 V
T = 25°C
J
V = 13.5 V
T = 25°C
J
I
I
1
0
0
0
50
100 150 200
250 300 350 400 450
0
10
20
30
40
50
60
I , OUTPUT CURRENT (mA)
Q
I , OUTPUT CURRENT (mA)
Q
Figure 19. Quiescent Current vs.
Output Current (High Load)
Figure 20. Quiescent Current vs.
Output Current (Low Load)
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NCV4274C
APPLICATION DESCRIPTION
Output Regulator
Once the value of P
is known, the maximum
D(max)
The output is controlled by a precision trimmed reference
and error amplifier. The PNP output has saturation control
for regulation while the input voltage is low, preventing over
saturation. Current limit and voltage monitors complement
the regulator design to give safe operating signals to the
processor and control circuits.
permissible value of R
can be calculated:
qJA
ǒ
Ǔ
150 C * TA
(eq. 2)
PqJA
+
PD
The value of R
can then be compared with those in the
qJA
package section of the data sheet. Those packages with
’s less than the calculated value in Equation 2 will keep
R
qJA
Stability Considerations
the die temperature below 150°C. In some cases, none of the
packages will be sufficient to dissipate the heat generated by
the IC, and an external heat sink will be required. The current
flow and voltages are shown in the Measurement Circuit
Diagram.
The input capacitor C in Figure 2 is necessary for
I1
compensating input line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1 W in series
with C
I2.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup delay,
load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. The
aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
(−25°C to −40°C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturer’s data
sheet usually provides this information.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
:
qJA
R
qJA + RqJC ) RqCS ) RqSA
(eq. 3)
Where:
The value for the output capacitor C shown in Figure 2
Q
R
R
R
= the junction−to−case thermal resistance,
should work for most applications; however, it is not
necessarily the optimized solution. Actual Stability Regions
are shown in a graphs in the Typical Performance
Characteristics section.
qJC
= the case−to−heat sink thermal resistance, and
= the heat sink−to−ambient thermal resistance.
appears in the package section of the data sheet. Like
qCS
qSA
R
qJC
R
, it too is a function of package type. R
and R
are
qJA
qCS
qSA
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 3) is:
functions of the package type, heat sink and the interface
between them. These values appear in data sheets of heat
sink manufacturers.
Thermal, mounting, and heat sinking are discussed in the
ON Semiconductor application note AN1040/D, available
on the ON Semiconductor Website.
PD(max) + [VI(max) * VQ(min)]IQ(max) ) VI(max)Iq
(eq. 1)
Where:
V
V
I
is the maximum input voltage,
is the minimum output voltage,
is the maximum output current for the application,
I(max)
Q(min)
Q(max)
and
I is the quiescent current the regulator consumes at I
.
Q(max)
q
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9
NCV4274C
180
160
140
120
100
80
130
120
110
100
90
80
70
1 oz
300
60
1 oz
2 oz
2 oz
50
60
40
40
30
0
100 200
300
400
500
600
700 800
0
100 200
400
500
600
700 800
2
2
COPPER SPREADER AREA (mm )
COPPER SPREADER AREA (mm )
Figure 21. RqJA vs. Copper Spreader Area,
DPAK 3−Lead
Figure 22. RqJA vs. Copper Spreader Area,
D2PAK 3−Lead
1000
100
10
2
1 oz Cu Area 100 mm
2
1 oz Cu Area 645 mm
1
0.1
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (s)
Figure 23. Single−Pulse Heating Curves, DPAK 3−Lead
100
10
2
1 oz Cu Area 100 mm
2
1 oz Cu Area 645 mm
1
0.1
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (s)
Figure 24. Single−Pulse Heating Curves, D2PAK 3−Lead
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10
NCV4274C
100
10
50% Duty Cycle
20%
10%
5%
2%
1%
1
Non−normalized Response
Single Pulse
0.1
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (s)
Figure 25. Duty Cycle for 1 inch2 (645 mm2) Spreader Board, DPAK 3−Lead
100
10
50% Duty Cycle
20%
10%
5%
2%
1%
1
Non−normalized Response
Single Pulse
0.1
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (s)
Figure 26. Duty Cycle for 1 inch2 (645 mm2) Spreader Board, D2PAK 3−Lead
ORDERING INFORMATION
†
Device
Output Voltage Accuracy
Output Voltage
Package
Shipping
NCV4274CDT33RKG
2%
2%
2%
2%
3.3 V
DPAK
(Pb−Free)
2500 / Tape & Reel
800 / Tape & Reel
2500 / Tape & Reel
800 / Tape & Reel
NCV4274CDS33R4G
NCV4274CDT50RKG
NCV4274CDS50R4G
3.3 V
5.0 V
5.0 V
D2PAK
(Pb−Free)
DPAK
(Pb−Free)
D2PAK
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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11
NCV4274C
PACKAGE DIMENSIONS
D2PAK
CASE 418AF
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCHES.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS
A AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 4.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.025 (0.635) MAXIMUM.
T
T
TERMINAL 4
C
C
A
K
U
OPTIONAL
CHAMFER
OPTIONAL
CHAMFER
ED
ES
S
V
B
DETAIL C
DETAIL C
H
1
2
3
6. SINGLE GAUGE DESIGN WILL BE SHIPPED AF
TER FPCN EXPIRATION IN OCTOBER 2011.
J
INCHES
DIM MIN MAX
MILLIMETERS
MIN MAX
9.804 10.236
F
SIDE VIEW
BOTTOM VIEW
SIDE VIEW
A
B
C
D
0.386
0.356
0.170
0.026
0.403
0.368
0.180
0.036
0.055
0.026
SINGLE GAUGE
CONSTRUCTION
DUAL GAUGE
G
9.042
4.318
0.660
1.143
0.457
9.347
4.572
0.914
1.397
0.660
CONSTRUCTION
3X
D
M
0.010 (0.254)
T
TOP VIEW
ED 0.045
ES 0.018
F
G
H
J
0.051 REF
0.100 BSC
0.539 0.579 13.691 14.707
0.125 MAX
0.050 REF
1.295 REF
2.540 BSC
3.175 MAX
1.270 REF
T
N
K
L
M
L
0.000
0.088
0.018
0.058
0.010
0.102
0.026
0.078
0.000
0.254
2.591
0.660
1.981
M
N
P
R
S
U
V
2.235
0.457
1.473
SEATING
PLANE
P
5_REF
5_REF
BOTTOM VIEW
R
0.116 REF
0.200 MIN
0.250 MIN
2.946 REF
5.080 MIN
6.350 MIN
DETAIL C
OPTIONAL CONSTRUCTIONS
SOLDERING FOOTPRINT*
10.490
8.380
16.155
3X
3.504
3X
1.016
2.540
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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12
NCV4274C
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
A
D
E
C
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
A
b3
B
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
c2
4
2
L3
L4
Z
Z
DETAIL A
H
1
3
7. OPTIONAL MOLD FEATURE.
INCHES
DIM MIN MAX
0.086 0.094
A1 0.000 0.005
0.025 0.035
MILLIMETERS
NOTE 7
MIN
2.18
0.00
0.63
0.72
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
c
b2
e
BOTTOM VIEW
BOTTOM VIEW
A
ALTERNATE
SIDE VIEW
CONSTRUCTION
b
b
b2 0.028 0.045
b3 0.180 0.215
M
0.005 (0.13)
C
H
TOP VIEW
c
0.018 0.024
GAUGE
PLANE
SEATING
PLANE
c2 0.018 0.024
L2
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.90 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.114 REF
L
A1
L1
0.020 BSC
DETAIL A
ROTATED 905 CW
L3 0.035 0.050
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
SOLDERING FOOTPRINT*
6.20
0.244
3.00
0.118
2.58
0.102
5.80
0.228
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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