NCV4276CDT33RKG [ONSEMI]
400 mA Low-Drop Voltage Regulator;
| 型号： | NCV4276CDT33RKG |
| 厂家： | 
ONSEMI |
| 描述： | 400 mA Low-Drop Voltage Regulator 输出元件 调节器 |
| 文件： | 总16页 (文件大小：164K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV4276C
400 mA Low-Drop Voltage
Regulator
The NCV4276C is a 400 mA output current integrated low dropout
regulator family designed for use in harsh automotive environments.
It includes wide operating temperature and input voltage ranges. The
device is offered with 3.3 V, 5.0 V, and adjustable voltage versions
available in 2% output voltage accuracy. It has a high peak input
voltage tolerance and reverse input voltage protection. It also
provides overcurrent protection, overtemperature protection and
inhibit for control of the state of the output voltage. The NCV4276C
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MARKING
DIAGRAMS
2
DPAK
5−PIN
DT SUFFIX
family is available in DPAK and D PAK surface mount packages.
76CXXG
ALYWW
The output is stable over a wide output capacitance and ESR range.
The NCV4276C has improved startup behavior during input voltage
transients.
1
CASE 175AA
5
1
The NCV4276C is pin for pin compatible with NCV4276B.
Features
• 3.3 V, 5.0 V, and Adjustable Voltage Version (from 2.5 V to 20 V)
2% Output Voltage
• 400 mA Output Current
2
D PAK
NC
V4276C−XX
AWLYWWG
5−PIN
DS SUFFIX
CASE 936A
1
• 500 mV (max) Dropout Voltage (5.0 V Output)
• Inhibit Input
5
1
• Very Low Current Consumption
• Fault Protection
*Tab is connected to Pin 3 on all packages.
= Assembly Location
WL, L = Wafer Lot
♦ +45 V Peak Transient Voltage
♦ −42 V Reverse Voltage
A
♦ Short Circuit
Y
= Year
WW
G
XX
= Work Week
= Pb−Free Device
= 33 (3.3 V)
= 50 (5.0 V)
= AJ (Adj. Voltage)
♦ Thermal Overload
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These are Pb−Free Devices
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering
information section on page 14 of this data sheet.
©
Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
January, 2014 − Rev. 0
NCV4276C/D
NCV4276C
I
Q
Error
Amplifier
Current Limit and
Saturation Sense
Bandgap
Reference
−
+
Thermal
Shutdown
INH
GND
NC
Figure 1. NCV4276C Block Diagram
I
Q
Error
Amplifier
Current Limit and
Saturation Sense
Bandgap
Reference
−
+
Thermal
Shutdown
INH
GND
VA
Figure 2. NCV4276C Adjustable Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
Symbol
I
Description
1
2
3
4
Input; Battery Supply Input Voltage.
INH
Inhibit; Set low−to inhibit.
GND
NC / VA
Ground; Pin 3 internally connected to heatsink.
Not connected for fixed voltage version / Voltage Adjust Input for adjustable voltage version; use an external
voltage divider to set the output voltage
5
Q
Output: Bypass with a capacitor to GND. See Figures 3 to 8 and Regulator Stability Considerations section.
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2
NCV4276C
MAXIMUM RATINGS
Rating
Symbol
Min
−42
−
Max
45
Unit
V
Input Voltage
V
I
V
I
Input Peak Transient Voltage
Inhibit INH Voltage
Voltage Adjust Input VA
Output Voltage
45
V
V
−42
−0.3
−1.0
−
45
V
INH
V
10
V
VA
V
40
V
Q
Ground Current
I
100
40
mA
V
q
Input Voltage Operating Range (Note 1)
V
V
Q
+ 0.5 V or 4.5 V
(Note 2)
I
ESD Susceptibility
(Human Body Model)
(Machine Model)
(Charged Device Model)
−
−
−
4.0
250
1.25
−
−
−
kV
V
kV
Junction Temperature
Storage Temperature
T
−40
−50
150
150
°C
°C
J
T
stg
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Functionaloperation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
2. Minimum V = 4.5 V or (V + 0.5 V), whichever is higher.
I
Q
LEAD TEMPERATURE SOLDERING REFLOW (Note 3)
Lead Temperature Soldering
T
SLD
°C
Reflow (SMD styles only), Leaded, 60−150 s above 183, 30 s max at peak
Reflow (SMD styles only), Lead Free, 60−150 s above 217, 40 s max at peak
Wave Solder (through hole styles only), 12 sec max
−
−
−
240
265
310
3. Per IPC / JEDEC J−STD−020C.
THERMAL CHARACTERISTICS
Characteristic
DPAK 5−PIN PACKAGE
Test Conditions (Typical Value)
Unit
Min Pad Board (Note 4)
1, Pad Board (Note 5)
Junction−to−Tab (psi−JLx, y
)
3.8
4.3
C/W
C/W
JLx
Junction−to−Ambient (R , q
)
75.1
58.5
q
JA JA
2
D PAK 5−PIN PACKAGE
0.4 sq. in. Spreader Board (Note 6)
1.2 sq. in. Spreader Board (Note 7)
Junction−to−Tab (psi−JLx, y
)
5.4
5.4
C/W
C/W
JLx
Junction−to−Ambient (R , q
)
54.2
43.3
q
JA JA
2
2
2
2
4. 1 oz. copper, 0.26 inch (168 mm ) copper area, 0.062″ thick FR4.
5. 1 oz. copper, 1.14 inch (736 mm ) copper area, 0.062″ thick FR4.
2
2
6. 1 oz. copper, 0.373 inch (241 mm ) copper area, 0.062″ thick FR4.
2
2
7. 1 oz. copper, 1.222 inch (788 mm ) copper area, 0.062″ thick FR4.
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NCV4276C
ELECTRICAL CHARACTERISTICS (V = 13.5 V; −40°C < T < 150°C; unless otherwise noted.)
I
J
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
OUTPUT
Output Voltage, 5.0 V Version
Output Voltage, 5.0 V Version
Output Voltage, 3.3 V Version
Output Voltage, 3.3 V Version
Output Voltage, Adjustable Version
V
V
V
V
5.0 mA < I < 400 mA,
4.9
4.9
5.0
5.0
3.3
3.3
−
5.1
5.1
V
V
V
V
V
Q
Q
Q
Q
Q
6.0 V < V < 28 V
I
5.0 mA < I < 200 mA,
Q
6.0 V < V < 40 V
I
5.0 mA < I < 400 mA,
3.234
3.234
−2%
3.366
3.366
+2%
Q
4.5 V < V < 28 V
I
5.0 mA < I < 200 mA,
Q
4.5 V < V < 40 V
I
AV
5.0 mA < I < 400 mA
Q
Q
V +1 < V < 40 V
Q
I
I
V > 4.5 V
Output Current Limitation
I
V
= 90% V
QTYP
QTYP
400
600
1100
10
mA
Q
Q
(V
= 2.5 V for ADJ version)
Quiescent Current (Sleep Mode)
I
V
INH
= 0 V
−
−
mA
q
I = I − I
q
I
Q
Quiescent Current, I = I − I
I
I
I
I
I
= 1.0 mA
−
−
−
95
5
200
15
mA
mA
mA
q
I
Q
Q
Q
q
q
q
Q
Q
Q
Q
Quiescent Current, I = I − I
I
I
= 250 mA
= 400 mA
= 250 mA,
q
I
Quiescent Current, I = I − I
10
35
q
I
Dropout Voltage,
V
DR
V
DR
= V − V
I Q
Adjustable Version
V > 4.5 V
−
−
−
−
250
250
3.0
4.0
500
500
20
mV
mV
mV
mV
I
Dropout Voltage (5.0 V Version)
Load Regulation
V
DR
I
Q
I
Q
= 250 mA (Note 8)
= 5.0 mA to 400 mA
DV
Q,LO
Line Regulation
DV
DV = 12 V to 32 V,
15
Q
I
I
Q
= 5.0 mA
Power Supply Ripple Rejection
PSRR
f = 100 Hz, V = 0.5 V
−
70
−
dB
r
r
PP
INHIBIT
Inhibit Voltage, Output High
V
V
V
V
V
w V
QMIN
−
2.3
2.2
10
2.8
−
V
V
INH
INH
INH
Q
Inhibit Voltage, Output Low (Off)
v 0.1 V
1.8
5.0
Q
Input Current
I
= 5.0 V
20
mA
INH
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 9)
T
SD
I
Q
= 5.0 mA
150
−
210
°C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performancemay not be indicated by the Electrical Characteristics if operated under different conditions.
8. Measured when the output voltage V has dropped 100 mV from the nominal valued obtained at V = 13.5 V.
Q
9. Guaranteed by design, not tested in production.
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NCV4276C
Output
I
I
I
Q
I 1
5 Q
5.5 − 45 V
C
1.0 mF
C
C
Q
22 mF
I1
I2
Input
100 nF
NCV4276C
INH
NC
R
L
2
4
3
I
INH
GND
Figure 3. Applications Circuit; Fixed Voltage Version
V
Q
= [(R1 + R2) * V ] / R2
ref
Output
I
I
I
Q
I 1
5 Q
Input
C
I1
C
I2
C
Q
C *
b
1.0 mF
100 nF
22 mF
NCV4276C
R
R
1
INH
VA
R
L
2
4
3
I
INH
GND
2
C * − Required if usage of low ESR output capacitor C is demand, see Regulator Stability Considerations section
b
Q
Figure 4. Applications Circuit; Adjustable Voltage Version
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NCV4276C
TYPICAL PERFORMANCE CHARACTERISTICS
100
10
100
Unstable Region
Stable Region
Unstable Region
10
1
1
Stable Region
0.1
0.1
0.01
C
= 10 mF
C = 22 mF
Q
Q
0.01
0
50
100
150 200
250
300
350 400
0
50
100
150 200
250
300
350 400
I , OUTPUT CURRENT (mA)
Q
I , OUTPUT CURRENT (mA)
Q
Figure 5. Output Stability with Output Capacitor
ESR, Fixed Versions (5.0 V and 3.3 V)
Figure 6. Output Stability with Output Capacitor
ESR, Fixed Versions (5.0 V and 3.3 V)
1000
100
10
10
1
C capacitor not connected
C capacitor not connected
b
b
Unstable Region
Stable Region
Unstable Region
C
Q
= 22 mF
C
V
= 22 mF
= 2.5 V
Q
Stable Region
1
V
Q
= 12 V
Q
V
= 6 V
Q
0.1
0.1
0.01
Unstable Region
Unstable Region
50 100
I , OUTPUT CURRENT (mA)
0.01
0
50
100
150 200
250
300
350 400
0
150 200
250
300
350 400
I , OUTPUT CURRENT (mA)
Q
Q
Figure 7. Output Stability with Output Capacitor
ESR, Adjustable Version
Figure 8. Output Stability with Output Capacitor
ESR, Adjustable Version
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NCV4276C
TYPICAL PERFORMANCE CHARACTERISTICS − Fixed Versions
5.10
5.05
5.00
3.36
V = 13.5 V
R = 1 kW
L
I
V = 13.5 V
R = 660 W
L
I
3.34
3.32
3.30
3.28
4.95
4.90
3.26
3.24
−40
0
40
80
120
160
−40
0
40
80
120
160
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 9. Output Voltage vs.
Figure 10. Output Voltage vs.
Junction Temperature, 5.0 V Version
Junction Temperature, 3.3 V Version
6
5
4
3
2
12
10
T = 25°C
R = 20 W
L
J
T = 25°C
R = 20 W
L
J
8
6
4
1
0
2
0
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
V , INPUT VOLTAGE (V)
I
V , INPUT VOLTAGE (V)
I
Figure 11. Quiescent Current vs.
Input Voltage, 5.0 V Version
Figure 12. Quiescent Current vs. Input Voltage,
3.3 V Version
4
6
5
4
3
2
3
2
T = 25°C
R = 20 W
L
J
T = 25°C
J
R = 20 W
L
1
0
1
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
V , INPUT VOLTAGE (V)
I
V , INPUT VOLTAGE (V)
I
Figure 13. Output Voltage vs. Input Voltage,
5.0 V Version
Figure 14. Output Voltage vs. Input Voltage,
3.3 V Version
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NCV4276C
TYPICAL PERFORMANCE CHARACTERISTICS − Fixed Versions
0.8
0.6
0.4
0.2
0
1.6
1.2
0.8
0.4
0
−0.2
−0.4
−0.4
R = 6.8 kW
T = 25°C
J
L
−0.6
R = 6.8 kW
T = 25°C
J
L
−0.8
−1.2
−0.8
−1.0
−50 −40 −30 −20 −10
0
10 20 30 40 50
−50 −40 −30 −20 −10
0
10 20
30 40 50
V , INPUT VOLTAGE (V)
I
V , INPUT VOLTAGE (V)
I
Figure 15. Input Current vs. Input Voltage,
5.0 V Version
Figure 16. Input Current vs. Input Voltage,
3.3 V Version
400
350
700
600
500
400
300
200
T = 125°C
J
300
250
200
150
100
T = 25°C
J
T = 25°C
J
100
0
V
Q
= 0 V
50
0
0
50
100
150
200
250
300 350 400
0
5
10
15
20
25
30
35
40
45
I , OUTPUT CURRENT (mA)
Q
V , INPUT VOLTAGE (V)
I
Figure 17. Dropout Voltage vs. Output Current,
Only 5 V Version
Figure 18. Maximum Output Current vs.
Input Voltage
0.5
0.4
0.3
0.2
18
16
14
12
10
8
V = 13.5 V
T = 25°C
J
I
V = 13.5 V
T = 25°C
J
I
6
4
0.1
0
2
0
0
100
200
300
400
500
600
0
10
20
30
40
50
I , OUTPUT CURRENT (mA)
Q
I , OUTPUT CURRENT (mA)
Q
Figure 19. Quiescent Current vs.
Output Current (High Load)
Figure 20. Quiescent Current vs.
Output Current (Low Load)
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NCV4276C
TYPICAL PERFORMANCE CHARACTERISTICS − Adjustable Version
2.55
2.54
2.53
2.52
2.51
2.50
2.49
2.48
2.47
5.0
4.5
V = 13.5 V
R = 500 W
L
I
T = 25°C
R = 20 W
L
J
4.0
3.5
3.0
2.5
2.0
1.5
1.0
2.46
2.45
0.5
0
−40
0
40
80
120
160
0
5
10
15
20
25
30
35
40
T , JUNCTION TEMPERATURE (°C)
J
V , INPUT VOLTAGE (V)
I
Figure 21. Output Voltage vs.
Junction Temperature
Figure 22. Quiescent Current vs.
Input Voltage
3
2
0.6
0.4
0.2
0
−0.2
−0.4
−0.6
1
0
T = 25°C
R = 20 W
L
J
T = 25°C
R = 6.8 kW
L
J
−0.8
−1.0
−50 −40 −30 −20 −10
0
10 20 30 40 50
0
1
2
3
4
5
6
7
8
9
10
V , INPUT VOLTAGE (V)
I
V , INPUT VOLTAGE (V)
I
Figure 23. Output Voltage vs. Input Voltage
Figure 24. Input Current vs. Input Voltage
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NCV4276C
TYPICAL PERFORMANCE CHARACTERISTICS − Adjustable Version
400
350
300
250
700
600
T = 125°C
J
500
400
300
200
T = 25°C
J
200
150
100
T = 25°C
J
V
Q
= 0 V
100
0
50
0
0
50
100
150 200
250 300
350 400
0
5
10
15
20
25
30
35
40
45
I , OUTPUT CURRENT (mA)
Q
V , INPUT VOLTAGE (V)
I
Figure 26. Maximum Output Current vs.
Input Voltage
Figure 25. Dropout Voltage vs. Output Current,
Output Voltage set to 5.0 V
18
16
14
12
10
8
0.5
0.4
0.3
0.2
T = 25°C
V = 13.5 V
I
J
T = 25°C
V = 13.5 V
I
J
6
4
0.1
0
2
0
0
100
200
300
400
500
600
0
10
20
30
40
50
I , OUTPUT CURRENT (mA)
Q
I , OUTPUT CURRENT (mA)
Q
Figure 28. Quiescent Current vs.
Output Current (Low Load)
Figure 27. Quiescent Current vs.
Output Current (High Load)
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NCV4276C
Circuit Description
Minimum ESR for C = 10 mF and 22 mF is native ESR
of ceramic capacitor with which the fixed output voltage
devices are performing stable. Murata ceramic capacitors
were used,
Q
The NCV4276C is an integrated low dropout regulator
that provides a regulated voltage at 400 mA to the output.
It is enabled with an input to the inhibit pin. The regulator
voltage is provided by a PNP pass transistor controlled by
an error amplifier with a bandgap reference, which gives it
the lowest possible dropout voltage. The output current
capability is 400 mA, and the base drive quiescent current
is controlled to prevent oversaturation when the input
voltage is low or when the output is overloaded. The
regulator is protected by both current limit and thermal
shutdown. Thermal shutdown occurs above 150°C to
protect the IC during overloads and extreme ambient
temperatures.
GCM32ER71E106KA57 (10 mF, 25V, X7R, 1210),
GRM32ER71E226ME15 (22 mF, 25V, X7R, 1210).
Calculating Bypass Capacitor
If usage of low ESR ceramic capacitors is demand in case
of Adjustable Regulator, connect the bypass capacitor C
b
between Voltage Adjust pin and Q pin according to
Applications circuit at Figure 4.
Parallel combination of bypass capacitor C with the
b
feedback resistor R contributes in the device transfer
1
function as an additional zero and affects the device loop
stability, therefore its value must be optimized. Attention
to the Output Capacitor value and its ESR must be paid. See
also Stability in High Speed Linear LDO Regulators
Application Note, AND8037/D for more information.
Optimal value of bypass capacitor is given by following
expression
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (V ) and drives the base of a
Q
PNP series pass transistor via a buffer. The reference is a
bandgap design to give it a temperature−stable output.
Saturation control of the PNP is a function of the load
current and input voltage. Oversaturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized. See Figure 4, Test Circuit, for
circuit element nomenclature illustration.
1
C
b
+
@ (F)
2 p f R
z
1
where
R = the upper feedback resistor
1
Regulator Stability Considerations
The input capacitors (C and C ) are necessary to
stabilize the input impedance to avoid voltage line
influences. Using a resistor of approximately 1.0 W in
series with C can stop potential oscillations caused by
stray inductance and capacitance.
f = the frequency of the zero added into the device
z
I1
I2
transfer function by R and C external components.
1
b
Set the R resistor according to output voltage
1
requirement. Chose the f with regard on the output
z
I2
capacitance C , refer to the table below.
Q
C
Q
(mF)
10
22
47
The output capacitor helps determine three main
characteristics of a linear regulator: startup delay, load
transient response and loop stability. The capacitor value
and type should be based on cost, availability, size and
temperature constraints. The aluminum electrolytic
capacitor is the least expensive solution, but, if the circuit
operates at low temperatures (−25°C to −40°C), both the
value and ESR of the capacitor will vary considerably. The
capacitor manufacturer’s data sheet usually provides this
information.
f Range (kHz)
16 − 18
11 − 18
8 − 18
z
Ceramic capacitors and its part numbers listed bellow
have been used as low ESR output capacitors C from the
table above to define the frequency ranges of additional
zero required for stability.
Q
GCM32ER71E106KA57 (10 mF, 25V, X7R, 1210)
GRM32ER71E226ME15 (22 mF, 25V, X7R, 1210)
GRM32ER61C476ME15 (47 mF, 16 V, X5R, 1210)
The value for the output capacitor C , shown in Figure 3,
Q
should work for most applications; see also Figures 5 to 8
for output stability at various load and Output Capacitor
ESR conditions. Stable region of ESR in Figures 5 to 8
shows ESR values at which the LDO output voltage does
not have any permanent oscillations at any dynamic
changes of output load current. Marginal ESR is the value
at which the output voltage waving is fully damped during
four periods after the load change and no oscillation is
further observable.
ESR characteristics were measured with ceramic
capacitors and additional series resistors to emulate ESR.
Low duty cycle pulse load current technique has been used
to maintain junction temperature close to ambient
temperature.
Inhibit Input
The inhibit pin is used to turn the regulator on or off. By
holding the pin down to a voltage less than 1.8 V, the output
of the regulator will be turned off. When the voltage on the
Inhibit pin is greater than 2.8 V, the output of the regulator
will be enabled to power its output to the regulated output
voltage. The inhibit pin may be connected directly to the
input pin to give constant enable to the output regulator.
Setting the Output Voltage (Adjustable Version)
The output voltage range of the adjustable version can be
set between 2.5 V and 20 V. This is accomplished with an
external resistor divider feeding back the voltage to the IC
back to the error amplifier by the voltage adjust pin VA.
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11
NCV4276C
The internal reference voltage is set to a temperature stable
reference of 2.5 V.
The output voltage is calculated from the following
formula. Ignoring the bias current into the VA pin:
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
I
Q
I
I
V
Q
+ [(R1 ) R2) * V ]ńR2
ref
SMART
REGULATOR®
V
I
V
Q
Use R2 < 50 k to avoid significant voltage output errors
due to VA bias current.
Connecting VA directly to Q without R1 and R2 creates
an output voltage of 2.5 V.
Control
Features
}
Designers should consider the tolerance of R1 and R2
Iq
during the design phase.
The input voltage range for operation (pin 1) of the
adjustable version is between (V + 0.5 V) and 40 V.
Internal bias requirements dictate a minimum input voltage
of 4.5 V. The dropout voltage for output voltages less than
Q
Figure 29. Single Output Regulator with Key
Performance Parameters Labeled
4.0 V is (4.5 V − V ).
Q
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and
the outside environment will have a thermal resistance.
Like series electrical resistances, these resistances are
Calculating Power Dissipation
in a Single Output Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 29) is:
P
+ [V
I(max)
* V
]I
(1)
D(max)
Q(min) Q(max)
summed to determine the value of R
:
JA
) V
I
q
I(max) q
(3)
R
qJA
+ R
qJC
) R ) R
qCS qSA
where
where
V
V
I
is the maximum input voltage,
is the minimum output voltage,
is the maximum output current for the
application,
I(max)
Q(min)
Q(max)
R
R
R
is the junction−to−case thermal resistance,
is the case−to−heatsink thermal resistance,
is the heatsink−to−ambient thermal
resistance.
JC
q
q
q
CS
SA
I
is the quiescent current the regulator
q
consumes at I
.
Q(max)
R
appears in the package section of the data sheet.
JC
q
Once the value of P
is known, the maximum
D(max)
Like R , it too is a function of package type. R
and
JA
CS
q
q
permissible value of R
can be calculated:
JA
q
R
are functions of the package type, heatsink and the
interface between them. These values appear in data sheets
of heatsink manufacturers.
SA
q
o
T
150 C *
A
R
qJA
+
(2)
P
D
The value of R
can then be compared with those in the
JA
q
Thermal, mounting, and heatsinking considerations are
discussed in the ON Semiconductor application note
AN1040/D.
package section of the data sheet. Those packages with
less than the calculated value in Equation 2 will keep
R
JA
q
the die temperature below 150°C.
http://onsemi.com
12
NCV4276C
110
100
90
80
75
70
65
60
55
50
45
40
80
1 oz
1 oz
70
2 oz
2 oz
60
50
40
35
30
0
100
200 300
400
500
600 700
800
0
100
200
300 400
500
600
700 800
2
2
COPPER SPREADER AREA (mm )
COPPER SPREADER AREA (mm )
Figure 30. RqJA vs. Copper Spreader Area,
Figure 31. RqJA vs. Copper Spreader Area,
DPAK 5−Lead
D2PAK 5−Lead
100
10
1
2
Cu Area 168 mm
2
Cu Area 736 mm
0.1
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 32. Single−Pulse Heating Curves, DPAK 5−Lead
100
10
1
2
Cu Area 241 mm
2
Cu Area 788 mm
0.1
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 33. Single−Pulse Heating Curves, D2PAK 5−Lead
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13
NCV4276C
100
10
50% Duty Cycle
20%
10%
5%
2%
1%
1
Non−normalized Response
Single Pulse
0.000001 0.00001
0.1
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 34. Duty Cycle for 1, Spreader Boards, DPAK 5−Lead
100
10
50% Duty Cycle
20%
10%
5%
2%
1%
1
Non−normalized Response
Single Pulse
0.1
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 35. Duty Cycle for 1, Spreader Boards, D2PAK 5−Lead
ORDERING INFORMATION
†
Device
Output Voltage Accuracy
Output Voltage
Package
Shipping
NCV4276CDT33RKG
DPAK, 5−Pin
(Pb−Free)
2500 / Tape & Reel
800 / Tape & Reel
2500 / Tape & Reel
800 / Tape & Reel
2500 / Tape & Reel
800 / Tape & Reel
3.3 V
2
NCV4276CDS33R4G
NCV4276CDT50RKG
NCV4276CDS50R4G
NCV4276CDTADJRKG
NCV4276CDSADJR4G
D PAK, 5−Pin
(Pb−Free)
DPAK, 5−Pin
(Pb−Free)
2%
5.0 V
2
D PAK, 5−Pin
(Pb−Free)
DPAK, 5−Pin
(Pb−Free)
Adjustable
2
D PAK, 5−Pin
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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14
NCV4276C
PACKAGE DIMENSIONS
DPAK 5, CENTER LEAD CROP
DT SUFFIX
CASE 175AA
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
−T−
PLANE
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
MIN
5.97
6.35
2.19
0.51
0.46
0.61
MAX
6.22
6.73
2.38
0.71
0.58
0.81
E
V
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.020 0.028
0.018 0.023
0.024 0.032
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.045 BSC
R1
Z
A
K
S
4.56 BSC
1 2 3 4
5
0.87
0.46
2.60
1.01
0.58
2.89
U
K
L
1.14 BSC
R
0.170 0.190
4.32
4.70
0.63
0.51
0.89
3.93
4.83
5.33
1.01
−−−
1.27
4.32
F
J
R1 0.185 0.210
S
U
V
Z
0.025 0.040
0.020 −−−
0.035 0.050
0.155 0.170
L
H
D 5 PL
M
G
0.13 (0.005)
T
SOLDERING FOOTPRINT*
6.4
0.252
2.2
0.086
0.34
0.013
5.8
0.228
5.36
0.217
10.6
0.417
0.8
0.031
mm
inches
ǒ
Ǔ
SCALE 4:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
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15
NCV4276C
PACKAGE DIMENSIONS
D2PAK 5
CASE 936A−02
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A
AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 6.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED 0.025
(0.635) MAXIMUM.
−T−
TERMINAL 6
OPTIONAL
CHAMFER
A
E
U
S
K
V
B
H
1
2
3
4 5
INCHES
MILLIMETERS
M
L
DIM
A
B
C
D
E
MIN
MAX
0.403
0.368
0.180
0.036
0.055
MIN
9.804
9.042
4.318
0.660
1.143
MAX
10.236
9.347
4.572
0.914
1.397
0.386
0.356
0.170
0.026
0.045
D
M
P
N
0.010 (0.254)
T
G
R
G
H
K
L
M
N
P
0.067 BSC
1.702 BSC
14.707
1.270 REF
0.539
0.579 13.691
0.050 REF
0.000
0.088
0.018
0.058
0.010
0.102
0.026
0.078
0.000
2.235
0.457
1.473
0.254
2.591
0.660
1.981
C
R
S
U
V
5_ REF
5_ REF
0.116 REF
0.200 MIN
0.250 MIN
2.946 REF
5.080 MIN
6.350 MIN
SOLDERING FOOTPRINT
8.38
0.33
1.702
0.067
10.66
0.42
1.016
0.04
3.05
0.12
16.02
0.63
mm
inches
ǒ
Ǔ
SCALE 3:1
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