NCV47823PAAJR2G [ONSEMI]

Dual High Side Switch with Adjustable Current Limit and Diagnostic Features;
NCV47823PAAJR2G
型号: NCV47823PAAJR2G
厂家: ONSEMI    ONSEMI
描述:

Dual High Side Switch with Adjustable Current Limit and Diagnostic Features

驱动 光电二极管 接口集成电路
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NCV47823  
Dual High Side Switch with  
Adjustable Constant Current  
and Diagnostic Features  
The NCV47823 is designed for using in harsh automotive  
environments providing dual mode operation depending on the load  
impedance: High Side Switch (HSS) or Constant Current Source  
(CCS). In both modes of operation the current limit can be set up to  
350 mA per channel by external resistor. The device has a high peak  
input voltage tolerance and reverse input voltage, reverse bias,  
overcurrent and overtemperature protections. The integrated current  
sense feature (adjustable by resistor connected to CSO pin for each  
channel) provides diagnosis and system protection functionality. The  
CSO pin output current creates voltage drop across CSO resistor which  
is proportional to output current of each channel. Extended diagnostic  
features in OFF state are also available and controlled by dedicated  
input and output pins.  
www.onsemi.com  
MARKING  
DIAGRAM  
14  
NCV4  
7823  
ALYWG  
G
TSSOP−14  
Exposed Pad  
CASE 948AW  
14  
1
1
A
L
= Assembly Location  
= Wafer Lot  
Y
W
G
= Year  
= Work Week  
= Pb−Free Package  
Features  
Reduced Inrush Current (current value set by external resistor only)  
Adjustable Constant Current: up to 350 mA  
Two Independent Enable Inputs (3.3 V Logic Compatible)  
PWM Function of Enable Inputs Available  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
Protection Features:  
See detailed ordering and shipping information on page 14 of  
sheet.  
Current Limitation  
Thermal Shutdown  
Reverse Input Voltage and Reverse Bias Voltage  
Reduced Reverse Bias Current  
Diagnostic Features:  
Short To Battery (STB) and Open Load (OL) in OFF State  
Internal Components for OFF State Diagnostics  
Open Collector Flag Output  
Two Output Voltage Monitoring Outputs (Analog)  
AEC−Q100 Grade 1 Qualified and PPAP Capable  
These Devices are Pb−Free, Halogen Free/BFR Free  
and are RoHS Compliant  
Typical Applications  
Audio and Infotainment System  
Active Safety System  
LED Lighting Systems  
© Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
December, 2017 − Rev. 0  
NCV47823/D  
NCV47823  
V
out1  
V
in  
C
in  
Proportional Voltage to V  
*
out1  
1 μF  
C
V
out1  
out_FB1  
1 μF  
CSO1  
EN1  
R
CSO1  
NCV47823  
(Dual CCHSS)  
Diagnostic Enable Input  
Error Flag Output (Open Collector)  
DE  
CS  
EF  
Diagnostic Channel Select Input  
V
out2  
Proportional Voltage to V  
*
out2  
V
out_FB2  
C
out2  
1 μF  
EN2  
CSO2  
GND  
R
CSO2  
Figure 1. Application Schematic  
* V  
out_FB1  
and V  
are sensed V  
and V output voltages, respectively, via internal resistor dividers  
out2  
out_FB2  
out1  
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2
 
NCV47823  
I
10 mA  
PU1  
IPU1_ON  
V
in  
V
out1  
I
= I  
/ RATIO*  
CSO1 out1  
VOLTAGE  
REFERENCE  
V
V
REF  
R
PASS DEVICE 1  
AND  
CURRENT MIRROR  
V
PD_EN1  
REF  
REF_OFF  
+
780 kW  
2.55 V  
EN1  
ENABLE  
EN1  
CSO1  
SATURATION  
PROTECTION  
+
THERMAL  
SHUTDOWN  
OC1_ON  
0.95x  
PD1_ON  
V
REF  
R
PD_11  
500 kW  
+
V
out_FB1  
STB1_OL1_OFF  
R
PD_12  
100 kW  
V
R
REF_OFF  
IPU1_ON  
PD_CS  
EN1  
EN2  
IPU2_ON  
780 kW  
DE  
CS  
PD1_ON  
PD2_ON  
R
PD_DE  
DIAGNOSTIC  
CONTROL  
LOGIC  
780 kW  
EF  
OC1_ON  
OC2_ON  
STB1_OL1_OFF  
STB2_OL2_OFF  
I
10 mA  
PU2  
IPU2_ON  
V
out2  
V
in  
ICSO2 = I  
/ RATIO*  
REF  
out2  
R
PD_EN2  
V
PASS DEVICE 2  
AND  
+
780 kW  
2.55V  
CURRENT MIRROR  
ENABLE  
EN2  
EN2  
CSO2  
THERMAL  
SHUTDOWN  
+
SATURATION  
PROTECTION  
OC2_ON  
0.95x  
PD2_ON  
V
REF  
R
PD21  
500 kW  
+
V
out_FB2  
STB2_OL2_OFF  
R
PD22  
GND  
100 kW  
V
REF_OFF  
* for current value of RATIO see  
into Electrical Characteristic Table  
Figure 2. Simplified Block Diagram  
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3
 
NCV47823  
1
14  
V
in  
V
out1  
CSO1  
EN1  
V
out_FB1  
CS  
EF  
DE  
EPAD  
GND  
EN2  
V
CSO2  
out_FB2  
V
in  
V
out2  
TSSOP−14 EPAD  
(Top View)  
Figure 3. Pin Connections  
Table 1. PIN FUNCTION DESCRIPTION  
Pin No.  
TSSOP−14  
EPAD  
Pin Name  
Description  
Power Supply Input for Channel 1 and supply of control circuits of whole chip. At least 4.4 V  
power supply must be used for proper IC functionality.  
1
V
in  
Current Sense Output 1, Current Limit setting and Output Current value information. See Appli-  
cation Section for more details.  
2
CSO1  
Enable Input 1; low level disables the Channel 1. (Used also for OFF state diagnostics control  
for Channel 1)  
3
4
5
EN1  
GND  
EN2  
Power Supply Ground.  
Enable Input 2; low level disables the Channel 2. (Used also for OFF state diagnostics control  
for Channel 2)  
Current Sense Output 2, Current Limit setting and Output Current value information. See Appli-  
cation Section for more details.  
6
CSO2  
7
8
V
Power Supply Input for Channel 2. Connect to pin 1 or different power supply rail.  
Output Voltage 2.  
in  
V
out2  
9
V
Output Voltage 2 Analog Monitoring. See Application Section for more details.  
Diagnostic Enable Input.  
out_FB2  
10  
11  
DE  
EF  
Error Flag (Open Collector) Output. Active Low.  
Channel Select Input for OFF state diagnostics. Set CS = Low for OFF state diagnostics of  
Channel 1. Set CS = High for OFF state diagnostics of Channel 2. Corresponding EN pin has  
to be used for diagnostics control (see Application Information section for more details).  
12  
CS  
13  
14  
V
Output Voltage 1 Analog Monitoring. See Application Section for more details.  
Output Voltage 1.  
out_FB1  
V
out1  
EPAD  
EPAD  
Exposed Pad is connected to Ground. Connect to GND plane on PCB.  
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4
NCV47823  
Table 2. MAXIMUM RATINGS  
Rating  
Symbol  
Min  
−42  
Max  
45  
Unit  
V
Input Voltage DC  
V
in  
Input Voltage (Note 1)  
U
60  
V
s*  
Load Dump − Suppressed  
Enable Input Voltage  
Output Voltage Monitoring  
CSO Voltage  
V
−42  
−0.3  
−0.3  
−0.3  
−1  
45  
10  
7
V
V
EN1,2  
V
out_FB1,2  
V
V
CSO1,2  
DE, CS and EF Voltages  
Output Voltage  
V
, V  
V
7
V
DE  
CS, EF  
V
out1,2  
40  
150  
150  
V
Junction Temperature  
Storage Temperature  
T
J
−40  
−55  
°C  
°C  
T
STG  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
1. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in  
production. Passed Class A according to ISO16750−1.  
Table 3. ESD CAPABILITY (Note 2)  
Rating  
Symbol  
ESD  
Min  
Max  
Unit  
ESD Capability, Human Body Model  
−2  
2
kV  
HBM  
2. This device series incorporates ESD protection and is tested by the following methods.  
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010)  
2
Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes < 50 mm due to  
the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform  
characteristic defined in JEDEC JS−002−2014.  
Table 4. LEAD SOLDERING TEMPERATURE AND MSL (Note 3)  
Rating  
Moisture Sensitivity Level  
Symbol  
Min  
Max  
Unit  
MSL  
1
3. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D  
Table 5. THERMAL CHARACTERISTICS (Note 4)  
Rating  
Symbol  
Value  
Unit  
°C/W  
Thermal Characteristics (single layer PCB)  
Thermal Resistance, Junction−to−Air (Note 5)  
Thermal Reference, Junction−to−Lead (Note 5)  
R
θJA  
R
ψJL  
52  
9.0  
°C/W  
Thermal Characteristics (4 layers PCB)  
Thermal Resistance, Junction−to−Air (Note 5)  
Thermal Reference, Junction−to−Lead (Note 5)  
R
θJA  
R
ψJL  
31  
10  
4. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.  
2
2
5. Values based on copper area of 645 mm (or 1 in ) of 1 oz copper thickness and FR4 PCB substrate. Single layer * according to JEDEC51.3,  
4 layers * according to JEDEC51.7  
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5
 
NCV47823  
Table 6. RECOMMENDED OPERATING RANGES  
Rating  
Symbol  
Min  
4.4  
10  
Max  
40  
Unit  
V
Input Voltage (Note 6)  
V
in  
Output Current Limit (Note 7)  
Junction Temperature  
I
350  
150  
mA  
°C  
LIM1,2  
T
J
−40  
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond  
the Recommended Operating Ranges limits may affect device reliability.  
6. Minimum V = 4.4 V or (V  
+ 0.5 V), whichever is higher.  
in  
out1,2  
7. Corresponding R  
is in range from 67.5 kΩ down to 2040 Ω  
CSO1,2  
Table 7. ELECTRICAL CHARACTERISTICS V = 13.5 V, V  
= 3.3 V, V = 0 V, R  
= 0 Ω, C = 1 μF, C  
= 1 μF, Min and Max  
in  
EN1,2  
DE  
CSO1,2  
in  
out1,2  
values are valid for temperature range −40°C v T v +150°C unless noted otherwise and are guaranteed by test, design or statistical correlation. Typical  
J
values are referenced to T = 25°C (Note 8)  
J
Parameter  
Test Conditions  
Symbol  
Min  
Typ  
Max Unit  
OUTPUTS  
Input to Output Differential Voltage  
V
= 8 V to 18 V  
V
mV  
in  
in−out1,2  
I
I
= 200 mA  
= 250 mA  
out1,2  
out1,2  
210  
230  
350  
400  
CURRENT LIMIT PROTECTION  
Current Limit  
V
out1,2  
= V – 1 V  
in  
I
350  
mA  
LIM1,2  
DISABLE AND QUIESCENT CURRENTS  
Disable Current  
V
I
= 0 V  
I
5
0.85  
15  
20  
1.5  
25  
40  
μA  
mA  
mA  
mA  
EN1,2  
DIS  
Quiescent Current, I = I − (I  
+I  
)
)
)
= I  
= 500 μA, V = 8 V to 18 V  
I
q
q
in  
out1 out2  
out1  
out1  
out1  
out2  
out2  
out2  
in  
Quiescent Current, I = I – (I  
+I  
I
I
= I  
= I  
= 200 mA, V = 8 V to 18 V  
I
q
in  
out1 out2  
in  
q
q
Quiescent Current, I = I – (I  
+I  
= 250 mA, V = 8 V to 18 V  
I
20  
q
in  
out1 out2  
in  
ENABLE  
Enable Input Threshold Voltage  
V
V
th(EN1,2)  
Logic Low (OFF)  
Logic High (ON)  
V
v 0.1 V  
0.99  
1.8  
1.9  
2.31  
out1,2  
V
out1,2  
w V – 1 V  
in  
Enable Input Current  
V
= 3.3 V  
I
2
7
20  
μA  
μs  
EN1,2  
EN1,2  
Turn On Time from  
I
= 100 mA  
t
on  
out1,2  
from Enable ON to V  
= V – 1 V  
25  
out1,2  
in  
OUTPUT CURRENT SENSE  
V
CSO_Ilim1,2  
CSO Voltage Level at Current Limit  
V
R
= V – 1 V  
2.474  
(−3 %)  
2.55  
2.626  
(+3 %)  
V
V
out1,2  
in  
= 3.3 kW  
CSO1,2  
CSO Transient Voltage Level  
R
I
= 3.3 kW  
V
CSO1,2  
CSO1,2  
3.3  
pulse from 10 mA to 350 mA, t = 1μs  
out1,2  
r
265  
V
V
= 2 V, I  
= 10 mA to 50 mA  
CSO1,2  
in  
out1,2  
= 8 V to 18 V, −40°C v T v +150°C  
(−15 %)  
(+15 %)  
J
285  
280  
V
V
= 2 V, I  
= 50 mA to 200 mA  
CSO1,2  
in  
out1,2  
Output Current to CSO Current Ratio  
I
/I  
out1,2 CSO1,2  
= 8 V to 18 V, −40°C v T v +150°C  
(−5 %)  
(+5 %)  
J
V
V
= 2 V, I  
= 200 mA to 350 mA  
CSO1,2  
in  
out1,2  
= 8 V to 18 V, −40°C v T v +150°C  
(−5 %)  
(+5 %)  
J
CSO Current at no Load Current  
REVERSE BIAS CURRENT  
Reverse Current  
V
V
V
= 0 V, I  
= 0 mA  
I
15  
μA  
CSO1,2  
out1,2  
CSO_off1,2  
= 0 V, V  
= 18 V, V  
= 0 V  
I
out_rev1,2  
−2  
−0.03  
mA  
in  
out1,2  
EN1,2  
DIAGNOSTICS  
Short to Ground (STG) Voltage  
Threshold in ON State  
= 4.4 V to 18 V  
= 3.3 kW  
V
2
2
3
3
4
4
V
V
in  
STG1,2  
R
CSO1,2  
Short To Battery (STB) Voltage  
Threshold in OFF state  
V
V
= 4.4 V to 18 V, I  
= 3.3 V  
= I  
out2  
= 0 mA  
V
STB1,2  
in  
DE  
out1  
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NCV47823  
V
V
= 4.4 V to 18 V, V = 3.3 V  
I
5.0  
5.7  
10  
25  
mA  
Open Load (OL) Current Threshold in  
OFF state  
in  
DE  
OL1,2  
= 4.4 V to 18 V  
V
/V  
6.0  
6.3  
Output Voltage to Output Feedback  
Voltege Ratio  
in  
out1,2 out_FB1,2  
V
V
V
th(DE)  
Diagnostics Enable Threshold Voltage  
Logic Low  
Logic High  
0.99  
1.8  
1.9  
2.31  
V
th(CS)  
Channel Select Threshold Voltage  
Logic Low  
0.99  
1.8  
1.9  
2.31  
Logic High  
Error Flag Low Voltage  
I
I
= −1 mA  
V
0.04  
0.4  
V
EF  
EF_Low  
THERMAL SHUTDOWN  
Thermal Shutdown Temperature  
(Note 9)  
= I  
out2  
= 90 mA, each channel  
T
SD1,2  
150  
175  
195  
°C  
out1  
measured separately  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T [ T . Low duty  
A
J
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible  
9. Values based on design and/or characterization.  
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7
 
NCV47823  
TYPICAL CHARACTERISTICS  
400  
400  
350  
V
in  
= 13.5 V  
V
in  
= 13.5 V  
I
= 350 mA  
out1,2  
350  
300  
250  
200  
150  
100  
T = 150°C  
J
300  
250  
200  
150  
100  
T = 25°C  
J
I
= 200 mA  
out1,2  
T = −40°C  
J
I
= 15 mA  
out1,2  
50  
0
50  
0
−40 −20  
0
20 40 60 80 100 120 140 160  
0
50  
100  
150  
, OUTPUT CURRENT (mA)  
out1,2  
200  
250 300  
350 400  
T , JUNCTION TEMPERATURE (°C)  
J
I
Figure 4. Input to Output Differential Voltage  
vs. Temperature  
Figure 5. Input to Output Differential Voltage  
vs. Output Current  
950  
900  
850  
800  
750  
700  
650  
600  
550  
500  
0
−1  
−2  
−3  
−4  
T = 150°C  
T = 25°C  
J
J
R
= 3.3 kW  
out1,2  
T = 25°C  
J
T = −40°C  
J
−5  
−6  
V
out1,2  
= (V − 1 V) V  
in  
−7  
0
5
10  
15  
20  
25  
30  
35  
40  
45  
−45 −40 −35 −30 −25 −20 −15 −10 −5  
0
V
IN  
, INPUT VOLTAGE (V)  
V , INPUT VOLTAGE (V)  
IN  
Figure 6. Output Current Limit vs. Input  
Voltage  
Figure 7. Input Current vs. Input Voltage  
(Reverse Input Voltage)  
400  
350  
300  
3.0  
2.5  
2.0  
1.5  
1.0  
T = −40°C to 150°C  
LIM1,2  
J
I
= 10 mA to 350 mA  
250  
200  
150  
100  
0.5  
0
50  
0
0
10 20 30 40 50 60 70 80 90 100 110  
, OUTPUT CURRENT (% of I  
0
5
10 15 20 25 30 35 40 45 50 55 60 65 70 75 80  
(kW)  
I
)
LIM1,2  
R
out1,2  
CSO1,2  
Figure 8. Output Current Limit vs. RCSO  
Figure 9. CSO Voltage vs. Output Current  
(% of ILIM  
)
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8
NCV47823  
TYPICAL CHARACTERISTICS  
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
40  
T = 25°C  
in  
T = 25°C  
in  
J
V
J
V
35  
= 13.5 V  
= 13.5 V  
30  
25  
20  
15  
10  
5
0
0
5
10  
15  
20  
0
50  
100  
I , OUTPUT CURRENT (mA)  
out1,2  
150  
200  
250  
300  
350  
I
, OUTPUT CURRENT (mA)  
out1,2  
Figure 10. Quiescent Current vs. Output  
Current (Low Load)  
Figure 11. Quiescent Current vs. Output  
Current (High Load)  
310  
T = 25°C  
in  
305  
300  
295  
290  
285  
280  
275  
270  
265  
J
V
= 13.5 V  
260  
255  
250  
10  
100  
, OUTPUT CURRENT (mA)  
1000  
I
out1,2  
Figure 12. Output Current to CSO Current  
Ratio vs. Output Current  
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9
NCV47823  
DEFINITIONS  
General  
Current Limit  
Current Limit is value of output current by which output  
voltage drops to or below V − 1 V value.  
All measurements are performed using short pulse low  
duty cycle techniques to maintain junction temperature as  
close as possible to ambient temperature.  
in  
Thermal Protection  
Input to Output Differential Voltage  
Internal thermal shutdown circuitry is provided to protect  
the integrated circuit in the event that the maximum junction  
temperature is exceeded. When activated at typically  
175_C, the regulator turns off. This feature is provided to  
prevent failures from accidental overheating.  
The Input to Output Differential Voltage parameter is  
defined for specific output current values and specified over  
Temperature range.  
Quiescent and Disable Currents  
Quiescent Current (I ) is the difference between the input  
q
Maximum Package Power Dissipation  
current (measured through the LDO input pin) and the  
output load current. If Enable pin is set to LOW the regulator  
reduces its internal bias and shuts off the output, this term is  
The power dissipation level is maximum allowed power  
dissipation for particular package or power dissipation at  
which the junction temperature reaches its maximum  
operating value, whichever is lower.  
called the disable current (I ).  
DIS  
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10  
NCV47823  
APPLICATIONS INFORMATION  
where  
R
CSO1,2 − current limit setting resistor  
Circuit Description  
VCSO1,2 − voltage at CSO pin proportional to I  
ILIM1,2 − current limit value  
The NCV47823 is an integrated dual High Side Switch  
(HSS) with current limit up to 350 mA per channel able to  
operate in Constant Current Source (CCS) mode depending  
on the output current load. The operation mode can be  
expressed by equations as follows:  
out1,2  
I
out1,2 − output current actual value  
RATIO − typical value of Output Current to CSO  
Current Ratio for particular output current  
range  
(Vin * Vin*out1,2  
)
(eq. 1)  
HSSmode :  
+ Iout1,2 t ILIM1,2  
Rload1,2  
CSO pin provides information about output current actual  
value. The CSO voltage is proportional to output current  
according to (eq. 3).  
or  
Once output current reaches its limit value (I  
) set by  
(Vin * Vin*out1,2  
)
LIM1,2  
CCSmode :  
+ Iout1,2 + ILIM1,2 (eq. 2)  
external resistor R  
than voltage at CSO pin is typically  
CSO  
Rload1,2  
2.55 V. Calculations of I  
or R  
values can be  
LIM1,2  
CSO1,2  
where I  
value is preset by R  
. In HSS mode of  
done using (eq. 6) and (eq. 7).  
LIM1,2  
CSO1,2  
operation (eq. 1) output current I  
may exceed I  
LIM1,2  
out1,2  
VCSO1,2_min  
ILIM1,2_min + RATIOmin  
 
(eq. 6)  
(reduced inrush current). Voltage on CSO pin is proportional  
to output current. The operation mode with PWM function  
of Enable inputs is provided by the circuit. The integrated  
current sense features diagnosis and system protection  
functionality. The HSS is protected by both current limit and  
thermal shutdown. Thermal shutdown occurs above 150°C  
to protect the IC during overloads and extreme ambient  
temperatures.  
RCSO1,2_max  
VCSO1,2_max  
(eq. 7)  
ILIM1,2_max + RATIOmax  
 
RCSO1,2_min  
where:  
RATIO – minimum value of Output Current to  
min  
CSO Current Ratio from electrical  
characteristics table and particular output  
current range  
Enable Inputs  
An enable pin is used to turn the channel on or off. By  
holding the pin down to a voltage less than 0.99 V, the output  
of the channel will be turned off. When the voltage on the  
enable pin is greater than 2.31 V, the output of the channel  
will be enabled to power its output to the regulated output  
voltage. The enable pins may be connected directly to the  
input pin to give constant enable to the output channel. As  
mentioned above, the circuit allows using both Enable  
inputs to obtain PWM of output current.  
RATIO  
– maximum value of Output Current to  
max  
CSO Current Ratio from electrical  
characteristics table and particular output  
current range  
V
V
– minimum value of CSO Voltage Level  
CSO1,2_min  
at Current Limit from electrical characteristics  
table  
– maximum value of CSO Voltage Level  
CSO1,2_max  
Setting the Output Current Limit  
The output current value can be set up to 350 mA by  
external resistor R  
at Current Limit from electrical characteristics  
table  
(see Figure 1).  
CSO1,2  
R
R
– minimum value of R  
with  
CSO1,2_min  
CSO1,2  
1
ǒ
Ǔ
respect its accuracy  
VCSO1,2 + Iout1,2 RCSO1,2  
 
 
(eq. 3)  
(eq. 4)  
RATIO  
– maximum value of R  
with  
CSO1,2_max  
CSO1,2  
RATIO  
2.55  
respect its accuracy  
ILIM1,2  
+
1
RCSO1,2  
2.55  
Designers should consider the tolerance of R  
during the design phase.  
CSO1,2  
RATIO  
1
RCSO1,2  
+
 
(eq. 5)  
ILIM1,2  
Diagnostic in OFF state  
The NCV47823 contains also circuitry for OFF state  
diagnostics for Short to Battery (STB) and Open Load (OL).  
There are internal current sources and Pull Down resistors  
providing additional cost savings for overall application by  
excluding external components and their assembly cost and  
saving PCB space and safe control IOs of a Microcontroller  
Unit (MCU). Simplified functional schematic and truth  
table is shown in Figure 13 and related flowchart in Figure  
14.  
The diagnostics in OFF state shall be performed for each  
channel separately. For diagnostics of Channel 1 the input  
CS pin has to be put logic low, for diagnostics of Channel 2  
the input CS pin has to be put logic high. Corresponding EN  
pin has to be used for control (EN1 for Channel 1 and EN2  
for Channel 2).  
www.onsemi.com  
11  
 
NCV47823  
I
PU  
Current source enabled via EN and DE pins  
Start  
PASS DEVICE is OFF in Diagnostics  
Mode in OFF state  
Diag. OFF. Set  
EN = L & DE = L  
V
out  
V
in  
R
PD1  
Diag. ON. Set  
EN = L & DE = H  
+
Comparator active only in  
Diagnostic state (DE = H).  
EN  
DE  
R
PD2  
V
REF_OFF  
HZ  
L
EF = ?  
EF  
Digital Diagnostic:  
EN − Enable (Logic Input)  
DE − Diagnostics Enable (Logic Input)  
EF − Error Flag Output (Open Collector Output)  
SPU ON. Set  
EN = H & DE = H  
to MCU’s digital input  
with pull−up resistor  
to MCU’s DIO supply rail  
HZ  
L
EN DE  
I
EF  
OFF HZ  
OFF  
OFF HZ  
ON  
ON HZ  
V
Diagnostic Status/Action  
EF = ?  
PU  
out  
L
L
L
Unknown  
V >V  
out out_OFF  
None (Diagnostic OFF)  
Short to Battery (STB)  
Check for Open Load (OL)  
Open Load (OL)  
H
H
H
H
L
L
V
<V  
No Failure  
Open Load  
Short to Battery  
out out_OFF  
H
H
L
V
>V  
out out_OFF  
V
<V  
No Failure (V  
close to 0V)  
_out  
out out_OFF  
Figure 13. Simplified Functional Diagram of OFF  
State Diagnostics (STB and OL)  
Figure 14. Flowchart for Diagnostics in OFF State  
Diagnostic in ON state  
Output Voltage Monitoring  
The Output Voltage net is connected to internal resistor  
divider. Output of the resistor divider is connected to  
Diagnostic in ON State provides information about  
Overcurrent or Short to Ground failures, during which the  
EF output is in logic low state. The diagnostics in ON state  
shall be performed for each channel separately. For  
diagnostics of Channel 1 the input CS pin has to be put logic  
low, for diagnostics of Channel 2 the input CS pin has to be  
put logic high. For detailed information see Diagnostic  
Features Truth Table in Table 8.  
V
pin and provides information about Output  
out_FB1,2  
Voltage Level according to (eq. 8).  
Vout1,2  
(eq. 8)  
Vout_FB1,2  
+
6
www.onsemi.com  
12  
 
NCV47823  
Table 8. DIAGNOSTIC FEATURES TRUTH TABLE  
Output Channel  
(V or V  
Diagnostic Output  
(CSO1 or CSO2)  
Error Flag  
(EF)  
)
out2  
Operational Status  
Disabled  
EN (note 10)  
DE  
L
CS  
out1  
L
L
X
Low (~0 V)  
High(V ~V )  
Low (~0 V)  
Low (~0 V)  
Low (~0 V)  
Low (~0 V)  
Low (~0 V)  
HZ  
L (Note 11)  
L (Note 12)  
HZ (Note 12)  
HZ  
Short to Battery (OFF)  
Open Load (OFF)  
Normal (OFF)  
H
H
H
L
L/H (Note 13)  
L/H (Note 13)  
L/H (Note 13)  
L/H (Note 13)  
L/H (Note 13)  
out  
in  
H
H
H
H
High(V ~V )  
out in  
Low (~0 V)  
High(V ~V )  
Open Load (ON)  
Switch  
out  
in  
L
I
<I  
Proportional to I  
HZ  
out out_SET  
out  
(
5%) (Note 15)  
Current Source  
Short to Ground  
H
H
L
L
L/H (Note 13)  
L/H (Note 13)  
I
=I  
High (~2.55 V)  
High (~2.55 V)  
HZ  
out out_SET  
Low (~0 V)  
L (Note 14)  
10.State of EN pin of appropriate channel  
11. Internal current source turned OFF (between V and V of appropriate channel)  
out  
in  
12.Internal current source turned ON (between V and V of appropriate channel)  
out  
in  
13.CS = L means CH1 diagnostics and CS = H means CH2 diagnostics (e.g. when CS = L and EF = L then failure at CH1 observed, when CS  
= H and EF = L then failure at CH2 observed)  
14.STG is considered as fault when V < 3 V  
out  
15.Valid for I = 50 mA to 350 mA. For I = 10 mA to 50 mA range proportional to I  
( 15%).  
out  
out  
out  
Thermal Considerations  
As power in the device increases, it might become  
necessary to provide some thermal relief. The maximum  
power dissipation supported by the device is dependent  
upon board design and layout. Mounting pad configuration  
on the PCB, the board material, and the ambient temperature  
affect the rate of junction temperature rise for the part. When  
the device has good thermal conductivity through the PCB,  
the junction temperature will be relatively low with high  
power applications. The maximum dissipation the device  
can handle is given by:  
or  
(eq. 11)  
ǒ
Ǔ
ǒ
Ǔ
PD(MAX) ) Vout1   Iout1 ) Vout2   Iout2  
Vin(MAX)  
[
Iout1 ) Iout2 ) Iq  
130  
120  
110  
100  
90  
1 oz, Single Layer  
ƪT  
ƫ
J(MAX) * TA  
80  
(eq. 9)  
PD(MAX)  
+
RqJA  
70  
60  
Since T is not recommended to exceed 150_C, then the  
2 oz, Single Layer  
J
2
device soldered on 645 mm , 1 oz copper area, FR4 can  
50  
40  
dissipate up to 2.38 W when the ambient temperature (T )  
A
1 oz, 4 Layer  
2 oz, 4 Layer  
200 300  
COPPER HEAT SPREADER AREA (mm )  
is 25_C. See Figure 15 for R  
versus PCB area. The power  
dissipated by the device can be calculated from the  
θJA  
30  
20  
0
100  
400  
500  
600 700  
following equations:  
2
(eq. 10)  
Figure 15. Thermal Resistance vs. PCB Copper Area  
ǒ
Ǔ
ǒ
Ǔ
ǒ
Ǔ
PD [ Vin Iq@Iout1,2 ) Iout1 Vin−Vout1 ) Iout2 Vin−Vout2  
www.onsemi.com  
13  
 
NCV47823  
Hints  
case of long PCB track or wire connected to CSO pin it is  
V
and GND printed circuit board traces should be as  
recommended to use RC filter for noise suppression (see  
Figure 16 and Table 9) in cost of higher inrush current. The  
R value of the RC filter can be higher than value listed in  
Table 9, depending on acceptable of RC time constant. The  
higher is R value the lower is inrush current. Value of C =  
10 nF is optimized for noise suppression and as low as  
possible inrush current.  
in  
wide as possible. When the impedance of these traces is  
high, there is a chance to pick up noise or cause the regulator  
to malfunction. Place external components, especially the  
output capacitor, as close as possible to the device and make  
traces as short as possible.  
The Output Voltage Monitoring Output is high impedance  
output (see Figure 2) and during OFF state diagnostics it  
may be prone to couple a noise via PCB track or wire.  
Disturbing may appear as Error Flag Output oscillation  
when Output Voltage Level is close to Short to Battery  
threshold. To improve robustness connect capacitor  
(typically 10 nF) between each V  
pin and GND as  
out_FB1,2  
close as possible to the V  
pins.  
out_FB1,2  
The Current Sense Output is internally connected to an  
input of error amplifier and may be prone to couple a noise  
via long PCB track or wire (e.g. connection to an ADC). In  
Figure 16. RF Filter Connection  
Table 9. INRUSH CURRENT AND RECOMMENDED RC VALUES  
(Test Conditions: V = 13.5 V, V = short to GND, V = pulse from 0 V to 5 V)  
in  
out  
EN  
Rcso (kW)  
Calculated Current Limit Inrush Current without RC  
minimum R (kW)  
C (nF)  
Inrush Current with RC  
(mA) with minimum R  
(mA) (Note 16)  
(mA)  
68  
15  
11  
75  
22  
22  
33  
33  
33  
33  
22  
15  
10  
10  
10  
10  
10  
10  
10  
10  
65  
51  
108  
133  
159  
211  
248  
308  
376  
124  
145  
182  
231  
270  
338  
415  
8.2  
5.1  
3.9  
3.3  
2.7  
2.2  
93  
150  
183  
216  
264  
325  
16.Calculated ILIM is for Vout = Vin − 1 V.  
ORDERING INFORMATION  
Device  
Marking  
Package  
Shipping  
NCV47823PAAJR2G  
Line1: NCV4  
Line2: 7823  
TSSOP−14 EP  
(Pb−Free)  
2500 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D  
www.onsemi.com  
14  
 
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
TSSOP14 EP  
CASE 948AW  
ISSUE C  
14  
1
DATE 09 OCT 2012  
SCALE 1:1  
NOTES:  
NOTE 6  
B
14  
8
b
1. DIMENSIONING AND TOLERANCING PER ASME  
Y14.5M, 1994.  
b1  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION SHALL BE  
0.07 mm MAX. AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER RADI-  
US OF THE FOOT. MINIMUM SPACE BETWEEN PRO-  
TRUSION AND ADJACENT LEAD IS 0.07.  
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH,  
PROTRUSIONS OR GATE BURRS. MOLD FLASH,  
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED  
0.15 mm PER SIDE. DIMENSION D IS DETERMINED AT  
DATUM H.  
c1  
E1  
e
E
NOTE 5  
SECTION BB  
c
NOTE 8  
PIN 1  
1
7
0.20 C B A  
REFERENCE  
2X 14 TIPS  
5. DIMENSION E1 DOES NOT INCLUDE INTERLEAD  
FLASH OR PROTRUSIONS. INTERLEAD FLASH OR  
PROTRUSIONS SHALL NOT EXCEED 0.25 mm PER  
SIDE. DIMENSION E1 IS DETERMINED AT DATUM H.  
6. DATUMS A AND B ARE DETERMINED AT DATUM H.  
7. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM  
THE SEATING PLANE TO THE LOWEST POINT ON THE  
PACKAGE BODY.  
TOP VIEW  
NOTE 6  
A
D
A2  
NOTE 4  
A
DETAIL A  
0.05 C  
B
M
0.10 C  
8. SECTION BB TO BE DETERMINED AT 0.10 TO 0.25 mm  
FROM THE LEAD TIP.  
14X  
b
0.10 C B  
S
S
C
SEATINGc  
PLANE  
14X  
A
MILLIMETERS  
NOTE 3  
B
DIM MIN  
MAX  
1.20  
0.15  
1.05  
0.30  
0.25  
0.20  
0.16  
5.10  
3.62  
END VIEW  
A
A1  
A2  
b
b1  
c
c1  
D
D2  
E
−−−−  
0.05  
0.80  
0.19  
0.19  
0.09  
0.09  
4.90  
3.09  
SIDE VIEW  
D2  
H
L2  
6.40 BSC  
E2  
E1  
E2  
e
4.30  
2.69  
0.65 BSC  
4.50  
3.22  
A1  
NOTE 7  
L
GAUGE  
PLANE  
C
DETAIL A  
L
L2  
M
0.45  
0
0.75  
0.25 BSC  
8
_
_
BOTTOM VIEW  
GENERIC  
MARKING DIAGRAM*  
RECOMMENDED  
SOLDERING FOOTPRINT*  
14X  
14  
3.40  
1.15  
XXXX  
XXXX  
ALYWG  
G
1
3.06  
6.70  
XXXX = Specific Device Code  
A
L
= Assembly Location  
= Wafer Lot  
Y
W
G
= Year  
= Work Week  
= PbFree Package  
1
14X  
0.42  
0.65  
PITCH  
(Note: Microdot may be in either location)  
DIMENSIONS: MILLIMETERS  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “ G”,  
may or may not be present.  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON66474E  
TSSOP14 EP, 5.0X4.4  
PAGE 1 OF 1  
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
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