NCV7422MW0R2G [ONSEMI]
双路 LIN 收发器;
| 型号： | NCV7422MW0R2G |
| 厂家： | 
ONSEMI |
| 描述： | 双路 LIN 收发器 |
| 文件： | 总12页 (文件大小：288K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LIN Transceiver, Dual
NCV7422
Description
The NCV7422 is a two channel physical layer device using the
Local Interconnect Network (LIN) protocol. It allows interfacing of
two independent LIN physical buses and the LIN protocol controllers.
The device is compliant to ISO 17987−4, LIN2.2a, LIN2.2, LIN2.1,
LIN 2.0 and SAEJ2602 standards.
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The NCV7422 LIN device is a member of the in−vehicle
networking (IVN) transceiver family.
MARKING
DIAGRAM
The LIN bus is designed to communicate low−rate data from control
devices such as door locks, mirrors, car seats and sunroofs at the
lowest possible cost. The bus is designed to eliminate as much wiring
as possible and is implemented using a single wire in each node. Each
node has a slave MCU−state machine that recognizes and translates
the instructions specific to that function.
1
NV74
22−0
ALYW
G
DFN14
MW SUFFIX
CASE 507AC
The main attraction of the LIN bus is that all the functions are not
time critical and usually relate to passenger comfort.
NV7422−0 = Specific Device Code
Features
A
L
= Assembly Location
= Wafer Lot
• DFN−14 Green Package (Pb−Free)
LIN−Bus Transceiver
• Compliant to ISO 17987−4 (Backwards Compatible to LIN
Specification rev. 2.x, 1.3) and SAE J2602
• Bus Voltage 42 V
• Transmission Rate 1 kbps to 20 kbps
• TxD Timeout Function
• Integrated Slope Control
Y
W
G
= Year of Production, Last Number
= Work Week
= Pb−Free Package
PIN CONNECTIONS
RxD1
1
2
3
4
5
6
7
14
13
12
11
10
9
NC
EN1
TxD1
RxD2
EN2
LIN1
NC
Protection
• Thermal Shutdown
• Undervoltage Detection
• Bus Pins Protected Against Transients in an Automotive Environment
NC
VBB
LIN2
GND
NC
Modes
TxD2
8
• Normal Mode: LIN Transceiver Enabled, Communication via the
Bus is Possible
• Sleep Mode: LIN Transceiver Disabled, the Consumption from V
BB
is Minimized
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 10 of this data sheet.
• Standby Mode: Transition Mode Reached after Wake−Up Event on
LIN Bus
Compatible
• Pin−Compatible with NCV7329 DFN8 Package
• K−line Compatible
Quality
• Wettable Flank Package for Enhanced Optical Inspection
• AEC−Q100 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
August, 2019 − Rev. 0
NCV7422/D
NCV7422
BLOCK DIAGRAM
NCV7422
Thermal
Shutdown
VBB
Undervoltage
POR
Osc
VINT
GND
State &
Wake−up
Control
EN1
ISLEEP
Time outs
RxD1
COMP
Filter
LIN1
Slope
Control
Driver
Control
TxD1
Channel1
EN2
RxD2
TxD2
Channel2
LIN2
Figure 1. Block Diagram
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2
NCV7422
TYPICAL APPLICATION DIAGRAM
VBAT
VBB
VCC
3.3 or 5 V
5.1k
VBB
VDD
1k
1k
RxD1
RxD2
TxD1
TxD2
NCV7422
MCU
LIN1
LIN2
LIN1
LIN2
EN1
EN2
(*)
(*)
1nF
1nF
GND
GND
GND
(*) Master C = 1 nF; Slave C = 220 pF
KL30
LIN BUS
1,2
KL31
Figure 2. Application Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin
DFN14
Name
RxD1
EN1
Description
1
2
Receive Data Output 1; Low in Dominant State; Open−Drain Output
Enable Input 1; Transceiver in Normal Operation Mode when High
Transmit Data Input 1; Low for Dominant State; Pull−Down to GND
Receive Data Output 2; Low in Dominant State; Open−Drain Output
Enable Input 2; Transceiver in Normal Operation Mode when High
Not Connected
3
TxD1
RxD2
EN2
4
5
6
NC
7
TxD2
GND
LIN2
Transmit Data Input 2; Low for Dominant State; Pull−Down to GND
Ground
8
9
LIN Bus Output / Input Channel 2
10
11
12
13
14
−
V
Battery Supply Input
BB
NC
NC
Not Connected
Not Connected
LIN1
NC
LIN Bus Output / Input Channel 1
Not Connected
EP
Exposed Pad. Recommended to connect to GND or Left Floating in Application
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3
NCV7422
FUNCTIONAL DESCRIPTION
Overall Function Description
LIN wiring to the battery, the transmitter is disabled and
releases LIN buses to recessive. Once the junction
temperature decreases back below the thermal shutdown
release level, the transmission can be enabled again –
however, to avoid thermal oscillations, first a High logical
level on TxDx must be encountered before the transmitter is
enabled.
As required by SAE J2602, the transceiver must behave
safely below its operating range – it shall either continue to
transmit correctly (according its specification) or remain
silent (transmit a recessive state regardless of the TxDx
signal). A battery monitoring circuit in NCV7422
deactivates the transmitters in the Normal mode if the VBB
level drops below MONL_VBB. Transmission is enabled
again when VBB reaches MONH_VBB. The internal logic
remains in the normal mode and the reception from the LIN
line is still possible even if the battery monitor disables the
transmission. Although the specifications of the monitoring
and power−on−reset levels are overlapping, it’s ensured by
the implementation that the monitoring level never falls
below the power−on−reset level.
LIN is a serial communication protocol that efficiently
supports the control of mechatronic nodes in distributed
automotive applications.
The NCV7422 contains two LIN transmitters, LIN
receivers, power−on−reset (POR) circuit and thermal
shutdown (TSD). The LIN transmitters are optimized for a
maximum specified transmission speed of 20 kbps.
Table 2. OPERATING MODES
Pin ENx
x
Mode
Unpowered
Sleep
Pin RxDx
Floating
Floating
LIN bus
OFF; Floating
OFF; Floating
OFF; 30 kW
Low
Low
Standby
Low indicates
wakeup
High
Normal
LOW: dominant
HIGH: recessive
ON; 30 kW
Unpowered Mode
As long as V remains below its power−on−reset level,
BB
the chip is kept in a safe unpowered state. LINs transmitters
are inactive, LINx pins are left floating. Pins RxDx remain
floating.
The Normal mode can be entered from either standby or
sleep mode when ENx pin is High for longer than t
.
ENABLE
When the transition is made from standby mode, RxDx is
put high−impedance immediately after ENx becomes High
The unpowered state will be entered from any other state
when
V
falls below its power−on−reset level
(before the expiration of t
filtering time). This
BB
ENABLE
(PORL_VBB). When V rises above power−on−reset high
excludes signal conflicts between the standby mode pin
settings and the signals required to control the chip in the
normal mode after local wake−up vs. High logical level on
TxDx required to send a recessive symbol on LIN.
BB
threshold level (PORH_VBB) the NCV7422 switches to
Sleep mode.
Normal Mode
In normal mode, the full functionality of the LIN
transceivers are available. Transceivers can transmit and
receive data via LIN bus with speed up to 20 kbps. Data
according the state of TxDx inputs are sent to the
corresponding LIN bus while pin RxDx reflects the logical
symbol received on the LIN bus − high−impedant for
recessive and Low for dominant. A 30 kW resistor in series
with reverse−protection diode is internally connected
Sleep Mode
Sleep mode provides low current consumption. The LIN
transceiver is inactive and the battery consumption is
minimized.
This mode is entered in one of the following ways:
• After voltage level at V pin rises above its
BB
power−on−reset level (PORH_VBB). In this case, RxD
pins remain high−impedant.
between LIN and V pins.
BB
• After assigning Low logical level to pin ENx for longer
than tDISABLE while corresponding NCV7422 transceiver
is in Normal mode. The LIN transmit path is
immediately disabled when EN pin goes low.
The signal on pin TxDx passes through a timer, which
releases the bus in case the TxDx remains low for longer
than tTxD_TIMEOUT. It prevents the LIN bus being permanently
driven dominant and thus blocking all subsequent
communication due to a failure of the application (e.g.
software error). The transmission can continue once the
TxDx returns to High logical level.
Standby Mode
Standby mode is entered from Sleep mode when remote
wake−up event occurred. Low level on RxDx pins indicates
the interrupt flag for the microcontroller.
In case the junction temperature increases above the
thermal shutdown threshold (T
), e.g. due to a short of the
J(sd)
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4
NCV7422
VBB Below Reset Level
Unpowered
(VBB Below Reset Level)
−LIN Transceivers: OFF
−LIN Term: Floating
−RxD1,2: Floating
VBB Above Reset Level
Sleep Mode
−LINx Transceiver: OFF
−LINx Term.: Current
source
ENx = High for t > T_enable
LINx, rising edge
after t > tLIN_WAKE
−RxDx: Floating
ENx = Low for t>
T_disable
Normal Mode
−LINx Transceiver: ON
−LINx Term.: 30 kΩ pull−up
−RxDx: Receives LINx
Data
Standby Mode
ENx = High for t > T_enable
−LINx Transceiver: OFF
W pull
−LINx Term.: 30 k −up
−RxDx: Low
Figure 3. State Diagram
LINx
Detection of Remote Wake−Up
VBB
LIN recessive level
T_LIN_wake
Sleep Mode
60% VBB
40% VBB
LIN dominant level
t
Standby Mode
Figure 4. Remote (LIN) Wake−up Detection
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5
NCV7422
ELECTRICAL CHARACTERISTICS
Definitions
All voltages are referenced to GND unless otherwise specified. Positive currents flow into the IC. Sinking current means
the current is flowing into the pin; sourcing current means the current is flowing out of the pin.
Table 3. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
−0.3
−42
−42
−0.3
−8
Max
+42
+42
+42
+7
Unit
V
V
BB
Supply Voltage on Pin V
BB
V
LINx
LIN Bus Voltage with respect to GND
LIN Bus Voltage with respect to V
V
V
BB
V
DC Voltage on Pins (ENx, RxDx, TxDx)
Human Body Model (LINx pin) (Note 1)
Human Body Model (All pins) (Note 1)
Charge Device Model (All pins) (Note 2)
Machine Model (All pins) (Note 3)
V
_DIG_IO
V
ESD
+8
kV
kV
V
−4
+4
−750
−200
−8
+750
+200
+8
V
V
Electrostatic Discharge Voltage (LINx Pin) System Human Body Model
(Note 4) Conform to IEC 61000−4−2
kV
ESDIEC
T
Junction Temperature
−40
−55
+150
+150
°C
°C
°C
−
J
T
Storage Temperature
STG
T
SLD
Peak Soldering Temperature (Note 5)
Moisture Sensitivity Level for DFNW14
+260
1
MSL
DFN
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Standardized human body model electrostatic discharge (ESD) pulses in accordance to EIA−JESD22. Equivalent to discharging a 100 pF
capacitor through a 1.5 kW resistor.
2. Standardized charged device model ESD pulses when tested according to AEC−Q100−011.
3. Equivalent to discharging a 200 pF capacitor through a 10 W resistor and 0.75 mH coil.
4. Equivalent to discharging a 150 pF capacitor through a 330 W resistor. System HBM levels are verified by an external test−house.
5. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Table 4. THERMAL CHARACTERISTICS
Symbol
Parameter
Conditions
Value
100
51
Unit
K/W
K/W
R
Thermal Resistance Junction−to−Air, JEDEC 1S0P PCB
Thermal Resistance Junction−to−Air, JEDEC 2S2P PCB
Free air; (Note 6)
Free air; (Note 7)
q
JA_1
R
q
JA_2
6. Test board according to EIA/JEDEC Standard JESD51−3, signal layer with 10% trace coverage.
7. Test board according to EIA/JEDEC Standard JESD51−7, signal layers with 10% trace coverage.
ELECTRICAL CHARACTERISTICS
Table 5. ELECTRICAL CHARACTERISTICS (V = 5 V to 18 V; T = −40 to +150°C; Typical values are given at V = 12 V and
BB
J
BB
T = 25°C Bus Load = 500 W (V to LIN); unless otherwise specified.)
J
BB
Symbol
SUPPLY (Pin V
Parameter
Conditions
Min
Typ
Max
Unit
)
BB
V
Battery Supply
5.0
0.4
4.0
−
18
2.4
13
V
BB
BB
I
Battery Supply Current –
Both Channels
Normal Mode; LIN recessive
1.1
7.8
mA
mA
Normal Mode; TxDx = Low, both
LINs Dominant
Sleep and Standby Mode;
−
−
6.0
6.0
10
15
mA
mA
T < 85°C
J
V
= V
BB
LIN recessive; LINx
Sleep and Standby Mode;
V
= V
BB
LIN recessive; LINx
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6
NCV7422
Table 5. ELECTRICAL CHARACTERISTICS (V = 5 V to 18 V; T = −40 to +150°C; Typical values are given at V = 12 V and
BB
J
BB
T = 25°C Bus Load = 500 W (V to LIN); unless otherwise specified.)
J
BB
Symbol
POR AND V MONITOR
Parameter
Conditions
Min
Typ
Max
Unit
BB
PORH_V
Power−on Reset; High Level on V
V
BB
V
BB
V
BB
V
BB
Rising
2.7
1.3
3.2
3.0
3.5
2.1
4.2
4.0
4.4
2.7
5.0
4.8
V
V
V
V
BB
BB
BB
PORL_V
Power−on Reset; Low Level on V
Battery Monitoring High Level
Battery Monitoring Low Level
Falling
Rising
Falling
BB
MONH_V
BB
MONL_V
BB
TRANSMITTER DATA INPUT (Pin TxDx)
V
Low Level Input Voltage
−0.3
2.0
50
−
−
+0.8
7.0
V
V
IL_TxD
IH_TxD
PD_TxD
V
High Level Input Voltage
Pull−down Resistor on TxDx Pin
R
125
325
kW
RECEIVER DATA OUTPUT (Pin RxDx)
I
Low Level Output Current
High Level Leakage Current
V
RXDX
= 0.4V
2.0
−
−
−
mA
OL_RxD
I
−1.0
+1.0
mA
OH_RxD
ENABLE INPUT (Pin ENx)
V
Low Level Input Voltage
High Level Input Voltage
Pull−down Resistor to Ground
−0.3
2.0
−
−
+0.8
7.0
V
V
IL_EN
IH_EN
PD_EN
V
R
100
250
650
kW
LIN BUS LINE (Pin LINx)
V
Bus Voltage for Dominant State
Bus Voltage for Recessive State
Receiver Threshold
−
−
0.4V
−
V
V
BUS_DOM
BB
V
0.6V
−
BUS_REC
REC_DOM
BB
BB
BB
V
LIN Bus Recessive − Dominant
0.4V
0.4V
−
0.6V
0.6V
V
BB
BB
V
V
V
Receiver Threshold
LIN Bus Dominant – Recessive
−
V
REC_REC
REC_CNT
REC_HYS
Receiver Centre Voltage
Receiver Hysteresis
(V
(V
+ V
) / 2
)
0.475V
0.050V
−
0.500V
0.525V
0.175V
1.2
V
REC_DOM
REC_REC
REC_REC
BB
BB
BB
− V
−
−
−
−
V
REC_DOM
BB
BB
V
Dominant Output Voltage
Normal mode; V = 7 V
V
LIN_DOM
BB
Normal mode; V = 18 V
−
2.0
V
BB
I
_
Communication not Affected
V
= GND = 12 V;
LIN
−1.0
+1.0
mA
BUS no_GND
BB
0 < V < 18 V
I
_
LIN Bus Remains Operational
Current limitation for Driver
V
= GND = 0 V; 0 < V < 18 V
−
−
−
5.0
200
−
mA
mA
mA
mA
BUS no_VBB
BB
LIN
I
Dominant State; V
= V
BB_MAX
40
BUS_LIM
LIN
I
Receiver Leakage current; Driver OFF
V
LIN
= 0 V; V = 12 V
−1
−
BUS_PAS_dom
BB
Isleep
Receiver Leakage current;
see Figure 1
Sleep mode; VLIN = 0 V;
VBB = 12 V
−16
−8.0
−3.0
I
Receiver Leakage current; Driver
OFF; (Note 8)
TxD = High; 8 V < V < 18 V;
−
−
20
mA
BUS_PAS_rec
BB
8 V < V <18 V; V
≥ V
LIN
LIN
BB
V
Voltage Drop on Serial Diode
Internal Pull−up Resistance
Capacitance on Pin LIN (Note 8)
Voltage drop on DS, see Figure 1
see Figure 1
0.4
20
−
0.7
30
20
1.0
60
30
V
SERDiode
R
kW
pF
SLAVE
C
LIN
THERMAL SHUTDOWN
Shutdown Junction Temperature
T
J(sd)
Temperature Rising
160
180
200
°C
8. Values based on design and characterization. Not tested in production.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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7
NCV7422
Table 6. AC CHARACTERISTICS (V = 5 V to 18 V; T = −40 to +150°C; unless otherwise specified. For the transmitter
BB
J
parameters, the following bus loads are considered: L1 = 1 kW / 1 nF; L2 = 660 W / 6.8 nF; L3 = 500 W / 10 nF)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
LIN TRANSMITTER
D1
D2
D3
D4
Duty Cycle 1 = t
See Figure 5
/ (2xt );
TH
TH
= 0.744 x V
BB
0.396
−
0.500
BUS_REC(MIN)
BIT
REC(max)
DOM(max)
= 0.581 x V
BB
t
= 50 ms
BIT
V
BB
= 5 V to 18 V
Duty Cycle 2 = t
See Figure 5
/ (2xt );
TH
TH
= 0.422 x V
0.500
0.417
0.500
−
−
−
0.581
0.500
0.590
BUS_REC(MAX)
BUS_REC(MIN)
BUS_REC(MAX)
BIT
REC(max)
DOM(max)
BB
BB
= 0.284 x V
t
= 50 ms
BIT
V
BB
= 5 V to 18 V
Duty Cycle 3 = t
See Figure 5
/ (2xt );
TH
TH
= 0.778 x V
BIT
REC(max)
DOM(max)
BB
BB
= 0.616 x V
t
= 96 ms
BIT
V
BB
= 5 V to 18 V
Duty Cycle 4 = t
See Figure 5
/ (2xt );
TH
TH
= 0.389 x V
BIT
REC(max)
DOM(max)
BB
BB
= 0.251 x V
t
= 96 ms
BIT
V
BB
= 5 V to 18 V
t
Propagation Delay of TxDx to LINx.
TxDx High to Low; See Figure 7
−
−
−
−
14
14
ms
ms
TX_PROP_DOWN
t
Propagation Delay of TxDx to LINx.
TxDx Low to High; See Figure 7
TX_PROP_UP
LIN RECEIVER
t
Propagation Delay of Receiver Rising
and falling Edge (see Figure 6)
R
R
= 2.4 kW; C
= 2.4 kW; C
= 20 pF
= 20 pF;
0.1
−
−
6.0
ms
ms
RX_PD
RxDx
RxDx
RxDx
t
Propagation Delay Symmetry
−2.0
+2.0
REC_SYM
RxDx
Rising Edge with Respect to
Falling Edge
MODE TRANSITIONS AND TIMEOUTS
t
Duration of LIN Dominant for Detection
of Wake−up via LIN Bus (See Figure 4)
Sleep Mode
40
70
150
ms
LIN_WAKE
t
TxDx Dominant Time−out
Normal Mode, TxDx = Low
14
15
25
30
46
75
ms
TxD_TIMEOUT
t
Time from Rising Edge of ENx pin to the
moment when the Transmitter is able to
correctly transmit
ms
INIT_NORM
t
Duration of ENx pin in High Level State
for transition to Normal Mode
11
11
20
20
10
55
55
40
ms
ms
ms
ENABLE
t
Duration of ENx pin in Low Level State
for transition to Sleep Mode
DISABLE
t
Delay from LIN Bus Dominant to Re-
cessive Edge to Entering of Standby
Mode after Valid LIN Wake−up
Sleep Mode
5.0
TO_STB
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8
NCV7422
MEASUREMENT SETUPS AND DEFINITIONS
TxDx
LINx
tBIT
tBIT
50%
t
tBUS_dom(max)
tBUS_rec(min)
THRec(max)
THDom(max)
Thresholds of
receiving node 1
THRec(min)
THDom(min)
Thresholds of
receiving node 2
t
tBUS_dom(min)
tBUS_rec(max)
Figure 5. LIN Transmitter Duty Cycle
LINx
Vbb
60% Vbb
40% Vbb
t
tRX_PD
RxDx
tRX_PD
50%
t
Figure 6. LIN Receiver Timing
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NCV7422
TxDx
tBIT
tBIT
50 %
t
t
LINx
Vbb
60 % Vbb
40 % Vbb
RB20180511
ttx_prop_down
ttx_prop_up
Figure 7. LIN Transmitter Timing
ORDERING INFORMATION
Device
†
Description
Temperature Range
Package
Shipping
NCV7422MW0R2G
LIN Transceiver, Dual
−40°C to 150°C
DFN14
(Pb−Free)
5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFNW14 4.5x3, 0.65P
CASE 507AC
ISSUE D
1
DATE 03 JUL 2018
SCALE 2:1
NOTES:
L3
L3
A B
D
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMESNION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. THIS DEVICE CONTAINS WETTABLE FLANK
DESIGN FEATURES TO AID IN FILLET FOR-
MATION ON THE LEADS DURING MOUNTING.
L
L
DETAIL A
PIN ONE
REFERENCE
ALTERNATE
CONSTRUCTION
E
EXPOSED
COPPER
MILLIMETERS
TOP VIEW
DIM MIN
NOM
0.85
−−−
MAX
0.90
0.05
A
A1
A3
A4
b
D
D2
E
E2
e
K
L
L3
0.80
−−−
A
DETAIL B
0.10
C
C
0.20 REF
−−−
0.30
4.50
4.20
PLATING
A1
A4
0.10
0.25
4.40
4.13
2.90
1.53
−−−
0.35
4.60
4.27
3.10
1.67
C
C
DETAIL B
A4
0.08
SEATING
PLANE
A3
NOTE 4
C
3.00
1.60
SIDE VIEW
0.65 BSC
0.30 REF
0.40
DETAIL A
0.35
0.00
0.45
0.10
D2
L3
0.05
PLATED
SURFACES
14X
L
1
7
SECTION C−C
GENERIC
MARKING DIAGRAM*
E2
XXXXX
XXXXX
AYWWG
G
8
14
K
14X b
0.10
0.05
e
M
M
C A B
NOTE 3
C
BOTTOM VIEW
XXXXX = Specific Device Code
A
Y
= Assembly Location
= Year
RECOMMENDED
SOLDERING FOOTPRINT*
WW
G
= Work Week
= Pb−Free Package
(*Note: Microdot may be in either location)
14X
4.35
4.23
0.75
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”, may
or may not be present. Some products may
not follow the Generic Marking.
14
8
7
3.60 1.75
PACKAGE
OUTLINE
1
0.65
PITCH
14X
0.33
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14979G
DFNW14 4.5x3, 0.65P
PAGE 1 OF 1
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