NCV8182CDTRKG [ONSEMI]
Tracking Regulator/Line Driver - Micropower, Low Dropout 200 mA;
| 型号： | NCV8182CDTRKG |
| 厂家： | 
ONSEMI |
| 描述： | Tracking Regulator/Line Driver - Micropower, Low Dropout 200 mA 输出元件 调节器 |
| 文件： | 总12页 (文件大小：244K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Tracking Regulator/Line
Driver - Micropower, Low
Dropout
200 mA
NCV8182C
www.onsemi.com
The NCV8182C is a monolithic integrated low dropout tracking
regulator designed to provides an adjustable buffered output voltage
that closely tracks the reference input. The output delivers up to
250 mA while being able to be configured higher, lower or equal to the
reference voltages.
8
1
5
1
The device has been designed to operate over a wide input and
SOIC−8
CASE 751−07
(In Development)
V
REF/EN
operating voltage range while still maintaining excellent DC
DPAK−5
CASE 175AA
characteristics. The NCV8182C is protected from reverse battery,
short circuit and thermal runaway conditions. The device also can
withstand load dump transients and reverse polarity input voltage
transients. This makes it suitable for use in automotive environments.
MARKING DIAGRAMS
The V
lead serves two purposes. It is used to provide the
REF/EN
input voltage as a reference for the output and it also can be pulled low
to place the device in sleep mode.
8
1
8182C
ALYW
G
8182CG
ALYWW
Features
• Output Voltage Tracking Tolerance: max. 10 mV
• Output Current: up to 250 mA
1
5
• Low Disable Current (Typ. 20 mA @ V
= 0 V)
REF/EN
A
WL, L
Y
= Assembly Location
= Wafer Lot
• Low Dropout Voltage (Typ. 240 mV @ 200 mA)
Operating Voltage Range
= Year
• Wide Input and V
REF/EN
WW, W = Work Week
G or G
• Protection Features:
= Pb−Free Device
♦ Current Limit
♦ Thermal Shutdown
♦ Reverse Polarity Protection
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
• Internally Fused Leads in SOIC−8 Package
• AEC−Q100 Grade 1 Qualified and PPAP Capable
• These are Pb−Free Devices
Typical Applications (For safety applications refer to Figure 26)
• Engine Control Unit, Transmission Control Unit, Comfort Controls,
Infotainment, Sensors, Local Controls, Tire Pressure Monitor,
Machine Controls, Switch and Sensor Reading, Operator Interface
Control
Input
Output
V
out
V
in
C
C
in
out
1 mF
10 mF
NCV8182C
GND
V
REF
ADJ
V
REF/EN
C
REF/EN
10 nF
Figure 1. Application Circuit
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
August, 2020 − Rev. 1
NCV8182C/D
NCV8182C
Vout
Vin
CURRENT LIMIT
SATURATION PROTECTION
THERMAL
SHUTDOWN
BIAS
ADJ
−
+
GND
VREF/EN
Figure 2. Simplified Block Diagram
Tab
Pin 1. V
2. V
GND
1
8
in
8182CG
ALYWW
V
out
V
GND
GND
in
out
GND
GND
ADJ
3. GND
4. Adj
5. V
V
REF/EN
REF/EN
1
5
SOIC−8
DPAK−5
Figure 3. Pin Connections
PIN FUNCTION DESCRIPTION
Pin No.
Pin No.
SOIC−8
DPAK−5
Pin Name
Description
Positive Power Supply Input. Connect 1.0 mF capacitor to ground.
8
1
2
3
4
V
in
1
2, 3, 6, 7
4
V
out
Tracker Output Voltage. Connect 10 mF capacitor with ESR < 1.9 W to ground.
GND
Power Supply Ground.
ADJ
Voltage Adjust Input. The adjust input can be connected directly to output pin for V = V
out REF/
or by a voltage divider for higher/lower output voltages. The adjust pin can be also con-
EN
nected to ground in case of using this device as a High−Side Driver.
5
5
V
Reference Voltage and ENABLE Input. Connect the reference to this pin. A low signal dis-
ables the IC; a high signal switches it on. The reference voltage can be connected directly or
by a voltage divider for lower output voltages. Connect 10 nF capacitor to ground.
REF/EN
www.onsemi.com
2
NCV8182C
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Min
Max
Unit
Input Voltage DC (Note 1)
DC
V
in
V
−16
45
Input Voltage (Note 2)
U *
V
S
Load Dump − Suppressed
−
60
40
Output Voltage
V
out
−10
V
V
Reference Voltage / Enable Input DC
DC
V
REF/EN
−10
40
Adjust Input Voltage DC
DC
V
V
ADJ
−10
−40
−50
40
Maximum Junction Temperature
Storage Temperature
T
150
150
°C
°C
J(max)
T
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in
production. Passed Class B according to ISO16750−1.
ESD CAPABILITY (Note 3)
Rating
Symbol
Min
−2
Max
2
Unit
kV
ESD Capability, Human Body Model
ESD Capability, Charged Device Model
ESD
ESD
HBM
CDM
−1
1
kV
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2017)
Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes smaller than 2 x
2 mm due to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform
characteristic defined in JEDEC JS−002−2018.
LEAD SOLDERING TEMPERATURE AND MSL (Note 4)
Rating
Symbol
Min
Max
Unit
Moisture Sensitivity Level
SOIC−8 (Note 5)
DPAK−5
MSL
−
1
1
4. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
5. Device is under development. Values subject to change.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, SOIC−8 (Note 5)
°C/W
Thermal Resistance, Junction−to−Air (Note 6)
Thermal Reference, Junction−to−Lead (Note 6)
R
y
113
16
θJA
JL2
R
Thermal Characteristics, SOIC−8 (Note 5)
Thermal Resistance, Junction−to−Air (Note 7)
Thermal Reference, Junction−to−Lead (Note 7)
°C/W
°C/W
°C/W
R
y
88
16
θJA
JL2
R
Thermal Characteristics, DPAK−5
Thermal Resistance, Junction−to−Air (Note 6)
Thermal Resistance, Junction−to−Case (Note 6)
R
θJA
R
θJC
62.7
8.3
Thermal Characteristics, DPAK−5
Thermal Resistance, Junction−to−Air (Note 7)
Thermal Resistance, Junction−to−Case (Note 7)
R
θJA
R
θJC
38.2
8.3
2
2
6. Values based on 1s0p board with copper area of 645 mm (or 1 in ) of 1 oz copper thickness and FR4 PCB substrate. Single layer − according
to JEDEC51.3.
2
2
7. Values based on 2s2p board with copper area of 645 mm (or 1 in ) of 1 oz copper thickness and FR4 PCB substrate. 4 layers − according
to JEDEC51.7.
www.onsemi.com
3
NCV8182C
RECOMMENDED OPERATING RANGES
Rating
Symbol
Min
3.4
Max
35
Unit
V
Input Voltage
V
in
REF/EN
Reference Voltage / Enable Input
Junction Temperature
V
2.75
−40
34
V
T
J
150
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
ELECTRICAL CHARACTERISTICS V = 13.5 V, V
≥ 2.75 V, C = 1 mF, C ≥ 10 mF, C
T = 25°C; for min/max values T = −40°C to 150°C; unless otherwise noted. (Note 8)
= 10 nF, for typical values
in
REF/EN
in
out
VREF/EN
J
J
Parameter
REGULATOR OUTPUT
Test Conditions
Symbol
Min
Typ
Max
Unit
Output Voltage Tracking (Accuracy %)
V
= 4.5 V to 26 V, I = 100 mA to
nV
−10
−
10
mV
in
out
out
out
200 mA, V
= 2.75 V to
REF/EN
(V − 1 V) (Note 9)
in
Output Voltage Tracking (Accuracy %)
Line Regulation
V
= 12 V, I = 30 mA, V = 5 V
REF/EN
nV
−5
−
−
−
−
5
mV
mV
mV
mV
in
out
(Note 9)
V
= 4.5 V to 26 V, I = 100 mA,
REF/EN
Reg
10
10
in
out
line
V
= 3.3 V (Note 9)
Load Regulation
I
= 100 mA to 200 mA, V
= 5 V
Reg
−
out
REF/EN
load
(Note 9)
Dropout Voltage (Note 10)
V
out
= 5 V
V
DO
REF/EN
I
= 100 mA
= 30 mA
= 200 mA
−
−
−
4
−
240
50
350
500
I
out
I
out
DISABLE AND QUIESCENT CURRENTS
Disable Current
V
= 12 V, V
= 0 V
I
I
−
20
30
μA
in
REF/EN
DIS
Quiescent Current, I = I − I
V
V
= 12 V, I = 100 mA
I
q
−
−
110
4
150
15
μA
mA
q
in
out
in
in
out
= 12 V, I = 200 mA
out
CURRENT LIMIT PROTECTION
Current Limit
V
= 90% of V
, V
= 5 V
250
−
600
mA
mA
out
REF/EN REF/EN
(Note 9)
LIM
REVERSE CURRENT PROTECTION
Reverse Current
V
= 0 V, V
= 0 V, V = 5 V (Note 9)
I
out_rev
−
−
0.1
1.5
in
REF/EN
out
V
in
= 2.5 V, V
= 5 V, V = 16 V
0.09
TBD
REF/EN
(Notes 5, 9)
out
V
in
= 6 V, V
= 5 V, V = 16 V,
I
in_rev
TBD
−0.03
−
REF/EN
out
T = 150°C (Notes 5, 9)
J
PSRR
Power Supply Ripple Rejection
ADJUST
f = 100 Hz, 1 V
PSRR
−
−
85
−
dB
μA
V
pp
Adjust Input Current
REFERENCE / ENABLE
Reference / Enable Input Threshold
V
= 5 V, V
= 5 V
I
ADJ
0.03
0.5
REF/EN
ADJ
V
th(REF/EN)
Voltage
Low (Off−State)
High (On−State)
V
= 0 V
out
0.8
−
1.46
1.52
−
2.75
out
|V
− V | < 10 mV
REF/EN
Reference / Enable Input Current
THERMAL SHUTDOWN
V
= 5 V (Note 9)
I
−
0.02
0.5
μA
°C
REF/EN
REF/EN
Thermal Shutdown Temperature (Note 11)
T
SD
150
180
210
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T [T . Low duty cycle
A
J
pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. Adjust and Output pin connected to each other.
10.Measured when output voltage falls 100 mV below the regulated voltage at V = 13.5 V.
in
11. Values based on design and/or characterization.
www.onsemi.com
4
NCV8182C
TYPICAL CHARACTERISTICS
V
= 5 V, V
= V (unless otherwise noted)
REF/EN
ADJ
out
5
4
3
2
6
5
4
3
2
V
= 13.5 V
in
T = 25°C
J
1
0
1
0
I
= 200 mA
out
T = 25°C
J
0
1
2
3
4
5
0
2
4
6
8
10
V , REFERENCE VOLTAGE (V)
REF/EN
V , INPUT VOLTAGE (V)
in
Figure 4. Output Voltage vs. Reference Voltage
Figure 5. Output Voltage vs. Input Voltage
6
5
4
500
400
300
200
3
2
100
0
V
= 0 V
out
1
0
V
= 13.5 V
in
T = 25°C
J
T = 25°C
J
0
100
200
300
400
500
600
0
5
10
15
20
25
30
35
40
I
, OUTPUT CURRENT (mA)
V , INPUT VOLTAGE (V)
in
out
Figure 6. Output Voltage vs. Output Current
Figure 7. Maximum Output Current vs. Input
Voltage
10
1
6
4
Unstable Region
I
= 200 mA
= 0.1 mA
out
2
0
Stable Region
I
out
−2
0.1
C
≥ 10 mF
out
= 13.5 V
−4
−6
V
in
T = 25°C
J
V
= 13.5 V
in
0.01
0
20 40 60 80 100 120 140 160 180 200
, OUTPUT CURRENT (mA)
−40
0
40
80
120
160
I
T , JUNCTION TEMPERATURE (°C)
out
J
Figure 8. Output Stability vs. Output Capacitor
ESR
Figure 9. Tracking Accuracy vs. Junction
Temperature
www.onsemi.com
5
NCV8182C
TYPICAL CHARACTERISTICS
V
= 5 V, V
= V (unless otherwise noted)
REF/EN
ADJ
out
2
0.3
0.2
T = 25°C
J
1.5
1
T = 125°C
J
0.1
0.5
0
T = 25°C
J
I
= 200 mA
= 0.1 mA
0
out
−0.5
−1
−0.1
I
out
−0.2
−0.3
−1.5
−2
V
= 13.5 V
in
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30 32 34
0
20 40 60 80 100 120 140 160 180 200
DV , INPUT VOLTAGE CHANGE (V)
DI , OUTPUT CURRENT CHANGE (mA)
out
in
Figure 10. Line Regulation vs. Input Voltage
Change
Figure 11. Load Regulation vs. Output Current
Change
450
400
350
300
250
200
150
100
600
550
500
450
400
350
300
250
200
150
100
I
= 200 mA
out
T = 150°C
J
I
= 30 mA
out
T = 25°C
J
I
= 0.1 mA
out
50
0
−40 −20
50
0
0
20 40 60 80 100 120 140 160 180 200
0
20 40 60 80 100 120 140 160
I
, OUTPUT CURRENT (mA)
T , JUNCTION TEMPERATURE (°C)
J
out
Figure 12. Dropout Voltage vs. Output Current
Figure 13. Dropout Voltage vs. Junction
Temperature
0
−0.40
−0.45
−0.50
−0.55
−0.60
V
V
= 5 V
−50
REF/EN
= 0 V
in
−100
−150
−200
−250
−300
−350
T = 25°C
J
T = 25°C
J
−0.65
−0.70
V
= 5 V
= 0 V
REF/EN
−400
−450
T = 150°C
J
V
out
−16 −14
−12
−10
−8
−6
−4
−2
0
0
5
10
15
, OUTPUT VOLTAGE (V)
out
20
25
30
35
40
V , INPUT VOLTAGE (V)
V
in
Figure 14. Reverse Current vs. Input Voltage
Figure 15. Reverse Output Current vs Output
Voltage
www.onsemi.com
6
NCV8182C
TYPICAL CHARACTERISTICS
V
= 5 V, V
= V (unless otherwise noted)
REF/EN
ADJ
out
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
10
9
T = 25°C
J
I
= 200 mA
out
8
7
6
5
V
= 12 V
in
R = 25 W
L
4
3
R = 50 W
L
2
1
0
I
= 0.1 mA
out
−40 −20
0
20 40 60 80 100 120 140 160
0
5
10
15
20
25
30
35
40
T , JUNCTION TEMPERATURE (°C)
J
V , INPUT VOLTAGE (V)
in
Figure 16. Quiescent Current vs. Junction
Temperature
Figure 17. Quiescent Current vs. Input Voltage
6
5
4
3
2
0.20
0.15
0.10
0.05
0
1
0
V
= 12 V
in
V
= 12 V
in
T = 25°C
J
T = 25°C
J
0
1
2
3
4
5
0
50
100
150
200
I
, OUTPUT CURRENT (mA)
I
out
, OUTPUT CURRENT (mA)
out
Figure 18. Quiescent Current vs. Output
Current (Low Load)
Figure 19. Quiescent Current vs. Output
Current (High Load)
120
100
90
30
25
20
V
= 13.5 V (DC) + 0.5 V (AC)
in
pp
T = 25°C
J
C
= 10 mF Ceramic
out
80
I
= 0.1 mA
out
15
10
70
60
V
I
= 13.5 V
= 0 mA
in
5
0
out
50
40
I
= 200 mA
10K
out
−40 −20
0
20 40 60
80 100 120 140 160
10
100
1K
100K
T , JUNCTION TEMPERATURE (°C)
J
FREQUENCY (Hz)
Figure 20. Disable Current vs. Junction
Temperature
Figure 21. Power Supply Ripple Rejection
www.onsemi.com
7
NCV8182C
DEFINITIONS
General
Quiescent Current
All measurements are performed using short pulse low
Quiescent Current (I ) is the difference between the input
q
duty cycle techniques to maintain junction temperature as
close as possible to ambient temperature.
current (measured through the LDO input pin) and the
output load current. If Reference/Enable pin is set to LOW
(Off – State) the regulator reduces its internal bias and shuts
Output Voltage Tracking (Accuracy)
off the output, this term is called the disable current (I ).
DIS
The output voltage tracking (accuracy) parameter is
defined for specific temperature, input voltage and output
current values or specified over Line, Load and Temperature
ranges.
Current Limit
Current Limit is value of output current by which output
voltage drops below 90% of V
nominal value. It
REF/EN
means that the device is capable to supply minimum
250 mA.
Line Regulation
The change in output voltage for a change in input voltage
measured for specific output current over operating ambient
temperature range.
PSRR
Power Supply Rejection Ratio is defined as ratio of output
voltage and input voltage ripple. It is measured in decibels
(dB).
Load Regulation
The change in output voltage for a change in output
current measured for specific input voltage over operating
ambient temperature range.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 180°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Dropout Voltage
The input to output differential at which the regulator
output no longer maintains regulation against further
reductions in input voltage. It is measured when the output
drops 100 mV below its nominal value. The junction
temperature, load current, and minimum input supply
requirements affect the dropout level.
Maximum Package Power Dissipation
The power dissipation level is maximum allowed power
dissipation for particular package or power dissipation at
which the junction temperature reaches its maximum
operating value, whichever is lower.
www.onsemi.com
8
NCV8182C
APPLICATIONS INFORMATION
Input
Output
The NCV8182C low dropout tracking regulator is
Vout
Vin
self−protected with internal thermal shutdown and internal
current limit. Typical characteristics are shown in Figure 4
to Figure 21.
Cout
10 μF
Cin
1 μF
NCV8182C
VREF
VREF/EN
ADJ
GND
Input Decoupling (Cin)
CVREF
10 nF
A ceramic or tantalum 1 mF capacitor is recommended and
should be connected close to the NCV8182C package.
Higher capacitance and lower ESR will improve the overall
line and load transient response.
Vout = VREF/EN
Figure 22. Tracking Regulator at the Same Voltage
Output Decoupling (Cout
)
Input
Cin
Output
Vout
The NCV8182C is a stable component and does not
require a minimum Equivalent Series Resistance (ESR) for
the output capacitor. Stability region of ESR vs. Output
Current is shown in Figure 8. The minimum output
decoupling value is 10 mF and can be augmented to fulfill
stringent load transient requirements. The tracking regulator
works with ceramic chip capacitors as well as tantalum
devices. Larger values improve noise rejection and load
transient response.
Vin
Cout
10 μF
1 μF
NCV8182C
VREF
VREF/EN
ADJ
GND
R1
CVREF
10 nF
R2
Vout = VREF/EN (R2/(R1+R2))
Figure 23. Tracking Regulator at Lower Voltages
Tracking Regulator Operation
The output voltage V is controlled by comparing it to
out
Input
Output
Vout
Vin
the voltage applied at pin V
and driving a PNP pass
REF/EN
Cout
10 μF
Cin
1 μF
device accordingly. The loop stability depends on the output
NCV8182C
capacitor C , the load current, the chip temperature and the
out
R1
R2
VREF
poles/zeros introduced by the integrated circuit.
VREF/EN
ADJ
GND
Protection circuitry prevent the IC as well as the
application from destruction in case of catastrophic events.
These safeguards contain output current limitation, reverse
polarity protection as well as thermal shutdown in case of
over temperature. The over temperature protection circuit
prevents the IC from immediate destruction under fault
conditions (e.g. output continuously short−circuited) by
reducing the output current. A thermal balance below 200°C
junction temperature is established. Please note that a
junction temperature above 150°C is outside the maximum
ratings and reduces the IC lifetime. The NCV8182C allows
a negative supply voltage. However, several small currents
are flowing into the IC. For details see electrical
characteristics table and typical performance curves. The
thermal protection circuit is not operating during reverse
polarity condition.
CVREF
10 nF
V
out = VREF/EN (1+(R1/R2))
Figure 24. Tracking Regulator at Higher Voltage
Input
Output
BAT
Vout
Vin
NCV8182C
VREF
MCU
VREF/EN
ADJ
GND
CVREF
10 nF
Vout = Vin −VSAT
Figure 25. High−Side Driver
By pulling the V
IC is disabled and enters a sleep mode where the device
lead below 1.46 V typically, the
REF/EN
Thermal Considerations
As power in the NCV8182C increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the NCV8182C has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
NCV8182C can handle is given by:
draws less than 30 mA from power supply. When the
V
V
lead is typically greater than 1.52 V, V tracks the
lead normally. The output is capable of supplying
REF/EN
out
REF/EN
250 mA to the load while configured as a similar (Figure 22),
lower (Figure 23), or higher (Figure 24) voltage as the
reference lead. The ADJ lead acts as the inverting terminal
of the op amp and the V
lead as the non−inverting.
REF/EN
The device can also be configured as a high−side driver as
displayed in Figure 25.
www.onsemi.com
9
NCV8182C
Hints
V
in
ƪT
ƫ
J(MAX) * TA
and GND printed circuit board traces should be as
(eq. 1)
PD(MAX)
+
RqJA
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the NCV8182C and
make traces as short as possible. For better EMC
Since T is not recommended to exceed 150°C, then the
J
2
NCV8182C soldered on 645 mm , 1 oz copper area, FR4 can
dissipate up to 2 W for DPAK and 1.1 W for SOIC−8 when
the ambient temperature (T ) is 25°C. See Figures 26 and 27
A
for R
versus PCB area. The power dissipated by the
performance on V
lead it is recommended to use
thJA
REF/EN
NCV8182C can be calculated from the following equations:
additional decoupling 10 nF ceramic capacitor connected
between V and GND. The NCV8182C is not
developed in compliance with ISO26262 standard. If
application is safety critical then the below application
example diagram shown in Figure 26 can be used.
REF/EN
ǒ
Ǔ
ǒ
Ǔ
in * Vout
(eq. 2)
P
D [ Vin Iq@Iout ) Iout
V
or
ǒ
Ǔ
PD(MAX) ) Vout Iout
(eq. 3)
Vin(MAX)
[
Iout ) Iq
Input
Output
Vout
VDD
Vin
Cin
1 μF
VCC
COUT
10 μF
Microprocessor
NCV8182C
Voltage
Supervisor
(e.g. NCV30X, NCV809)
VREF/EN
RESET
GND
I/O
VREF/EN
ADJ
GND
CREF_EN
10 nF
Figure 26. NCV8182C Application Diagram
200
180
160
140
120
100
80
200
180
160
140
1 oz, 1s0p
2 oz, 1s0p
120
1 oz, 2s2p
100
2 oz, 2s2p
80
60
1 oz, 1s0p
2 oz, 1s0p
60
1 oz, 2s2p
2 oz, 2s2p
40
20
0
40
20
0
0
100 200 300 400 500 600 700 800 900
0
100 200 300 400 500 600 700 800 900
2
2
COPPER HEAT SPREADER (mm )
COPPER HEAT SPREADER AREA (mm )
Figure 28. Thermal Resistance vs. PCB Copper
Figure 27. Thermal Resistance vs. PCB Copper
Area (SOIC−8)
Area (DPAK−5)
ORDERING INFORMATION
Device
†
Package
Shipping
NCV8182CDR2G
(In Development)
SOIC−8
2500 / Tape & Reel
2500 / Tape & Reel
(Pb−Free)
NCV8182CDTRKG
DPAK, 5−PIN
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK−5, CENTER LEAD CROP
CASE 175AA
ISSUE B
DATE 15 MAY 2014
SCALE 1:1
NOTES:
SEATING
PLANE
−T−
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
C
2. CONTROLLING DIMENSION: INCH.
B
R
INCHES
DIM MIN MAX
MILLIMETERS
E
V
R1
MIN
5.97
6.35
2.19
0.51
0.46
0.61
MAX
6.22
6.73
2.38
0.71
0.58
0.81
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.020 0.028
0.018 0.023
0.024 0.032
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.045 BSC
Z
A
K
S
1 2 3 4
5
4.56 BSC
U
0.87
0.46
2.60
1.01
0.58
2.89
K
L
F
1.14 BSC
J
R
0.170 0.190
4.32
4.70
0.63
0.51
0.89
3.93
4.83
5.33
1.01
−−−
1.27
4.32
R1 0.185 0.210
L
H
S
U
V
Z
0.025 0.040
0.020 −−−
0.035 0.050
0.155 0.170
D 5 PL
M
G
0.13 (0.005)
T
GENERIC
MARKING DIAGRAMS*
RECOMMENDED
SOLDERING FOOTPRINT*
6.4
0.252
XXXXXXG
ALYWW
2.2
0.086
AYWW
XXX
XXXXXG
0.34
0.013
5.8
0.228
5.36
0.217
IC
Discrete
XXXXXX = Device Code
A
= Assembly Location
L
Y
WW
G
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
10.6
0.417
0.8
0.031
mm
inches
ǒ
Ǔ
SCALE 4:1
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON12855D
DPAK−5 CENTER LEAD CROP
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Email Requests to: orderlit@onsemi.com
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800−282−9855 Toll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
ON Semiconductor Website: www.onsemi.com
◊
www.onsemi.com
相关型号：
©2020 ICPDF网 联系我们和版权申明