NCV8503_技术文档

NCV8503 Series

Micropower 400 mA LDO

Linear Regulators

with ENABLE, DELAY,

Adjustable RESET, and

General Use Comparator

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The NCV8503 is a family of precision micropower voltage

regulators. Their output current capability is 400 mA. The family has

output voltage options for Adjustable, 2.5 V, 3.3 V and 5.0 V.

The output voltage is accurate within ± 2.0% with a maximum

dropout voltage of 0.6 V at 400 mA. Low quiescent current is a feature

drawing less than 1.0 µA with ENABLE = 0 V. With ENABLE = 5.0 V,

the part only draws 200 µA with 100 µA load. This part is ideal for any

and all battery operated microprocessor equipment.

MARKING

DIAGRAM

16

1

SOIC 16 LEAD

WIDE BODY

EXPOSED PAD

PDW SUFFIX

CASE 751R

NCV8503x

AWLYYWW

Microprocessor control logic includes an active RESET (with

DELAY).

1

The active RESET circuit operates correctly at an output voltage as

low as 1.0 V. The RESET function is activated during the power up

sequence or during normal operation if the output voltage drops below

the regulation limits.

x

= Voltage Ratings as Indicated Below:

A = Adjustable

2 = 2.5 V

3 = 3.3 V

5 = 5.0 V

The reset threshold voltage can be decreased by the connection of

external resistor divider to R

lead.

ADJ

A

= Assembly Location

The general use comparator (FLAG/Monitor) is referenced to a

temperature stable voltage and provides 1.0 mA of drive current at its

open collector output.

WL = Wafer Lot

YY = Year

WW = Work Week

The regulator is protected against reverse battery, short circuit, and

thermal overload conditions. The device can withstand load dump

transients making it suitable for use in automotive environments. The

device has also been optimized for EMC conditions.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 12 of this data sheet.

Features

• Output Voltage Options: Adjustable, 2.5 V, 3.3 V, 5.0 V

• ± 2.0% Output

• Low < 1.0 µA Sleep Current

• Low 200 µA Quiescent Current

• Fixed or Adjustable Output Voltage

• Active RESET

• Adjustable Reset

• ENABLE

• 400 mA Output Current Capability

• Fault Protection

♦ +60 V Peak Transient Voltage

♦ −15 V Reverse Voltage

♦ Short Circuit

♦ Thermal Overload

• General Use Comparator

• NCV Prefix for Automotive and Other Applications Requiring Site

and Change Control

Semiconductor Components Industries, LLC, 2004

1

Publication Order Number:

January, 2004 − Rev. 14

NCV8503/D

NCV8503 Series

PIN CONNECTIONS

ADJUSTABLE OUTPUT

FIXED OUTPUT

1

16

FLAG

16

FLAG

V

ADJ

SENSE

V

RESET

ENABLE

GND

NC

V

RESET

ENABLE

GND

NC

OUT

NC

OUT

NC

V

IN

DELAY

V

IN

DELAY

MON

R

MON

R

ADJ

Monitor

SENSE

(Fixed Output Only)

I

Q

(V )

O

V

BAT

V

IN

V

OUT

V

DD

33 µF

10 µF

R

ADJ

NCV8503

R

RST

FLG

5.1 k

DELAY

MON

C

DELAY

V

ADJ

(Adjustable

Output Only)

ENABLE

FLAG

RESET

I/O

GND

Figure 1. Application Diagram

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2

NCV8503 Series

MAXIMUM RATINGS*{

Rating

Value

−15 to 45

60

Unit

V

IN

(DC)

Peak Transient Voltage (46 V Load Dump @ V = 14 V)

V

IN

Operating Voltage

45

V

OUT

(DC)

16

V

Voltage Range (RESET, FLAG, R

, DELAY)

−0.3 to 10

V

ADJ

Input Voltage Range:

MON

−0.3 to 10

−0.3 to 16

V

ADJ

Input Voltage Range (ENABLE)

−0.3 to 10**

V

ESD Susceptibility

(Human Body Model)

(Machine Model)

4.0

200

kV

V

Junction Temperature, T

−40 to +150

−55 to 150

°C

J

Storage Temperature, T

S

Package Thermal Resistance, SOW−16 E PAD:

Junction−to−Case, R

Junction−to−Ambient, R

16

57

°C/W

θ

JC

θ

JA

Lead Temperature Soldering:

Reflow: (SMD styles only) (Note 1) 240 peak (Note 2)

°C

1. 60 second maximum above 183°C.

2. −5°C/+0°C allowable conditions.

*The maximum package power dissipation must be observed.

†During the voltage range which exceeds the maximum tested voltage of V , operation is assured, but not specified. Wider limits may apply.

IN

Thermal dissipation must be observed closely.

**Reference Figure 15 for switched−battery ENABLE application.

ELECTRICAL CHARACTERISTICS (I

= 1.0 mA, ENABLE = 5.0 V, −40°C ≤ T ≤ 150°C; V = dependent on voltage option

OUT

J

IN

(Note 3); unless otherwise specified.)

Characteristic

Output Stage

Test Conditions

Min

Typ

Max

Unit

Output Voltage for 2.5 V Option (V )

6.5 V < V < 16 V, 1.0 mA ≤ I

≤ 400 mA

2.450

2.425

2.5

2.550

2.575

V

O

IN

OUT

4.5 V < V < 26 V, 1.0 mA ≤ I

IN

Output Voltage for 3.3 V Option (V )

7.3 V < V < 16 V, 1.0 mA ≤ I

≤ 400 mA

3.234

3.201

3.3

3.366

3.399

V

O

IN

OUT

4.5 V < V < 26 V, 1.0 mA ≤ I

IN

Output Voltage for 5.0 V Option (V )

9.0 V < V < 16 V, 1.0 mA ≤ I

≤ 400 mA

4.90

4.85

5.0

5.10

5.15

V

O

IN

OUT

6.0 V < V < 26 V, 1.0 mA ≤ I

IN

Output Voltage for Adjustable Option

V

OUT

= V

(Unity Gain)

ADJ

(V )

O

6.5 V < V < 16 V, 1.0 mA < I

< 400 mA

1.274

1.261

1.300

1.326

1.339

V

IN

OUT

4.5 V < V < 26 V, 1.0 mA < I

IN

Dropout Voltage (V − V

(5.0 V and Adj. > 5.0 V Options Only)

)

I

= 400 mA

= 1.0 mA

−

400

30

600

150

mV

IN

OUT

Load Regulation

V

= 14 V, 5.0 mA ≤ I

≤ 400 mA

−30

−

5.0

30

25

mV

IN

OUT

Line Regulation (2.5 V, 3.3 V, and

Adjustable Options)

4.5 V < V < 26 V, I

= 1.0 mA

IN

OUT

Line Regulation (5.0 V Option)

6.0 V < V < 26 V, I

−

5.0

25

mV

IN

OUT

Quiescent Current, (I ) Active Mode

I

= 100 µA, V = 12 V, MON = 3.0 V

= 75 mA, V = 14 V, MON = 3.0 V

IN

≤ 400 mA, V = 14 V, MON = 3.0 V

IN

−

200

2.5

25

350

5.0

45

µA

mA

Q

OUT

IN

I

OUT

I

OUT

Quiescent Current, (I ) Sleep Mode

ENABLE = 0 V, V = 12 V, −40°C ≤ T ≤ 125°C

−

1.0

−

µA

mA

°C

Q

IN

J

Current Limit

−

425

100

150

800

500

180

Short Circuit Output Current

Thermal Shutdown

V

OUT

= 0 V

−

(Guaranteed by Design)

−

3. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type.

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3

NCV8503 Series

ELECTRICAL CHARACTERISTICS (continued) (I

= 1.0 mA, ENABLE = 5.0 V, −40°C ≤ T ≤ 150°C; V = dependent on

OUT

J

IN

voltage option (Note 4); unless otherwise specified.)

Characteristic

Test Conditions

Min

Typ

Max

Unit

Reset Function (RESET)

RESET Threshold for 2.5 V Option

HIGH (V

V

= 4.5 V (Note 5) (Note 6)

IN

)

Increasing

Decreasing

2.35

2.30

25

−

1.0 × V

V

mV

RH

OUT

O

LOW (V

)

−

RL

Hysteresis

RESET Threshold for 3.3 V Option

V

= 4.5 V (Note 5) (Note 6)

Increasing

Decreasing

IN

HIGH (V

)

3.10

3.00

35

−

1.0 × V

V

mV

RH

OUT

LOW (V

)

−

RL

Hysteresis

RESET Threshold for 5.0 V Option

V

= 6.0 V (Note 6)

Increasing

Decreasing

IN

HIGH (V

)

4.70

4.60

50

−

1.0 × V

V

mV

RH

OUT

LOW (V

)

−

RL

Hysteresis

RESET Threshold for Adjustable Option

V

= 4.5 V (Note 5) (Note 6)

Increasing

Decreasing

IN

HIGH (V

)

1.22

1.19

10

−

1.0 × V

V

mV

RH

OUT

LOW (V

)

−

RL

Hysteresis

Output Voltage

V

= Minimum (Note 6) (Note 7)

−

0.1

1.8

1.3

−

0.4

2.2

1.6

0.2

5.5

−

V

IN

Low (V

)

1.0 V ≤ V

≤ V , R

= 5.1 k

RLO

OUT

RL

RESET

DELAY Switching Threshold (V

(2.5 V, 3.3 V, and 5.0 V Options)

)

V

IN

V

IN

= Minimum (Note 6) (Note 7)

1.4

1.0

−

DT

DELAY Switching Threshold (V

(Adjustable Option)

)

DT

V

DELAY Low Voltage

V

IN

< RESET Threshold Low(min)

OUT

DELAY Charge Current

DELAY Discharge Current

V

IN

= Minimum (Note 6) (Note 7)

2.5

5.0

4.0

−

µA

mA

DELAY = 1.0 V, V

> V

OUT

RH

V

IN

= Minimum (Note 6) (Note 7)

DELAY = 1.0 V, V

< V

OUT

RL

Reset Adjust Switching Voltage (V

Hysteresis

)

V

= Minimum (Note 6) (Note 7)

1.16

20

1.25

50

1.34

100

V

mV

R(ADJ)

IN

Increasing and Decreasing

FLAG/Monitor

Monitor Threshold

V

IN

= Minimum (Note 6) (Note 7)

1.20

1.28

1.36

V

Increasing and Decreasing

Hysteresis

V

= Minimum (Note 6) (Note 7)

10

−0.5

−

35

0.1

75

0.5

0.4

mV

µA

V

IN

Input Current

MON = 2.0 V

Output Saturation Voltage

MON = 0 V, I

= 1.0 mA,

FLAG

V

IN

= Minimum (Note 6) (Note 7)

Voltage Adjust (Adjustable Output only)

Input Current

ENABLE

V

ADJ

= 1.25 V, V = Minimum (Note 6) (Note 7)

−0.5

−

0.5

µA

IN

Input Threshold

Low, V = 14 V (Note 6)

−

2.0

−

1.0

−

V

IN

High, V = 14 V (Note 6)

IN

Input Current

ENABLE = 5.0 V, V = 14 V (Note 6)

−

30

75

µA

IN

4. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type.

5. For V ≤ 4.5 V, a RESET = Low may occur with the output in regulation.

IN

6. Part is guaranteed by design to meet specification over the entire V voltage range, but is production tested only at the specified V voltage.

IN

7. Minimum V = 4.5 V for 2.5 V, 3.3 V, and Adjustable options. Minimum V = 6.0 V for 5.0 V option.

IN

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NCV8503 Series

PACKAGE PIN DESCRIPTION, ADJUSTABLE OUTPUT

Pin Number

Pin Symbol

Function

1

V

Voltage Adjust. A resistor divider from V

±2.0%, 400 mA output.

No connection.

to this lead sets the output voltage.

ADJ

OUT

2

V

OUT

3−6, 11, 12

NC

7

V

IN

Input Voltage.

8

MON

Monitor. Input to comparator. If not needed connect to V

Reset adjust. If not needed connect to ground.

Timing capacitor for RESET function.

OUT.

9

R

ADJ

10

13

14

15

16

DELAY

GND

Ground. All GND leads must be connected to Ground

.

ENABLE

RESET

FLAG

ENABLE control for the IC. A high powers the device up.

Active reset (accurate to V ≥ 1.0 V)

OUT

Open collector output from comparator.

NOTE: Tentative pinout for SOW−16 E Pad.

PACKAGE PIN DESCRIPTION, FIXED OUTPUT

Pin Number

Pin Symbol

Function

Kelvin connection which allows remote sensing of output voltage for improved regulation. If

1

SENSE

remote sensing is not desired, connect to V

±2.0%, 400 mA output.

No connection.

.

OUT

2

V

OUT

3−6, 11, 12

NC

7

V

IN

Input Voltage.

8

MON

Monitor. Input to comparator. If not needed connect to V

Reset adjust. If not needed connect to ground.

Timing capacitor for RESET function.

OUT.

9

R

ADJ

10

13

14

15

16

DELAY

GND

Ground. All GND leads must be connected to Ground

.

ENABLE

RESET

FLAG

ENABLE control for the IC. A high powers the device up.

Active reset (accurate to V ≥ 1.0 V)

OUT

Open collector output from comparator.

NOTE: Tentative pinout for SOW−16 E Pad.

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5

NCV8503 Series

V

OUT

V

IN

Current Source

(Circuit Bias)

+

−

ENABLE

SENSE

1.5 V

I

BIAS

Current Limit

Sense

+

−

I

BIAS

R

ADJ

1.8 V

(Fixed Versions)

1.3 V

+

−

Error Amplifier

V

BG

− 18 mV

V

BG

(Adjustable Version)

RESET

+

−

Fixed Versions only

Thermal

Protection

4.0 µA

V

ADJ

Bandgap

Reference

15 k

Adjustable

Version only

DELAY

MON

I

V

BG

BIAS

GND

V

BG

I

BIAS

FLAG

+

−

Figure 2. Block Diagram

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6

NCV8503 Series

TYPICAL PERFORMANCE CHARACTERISTICS

5.10

5.08

5.06

5.04

5.02

5.00

4.98

4.96

4.94

4.92

4.90

3.35

V

= 5.0 V

= 14 V

= 5.0 mA

V

= 3.3 V

OUT

= 14 V

OUT

V

IN

3.33

3.31

3.29

3.27

3.25

3.23

I

= 5.0 mA

OUT

−40 −20

0

20 40

60 80 100 120 140 160

−40 −20

0

20 40

60 80 100 120 140 160

TEMPERATURE (°C)

Figure 3. 5 V Output Voltage vs Temperature

Figure 4. 3.3 V Output Voltage vs Temperature

2.55

2.54

2.53

2.52

2.51

2.50

2.49

2.48

2.47

2.46

2.45

700

V

= 2.5 V

= 14 V

= 5.0 mA

OUT

600

500

400

300

200

100

0

IN

I

OUT

125 °C

25 °C

−40 °C

5 V and Adj. > 5 V options only

−40 −20

0

20 40

60 80 100 120 140 160

0

50

100 150

200

250

300

350

400

TEMPERATURE (°C)

I

, OUTPUT CURRENT (mA)

out

Figure 5. 2.5 V Output Voltage vs Temperature

Figure 6. Dropout Voltage vs Output Current

100

10

5.0 V

C

= 33 mF*

VOUT

Unstable Region

3.3 V

2.5 V

10

1.0

C

= 0.1 mF

VOUT

Stable Region

1.0

Stable Region

Unstable Region

0.1

V

C

= 14 V

IN

*There is no unstable lower

= 10 mF

VOUT

5 V version

300 350 400

, OUTPUT CURRENT (mA)

region for the 33 mF capacitor

0.01

0.1

0

50

100 150 200

250

300 350 400

0

50

100 150 200

250

I

, OUTPUT CURRENT (mA)

I

out

Figure 7. Output Stability with Output Voltage Change Figure 8. Output Stability with Output Capacitor Change

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7

NCV8503 Series

TYPICAL PERFORMANCE CHARACTERISTICS

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

60

+125°C

+25°C

+125°C

50

−40°C

+25°C

40

−40°C

30

20

10

0

100

0

5

10 15 20

25 30 35

40

45 50

0

50

150 200 250 300 350 400 450 500

I , OUTPUT CURRENT (mA)

OUT

I

, OUTPUT CURRENT (mA)

OUT

Figure 9. Quiescent Current vs Output Current

Figure 10. Quiescent Current vs Output Current

12

210

T = 25°C

I

= 200 mA

out

205

200

195

190

185

180

175

10

8

I

= 100 mA

out

6

I

= 100 mA

out

4

I

= 50 mA

= 10 mA

out

2

T = 25°C

22 24 26

out

0

10

6

8

12 14

16 18 20

22

24 26

6

8

12 14

16 18 20

V

IN

, INPUT VOLTAGE (V)

V , INPUT VOLTAGE (V)

IN

Figure 11. Quiescent Current vs Input Voltage

Figure 12. Quiescent Current vs Input Voltage

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NCV8503 Series

CIRCUIT DESCRIPTION

ENABLE Function

The part stays in a low I sleep mode when the ENABLE

pin is held low. The part has an internal pull down if the pin

is left floating.

REGULATOR CONTROL FUNCTIONS

The NCV8503 contains the microprocessor compatible

control function RESET (Figure 13).

Q

The integrity of the ENABLE pin allows it to be tied to the

battery line through an external resistor. It will withstand

load dump potentials in this configuration.

V

IN

RESET

V

OUT

V

BAT

V

IN

OUT

Threshold

Up to 45 V

NCV8503

DELAY

10 k

Threshold

(V

)

DT

ENABLE

GND

RESET

T

d

Figure 13. Reset and Delay Circuit Wave Forms

Figure 15. ENABLE Function

RESET Function

A RESET signal (low voltage) is generated as the IC

powers up until V is within 1.5% of the regulated output

DELAY Function

OUT

The reset delay circuit provides a programmable (by

external capacitor) delay on the RESET output lead.

The DELAY lead provides source current (typically 4.0 µA)

to the external DELAY capacitor during the following

proceedings:

voltage, or when V

drops out of regulation,and is lower

OUT

than 4.0% below the regulated output voltage. Hysteresis is

included in the function to minimize oscillations.

The RESET output is an open collector NPN transistor,

controlled by a low voltage detection circuit. The circuit is

functionally independent of the rest of the IC thereby

1. During Power Up (once the regulation threshold

has been verified).

guaranteeing that the RESET signal is valid for V

as 1.0 V.

as low

OUT

2. After a reset event has occurred and the device is

back in regulation. The DELAY capacitor is

discharged when the regulation (RESET threshold)

has been violated. This is a latched incident. The

capacitor will fully discharge and wait for the

device to regulate before going through the delay

time event again.

Adjustable Reset Function

The reset threshold can be made lower by connecting an

external resistor divider to the R lead from the V

ADJ

OUT

lead, as displayed in Figure 14. This lead is grounded to

select the default value of 4.6 V (on the 5.0 V option).

FLAG/Monitor Comparator

to µP and

System

Power

A general use comparator is included whose positive input

terminal is tied to the on−chip band gap voltage reference.

This provides a very temperature stable referenced

comparator with versatile uses in any system. The trip point

can be programmed externally using a resistor divider to the

input monitor (MON) (Figure 16). The typical threshold is

1.28 V on the MON pin.

V

R(ADJ)

V

OUT

R

ADJ

C

OUT

R

RST

NCV8503

RESET

DELAY

to µP and

RESET

Port

V

MON

C

DELAY

V

BAT

V

OUT

V

CC

V

IN

µP

NCV8503

C

OUT

Figure 14. Adjustable RESET

I/O

MON

FLAG

R

RESET

ADJ

RESET

GND

DELAY

Figure 16. Flag/Monitor Function

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9

NCV8503 Series

≈5.0 V

Voltage Adjust

Figure 17 shows the device setup for a user configurable

output voltage. The feedback to the V pin is taken from

V

OUT

C

OUT

15 k

NCV8503

ADJ

a voltage divider referenced to the output voltage. The loop

is balanced around the Unity Gain threshold (1.30 V

typical).

V

ADJ

1.28 V

5.1 k

Figure 17. Adjustable Output

Voltage

APPLICATION NOTES

FLAG MONITOR

STABILITY CONSIDERATIONS

Figure 18 shows the FLAG Monitor waveforms as a result

of the circuit depicted in Figure 16. As the input voltage falls

The output or compensation capacitor helps determine

three main characteristics of a linear regulator: start−up

delay, load transient response and loop stability.

(V

), the Monitor threshold is crossed. This causes the

MON

voltage on the FLAG output to go low.

The capacitor value and type should be based on cost,

availability, size and temperature constraints. A tantalum or

aluminum electrolytic capacitor is best, since a film or

ceramic capacitor with almost zero ESR can cause

instability. The aluminum electrolytic capacitor is the least

expensive solution, but, if the circuit operates at low

temperatures (−25°C to −40°C), both the value and ESR of

the capacitor will vary considerably. The capacitor

manufacturers data sheet usually provides this information.

V

MON

Flag Monitor

Ref. Voltage

The value for the output capacitor C

shown in Figure 19

OUT

should work for most applications, however it is not

necessarily the optimized solution.

FLAG

V

IN

V

OUT

C

0.1 µF

*

IN

C

33 µF

**

NCV8503

OUT

R

RST

Figure 18. FLAG Monitor Circuit Waveform

RESET

SETTING THE DELAY TIME

The delay time is controlled by the Reset Delay Low

Voltage, Delay Switching Threshold, and the Delay Charge

Current. The delay follows the equation:

*C required if regulator is located far from the power supply filter

IN

[

C

+

]

(V * Reset Delay Low Voltage)

DELAY dt

**C

required for stability. Capacitor must operate at minimum

temperature expected

OUT

t

DELAY

Delay Charge Current

Example:

Using C

Figure 19. Test and Application Circuit Showing

Output Compensation

= 33 nF.

DELAY

Assume reset Delay Low Voltage = 0.

Use the typical value for V = 1.8 V (2.5 V, 3.3 V, and

dt

5.0 V options).

Use the typical value for Delay Charge Current = 4.2 µA.

[

]

33 nF(1.8 * 0)

t

+

+ 14 ms

DELAY

4.2 mA

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10

NCV8503 Series

100

The value of R

can then be compared with those in the

qJA

package section of the data sheet. Those packages with

’s less than the calculated value in equation 2 will keep

the die temperature below 150°C.

In some cases, none of the packages will be sufficient to

dissipate the heat generated by the IC, and an external

heatsink will be required.

R

qJA

90

80

70

60

I

IN

OUT

SMART

REGULATOR

V

IN

V

OUT

50

40

Control

0

200

400

Copper Area (mm )

600

800

}

Features

2

I

Q

Figure 20. 16 Lead SOW (Exposed Pad), qJA as a

Function of the Pad Copper Area (2 oz. Cu

Thickness), Board Material = 0.0625, G−10/R−4

Figure 21. Single Output Regulator with Key

Performance Parameters Labeled

HEAT SINKS

CALCULATING POWER DISSIPATION IN A

SINGLE OUTPUT LINEAR REGULATOR

The maximum power dissipation for a single output

regulator (Figure 21) is:

A heat sink effectively increases the surface area of the

package to improve the flow of heat away from the IC and

into the surrounding air.

Each material in the heat flow path between the IC and the

outside environment will have a thermal resistance. Like

series electrical resistances, these resistances are summed to

P

+ [V

* V

]I

OUT(min) OUT(max)

(1)

D(max)

IN(max)

) V

I

IN(max) Q

determine the value of R

:

qJA

where:

V

is the maximum input voltage,

is the minimum output voltage,

is the maximum output current for the

R

+ R

) R

qSA

(3)

IN(max)

qJA

qJC

qCS

V

OUT(min)

where:

I

OUT(max)

R

qJC

R

qCS

R

qSA

= the junction−to−case thermal resistance,

= the case−to−heatsink thermal resistance, and

= the heatsink−to−ambient thermal resistance.

application, and

I

is the quiescent current the regulator consumes at

Q

.

OUT(max)

R

qJC

appears in the package section of the data sheet. Like

Once the value of P

permissible value of R

is known, the maximum

D(max)

R

qJA

, it too is a function of package type. R

and R

are

qCS

qSA

can be calculated:

qJA

functions of the package type, heatsink and the interface

between them. These values appear in heat sink data sheets

of heat sink manufacturers.

T

150°C *

A

R

+

(2)

qJA

P

D

http://onsemi.com

11

NCV8503 Series

ORDERING INFORMATION

Device

Output Voltage

Package

Shipping

47 Units/Rail

NCV8503PWADJ

NCV8503PWADJR2

NCV8503PW25

Adjustable

1000 Tape & Reel

47 Units/Rail

2.5 V

3.3 V

5.0 V

NCV8503PW25R2

NCV8503PW33

1000 Tape & Reel

47 Units/Rail

SOW−16 Exposed Pad

NCV8503PW33R2

NCV8503PW50

1000 Tape & Reel

47 Units/Rail

NCV8503PW50R2

1000 Tape & Reel

http://onsemi.com

12

NCV8503 Series

PACKAGE DIMENSIONS

SOIC 16 LEAD WIDE BODY

EXPOSED PAD

PDW SUFFIX

CASE 751R−02

ISSUE A

−U−

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

A

M

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD

PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER

SIDE.

16

1

9

P

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE PROTRUSION SHALL BE

0.13 (0.005) TOTAL IN EXCESS OF THE D DIMENSION

AT MAXIMUM MATERIAL CONDITION.

6. 751R−01 OBSOLETE, NEW STANDARD 751R−02.

B

M

W

0.25 (0.010)

R x 45

_

8

−W−

MILLIMETERS

INCHES

MIN

G

14 PL

DIM MIN

MAX

10.45

7.60

2.65

0.49

0.90

MAX

0.411

0.299

0.104

0.019

0.035

PIN 1 I.D.

DETAIL E

A

B

C

D

F

10.15

7.40

2.35

0.35

0.50

0.400

0.292

0.093

0.014

0.020

TOP SIDE

G

H

J

1.27 BSC

0.050 BSC

3.76

0.25

0.10

4.58

0

3.86

0.32

0.25

4.78

7

0.148

0.010

0.004

0.180

0

0.152

0.012

0.009

0.188

7

K

L

C

M

P

R

_

F

−T−

10.05

0.25

10.55

0.75

0.395

0.010

0.415

0.029

0.10 (0.004)

T

SEATING

PLANE

K

D16 PL

M

S

0.25 (0.010)

T

U

W

J

DETAIL E

H

1

8

9

EXPOSED PAD

L

16

BACK SIDE

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13

NCV8503 Series

SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLIC).

ON Semiconductor and

are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

ON Semiconductor Website: http://onsemi.com

Order Literature: http://www.onsemi.com/litorder

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

Japan: ON Semiconductor, Japan Customer Focus Center

2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051

Phone: 81−3−5773−3850

For additional information, please contact your

local Sales Representative.

NCV8503/D

http://onsemi.com

14


型号：	NCV8503
厂家：	ONSEMI
描述：	Micropower 400 mA LDO Linear Regulators with ENABLE, DELAY, Adjustable RESET, and General Use Comparator 微400毫安LDO线性稳压器与启用，延迟，可调复位，一般用比较器稳压器比较器
文件：	总14页 (文件大小：109K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

NCV8503 [ONSEMI]

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