NCV8570MN300R2G [ONSEMI]
200 mA, Ultra Low Noise, High PSRR, BiCMOS RF LDO Regulator; 200毫安，超低噪声，高PSRR ， BiCMOS工艺的RF LDO稳压器
| 型号： | NCV8570MN300R2G |
| 厂家： | 
ONSEMI |
| 描述： | 200 mA, Ultra Low Noise, High PSRR, BiCMOS RF LDO Regulator |
| 文件： | 总12页 (文件大小：182K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV8570
200 mA, Ultra Low Noise,
High PSRR, BiCMOS RF LDO
Regulator
Noise sensitive RF applications such as Power Amplifiers in satellite
radios, infotainment equipment, and precision instrumentation for
automotive applications require very clean power supplies.
The NCV8570 is 200 mA LDO that provides the engineer with a
very stable, accurate voltage with ultra low noise and very high Power
Supply Rejection Ratio (PSRR) suitable for RF applications. In order
to optimize performance for battery operated portable applications,
the NCV8570 employs an advanced BiCMOS process to combine the
benefits of low noise and superior dynamic performance of bipolar
elements with very low ground current consumption at full loads
offered by CMOS.
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MARKING
DIAGRAMS
6
DFN6, 2x2.2
MN SUFFIX
CASE 506BA
XXMG
G
1
XX = Specific Device Code
M
= Date Code
= Pb−Free Package
G
Furthermore, in order to provide a small footprint for
space−conscious applications, the NCV8570 is stable with small, low
value capacitors and is available in very small DFN6 2x2.2 and
TSOP−5 packages.
(Note: Microdot may be in either location)
5
Features
TSOP−5
XXXAYWG
SN SUFFIX
• Output Voltage Options:
G
5
CASE 483
− 1.8 V, 2.5 V, 2.75 V, 2.8 V, 3.0 V, 3.3 V
− Contact Factory for Other Voltage Options
1
1
XXX = Specific Device Code
• Output Current Limit 200 mA
A
Y
W
G
= Assembly Location
= Year
= Work Week
• Ultra Low Noise (typ 15 mV
)
rms
• Very High PSRR (typ 80 dB)
= Pb−Free Package
• Stable with Ceramic Output Capacitors as low as 1 mF
• Low Sleep Mode Current (max 1 mA)
• Active Discharge Circuit
(Note: Microdot may be in either location)
• Current Limit Protection
PIN ASSIGNMENTS
• Thermal Shutdown Protection
• AEC Qualified
1
2
3
6
5
4
C
noise
CE
• PPAP Capable
• These are Pb−Free Devices
GND
GND
V
out
V
in
Typical Applications
(Top View)
• Satellite and HD Radio
1
5
• Noise Sensitive Applications (Video, Audio)
• Analog Power Supplies
V
out
V
in
• Portable/Built−in DVD Entertainment Systems
• GPS
GND
CE
C
noise
V
(Top View)
V
in
V
out
V
out
in
NCV8570
C
GND
CE
noise
C
noise
C
C
in
out
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
November, 2009 − Rev. 3
NCV8570/D
NCV8570
V
in
V
out
−
Bandgap
Reference
Voltage
Current
Limit
+
C
noise
CE
Active
Discharge
GND
Figure 2. Simplified Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
DFN6
TSOP−5 Pin Name
Description
1
3
CE
Chip Enable: This pin allows on/off control of the regulator. To disable the device, connect to
GND. If this function is not in use, connect to V . Internal 5 MW Pull Down resistor is connec-
in
ted between CE and GND.
2, 5, EPAD
2
1
5
4
GND
Power Supply Ground (Pins are fused for the DFN package)
Power Supply Input Voltage
3
4
6
V
in
V
out
Regulated Output Voltage
C
Noise reduction pin. (Connect 100 nF or 10 nF capacitor to GND)
noise
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage (Note 1)
Chip Enable Voltage
Noise Reduction Voltage
Output Voltage
V
in
−0.3 V to 6 V
V
−0.3 V to V +0.3 V
V
CE
in
V
T
−0.3 V to V +0.3 V
V
Cnoise
in
V
out
−0.3 V to V +0.3 V
V
in
Maximum Junction Temperature (Note 1)
Storage Temperature Range
150
°C
°C
J(max)
T
STG
−55 to 150
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015
Machine Model Method 200 V
This device series meets or exceeds AEC Q100 standard.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Package Thermal Resistance, DFN6: (Note 1)
Junction−to−Lead (pin 2)
R
°C/W
q
JA
37
120
Junction−to−Ambient
Package Thermal Resistance, TSOP−5: (Note 1)
Junction−to−Lead (pin 5)
R
°C/W
q
JA
109
220
Junction−to−Ambient
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area
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2
NCV8570
ELECTRICAL CHARACTERISTICS
(V = V + 0.5 V, V = 1.2 V, C = 0.1 mF, C = 1 mF, C
= 10 nF, T = −40°C to 85°C, unless otherwise specified (Note 2))
A
in
out
CE
in
out
noise
Characteristic
Test Conditions
Symbol
Min
Typ
Max
Unit
REGULATOR OUTPUT
Input Voltage
V
2.5
−
5.5
V
V
in
Output Voltage (Note 3)
1.8 V
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
V
= (V +0.5 V) to 5.5 V
= 1 mA
V
out
1.764
2.450
2.695
2.744
2.940
−
−
−
−
−
−
1.836
2.550
2.805
2.856
3.060
in
out
I
out
3.234
(−2%)
3.366
(+2%)
Output Voltage (Note 3)
1.8 V
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
V
= (V +0.5 V) to 5.5 V
= 1 mA to 200 mA
V
out
1.746
2.425
2.6675
2.716
2.910
−
−
−
−
−
−
1.854
2.575
2.8325
2.884
3.090
V
in
out
I
out
3.201
(−3%)
3.399
(+3%)
Power Supply Ripple Rejection
V
in
= V +1.0 V + 0.5 V
p−p
PSRR
dB
out
I
C
= 1 mA to 150 mA
f = 120 Hz
f = 1 kHz
f = 10 kHz
−
−
−
80
80
65
−
−
−
out
= 100nF
noise
Line Regulation
V
= (V +0.5 V) to 5.5 V, I = 1 mA
Reg
−0.2
−
0.2
25
%/V
mV
in
out
out
line
load
n
Load Regulation
Output Noise Voltage
I
= 1 mA to 200 mA
Reg
−
12
out
f = 10 Hz to 100 kHz
= 1 mA to 150 mA C
V
mV
rms
I
= 100 nF
noise
−
−
15
20
−
−
out
C
= 10 nF
noise
Output Current Limit
V
= V
– 0.1 V
I
LIM
200
210
310
320
470
490
mA
out
out(nom)
Output Short Circuit Current
Dropout Voltage (Note 4, 5)
V
out
= 0 V
I
mA
mV
SC
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
I
= 150 mA
V
DO
−
−
−
−
−
105
105
105
100
100
155
155
155
150
150
out
Dropout Voltage (Note 6)
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
I
= 200 mA
V
DO
−
−
−
−
−
170
150
150
140
130
215
205
205
200
200
mV
out
GENERAL
Ground Current
I
I
= 1 mA
= 200 mA
I
−
−
70
110
90
220
mA
out
GND
out
Disable Current
V
CE
= 0 V
I
−
−
−
0.1
150
20
1
−
−
mA
°C
°C
DIS
Thermal Shutdown Threshold (Note 4)
Thermal Shutdown Hysteresis (Note 4)
CHIP ENABLE
T
T
SD
SH
Input Threshold
Low
High
Internal Pull−Down Resistance (Note 7)
V
−
1.2
−
−
0.4
−
V
th(CE)
R
2.5
5
10
MW
PD(CE)
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3
NCV8570
ELECTRICAL CHARACTERISTICS
(V = V + 0.5 V, V = 1.2 V, C = 0.1 mF, C = 1 mF, C
= 10 nF, T = −40°C to 85°C, unless otherwise specified (Note 2))
A
in
out
CE
in
out
noise
Characteristic
Test Conditions
Symbol
Min
Typ
Max
Unit
TIMING
Turn−on Time
I
= 150 mA
C
= 10 nF
= 100 nF
t
t
−
−
0.4
4
−
−
ms
out
noise
on
C
noise
Turn−off Time
C
= 10 nF/100 nF
I
= 1 mA
= 10 mA
−
−
800
200
−
−
ms
noise
out
off
I
out
2. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at
T = T = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
J
A
3. Contact factory for other voltage options.
4. Guaranteed by design and characterization.
5. Characterized when output voltage falls 100 mV below the regulated voltage at V = V + 1 V if V < 2.5 V, then V = V − V at V = 2.5 V.
in
out
out
DO
in
out
in
6. Measured when output voltage falls 100 mV below the regulated voltage at V = V + 0.5 V if V < 2.5 V, then V = V − V at V = 2.5 V.
in
out
out
DO
in
out
in
7. Expected to disable device when CE pin is floating.
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4
NCV8570
TYPICAL CHARACTERISTICS
2.520
1.820
1.815
1.810
1.805
1.800
1.795
1.790
V
= 2.5 V
out
2.515
2.510
2.505
2.500
2.495
2.490
2.485
2.480
V
out
= 1.8 V
I
= 1 mA
out
I
= 1 mA
out
I
= 150 mA
out
I
= 150 mA
out
1.785
1.780
−40 −20
0
20
40
60
80
100
−40
−20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 3. Output Voltage vs. Temperature
(Vout = 1.8 V)
Figure 4. Output Voltage vs. Temperature
(Vout = 2.5 V)
2.760
2.755
2.750
2.745
2.740
2.735
2.730
2.725
2.720
2.820
2.815
2.810
2.805
2.800
2.795
2.790
V
= 2.75 V
V
out
= 2.8 V
out
I
= 1 mA
out
I
= 1 mA
out
I
= 150 mA
out
I
= 150 mA
out
2.785
2.780
−40
−20
0
20
40
60
80
100
−40
−20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 5. Output Voltage vs. Temperature
(Vout = 2.75 V)
Figure 6. Output Voltage vs. Temperature
(Vout = 2.8 V)
3.320
3.315
3.310
3.305
3.300
3.295
3.290
3.285
3.280
3.020
3.015
3.010
3.005
V
out
= 3.0 V
V
= 3.3 V
out
I
= 1 mA
out
I
= 1 mA
out
3.000
2.995
2.990
I
= 150 mA
out
I
= 150 mA
out
2.985
2.980
−40
−20
0
20
40
60
80
100
−40
−20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 7. Output Voltage vs. Temperature
(Vout = 3.0 V)
Figure 8. Output Voltage vs. Temperature
(Vout = 3.3 V)
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NCV8570
TYPICAL CHARACTERISTICS
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
140
130
3.3 V
3.0 V
2.8 V
2.5 V
120
I
= 150 mA
out
110
100
90
1.8 V
80
I
= 1 mA
out
70
60
50
40
T = 25°C
A
I
= 1 mA
out
0.0
1.0
2.0
3.0
4.0
5.0
6.0
−40
−20
0
20
40
60
80
100
V , INPUT VOLTAGE (V)
in
T , AMBIENT TEMPERATURE (°C)
A
Figure 9. Output Voltage vs. Input Voltage
Figure 10. Ground Current vs. Temperature
135
130
125
120
115
110
105
100
95
200
180
160
140
120
100
80
T = 25°C
A
V
out
= 2.5 V
V
out
= 3.3 V
V
= 2.8 V
out
V
out
= 3.0 V
V
out
= 2.5 V
T = 85°C
A
I
= 150 mA
out
V
out
= 1.8 V
I
= 1 mA
T = 25°C
A
out
60
40
T = −40°C
A
90
20
85
0
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
25
50
, OUTPUT CURRENT (mA)
out
75
100
125
150
V , INPUT VOLTAGE (V)
in
I
Figure 11. Ground Current vs. Input Voltage
Figure 12. Dropout Voltage vs. Output Current
125
120
115
110
105
100
95
125
120
115
110
105
100
95
V
out
= 2.8 V
T = 85°C
A
V
out
= 3.0 V
T = 85°C
A
T = 25°C
A
T = 25°C
A
T = −40°C
A
T = −40°C
A
90
90
85
85
80
75
80
75
0
25
50
75
100
125
150
0
25
50
75
100
125
150
I
, OUTPUT CURRENT (mA)
I
out
, OUTPUT CURRENT (mA)
out
Figure 13. Dropout Voltage vs. Output Current
Figure 14. Dropout Voltage vs. Output Current
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6
NCV8570
TYPICAL CHARACTERISTICS
125
120
115
110
105
100
95
V
out
= 3.3 V
T = 85°C
A
T = 25°C
A
T = −40°C
A
90
85
80
75
0
25
50
75
100
125
150
I
, OUTPUT CURRENT (mA)
out
Figure 15. Dropout Voltage vs. Output Current
340
330
320
310
300
350
340
330
320
310
290
280
300
290
−40
−20
0
20
40
60
80
100
−40
−20
0
20
40
60
80
100
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 16. Current Limit vs. Temperature
Figure 17. Short Circuit Current vs.
Temperature
0
−10
−20
−30
−40
−50
−60
−70
−80
700
T = 25°C
A
T = 25°C
A
600
500
400
300
200
V
out
= 1.8 V
V
out
= 1.8 V
I
= 150 mA
out
I
= 150 mA
out
C
= 100 nF
noise
C
= 10 nF
noise
100
0
C
= 100 nF
100
noise
−90
−100
10
1,000
10,000
100,000
10
100
1,000
10,000
100,000
f, FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 18. PSRR vs. Frequency
Figure 19. Noise Density vs. Frequency
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7
NCV8570
TYPICAL CHARACTERISTICS
4.2 V
V
CE
3.6 V
1 V/div
V
in
500 mV/div
T = 25°C
A
V
out
= 1.8 V
I
= 150 mA
out
C
= 1 mF
out
T = 25°C
A
V
V
out
out
V
= 4 V
= 150 mA
in
10 mV/div
1 V/div
I
out
C
= 0 nF
noise
TIME (20 ms/div)
TIME (100 ms/div)
Figure 20. Enable Voltage and Output Voltage
Figure 21. Line Transient
vs. Time (Start−Up)
10
1
Unstable Region
T = 25°C
A
V
= 3.0 V
= 1.8 V
out
I
out
100 mA/div
V
out
Stable Region
V
out
0.1
50 mV/div
V
in
= 2.8 V
V
C
= 1.8 V
= 1 mF
out
C
= 1 mF to 10 mF
out
out
0.01
0
25
50
75
100
125
150
TIME (40 ms/div)
I
out
, OUTPUT CURRENT (mA)
Figure 22. Load Transient
Figure 23. Output Capacitor ESR vs. Output
Current
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NCV8570
APPLICATION INFORMATION
Output Noise
General
The NCV8570 is a 200 mA (current limited) linear
regulator with a logic input for on/off control for the high
speed turn−off output voltage.
Access to the major contributor of noise within the
integrated circuit is provided as the focus for noise reduction
within the linear regulator system.
The main contributor for noise present on the output pin
V is the reference voltage node. This is because any noise
out
which is generated at this node will be subsequently
amplified through the error amplifier and the PMOS pass
device. Access to the reference voltage node is supplied
directly through the C
pin. Noise can be reduced from
noise
a typical value of 20 mV by using 10 nF to 15 mV by
rms
rms
Power Up/Down
During power up, the NCV8570 maintains a high
impedance output (V ) until sufficient voltage is present on
using a 100 nF from the C
pin to ground.
noise
A bypass capacitor is recommended for good noise
performance and better load transient response.
out
V to power the internal bandgap reference voltage. When
in
sufficient voltage is supplied (approx 1.2 V), V will start
Thermal Shutdown
out
to turn on (assume CE shorted to V ), linearly increasing
When the die temperature exceeds the Thermal Shutdown
threshold, a Thermal Shutdown (TSD) event is detected and
in
until the output regulation voltage has been reached.
Active discharge circuitry has been implemented to insure
a fast turn off time. Then CE goes low, the active discharge
transistor turns on creating a fast discharge of the output
voltage. Power to drive this circuitry is drawn from the
output node. This is to maintain the lowest quiescent current
the output (V ) is turned off. There is no effect from the
out
active discharge circuitry. The IC will remain in this state
until the die temperature moves below the shutdown
threshold (150°C typical) minus the hysteresis factor (20°C
typical).
when in the sleep mode (V = 0.4 V). This circuitry
subsequently turns off when the output voltage discharges.
This feature provides protection from a catastrophic
device failure due to accidental overheating. It is not
intended to be used as a substitute for proper heat sinking.
The maximum device power dissipation can be calculated
by:
CE
CE (chip enable)
The enable function is controller by the logic pin CE. The
voltage threshold of this pin is set between 0.4 V and 1.2 V.
A voltage lower than 0.4 V guarantees the device is off. A
voltage higher than 1.2 V guarantees the device is on. The
NCV8570 enters a sleep mode when in the off state drawing
less than 1 mA of quiescent current.
TJ * TA
RqJA
PD
+
Thermal resistance value versus copper area and package is
shown in Figure 24.
The device can be used as a simple regulator without use
of the chip enable feature by tying the CE pin to the V pin.
380
330
280
in
Current Limit
Output Current is internally limited within the IC to a
minimum of 200 mA. The design is set to a higher value to
allow for variation in processing and the temperature
coefficient of the parameter. The NCV8570 will source this
amount of current measured with a voltage 100 mV lower
than the typical operating output voltage.
TSOP−5 (1 oz)
230
TSOP−5 (2 oz)
180
The specification for short circuit current limit (@ V
=
out
DFN6 2x2.2 (1 oz)
0 V) is specified at 320 mA (typ). There is no additional
circuitry to lower the current limit at low output voltages.
This number is provided for informational purposes only.
130
80
DFN6 2x2.2 (2 oz)
0
100
200
300
400
500
600 700
Output Capacitor
2
PCB COPPER AREA (mm )
The NCV8570 has been designed to work with low ESR
ceramic capacitors. There is no ESR lower limit for stability
for the recommended 1 mF output capacitor. Stable region
for Output capacitor ESR vs Output Current is shown in
Figure 23.
Figure 24. RqJA vs. PCB Copper Area
(TSOP−5 for comparison only)
Typical characteristics were measured with Murata
ceramic capacitors. GRM219R71E105K (1 mF, 25 V, X7R,
0805) and GRM21BR71A106K (10 mF, 10 V, X7R, 0805).
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9
NCV8570
ORDERING INFORMATION
Nominal Output
Voltage
Device
Marking
MT
Package
Shipping†
NCV8570MN180R2G
NCV8570MN250R2G
NCV8570MN275R2G
NCV8570MN280R2G
NCV8570MN300R2G
NCV8570MN330R2G
NCV8570SN18T1G
NCV8570SN25T1G
NCV8570SN275T1G
NCV8570SN28T1G
NCV8570SN30T1G
NCV8570SN33T1G
1.8 V
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
1.8 V
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
MU
DFN6
2x2.2
(Pb−Free)
MV
3000 / Tape & Reel
MW
MX
MY
ACV
ACW
ACX
ACY
ACZ
AC2
TSOP−5
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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10
NCV8570
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
NOTE 5
5X
D
0.20 C A B
2X
2X
0.10
T
T
M
5
4
3
0.20
B
S
1
2
K
L
DETAIL Z
G
A
MILLIMETERS
DIM
A
B
C
D
MIN
3.00 BSC
1.50 BSC
MAX
DETAIL Z
J
0.90
1.10
0.50
C
0.25
SEATING
PLANE
0.05
G
H
J
K
L
M
S
0.95 BSC
H
0.01
0.10
0.20
1.25
0
0.10
0.26
0.60
1.55
10
3.00
T
_
_
SOLDERING FOOTPRINT*
2.50
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
11
NCV8570
PACKAGE DIMENSIONS
6 PIN DFN, 2x2.2, 0.65P
CASE 506BA−01
ISSUE A
NOTES:
A
B
D
L
L
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM TERMINAL.
L1
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
DETAIL A
E
ALTERNATE TERMINAL
CONSTRUCTIONS
PIN ONE
REFERENCE
MILLIMETERS
DIM MIN
0.80
A1 0.00
MAX
1.00
0.05
0.30
2X
A
0.10
C
A3
EXPOSED Cu
MOLD CMPD
TOP VIEW
b
D
0.20
2.00 BSC
2X
D2 1.10
1.30
0.90
0.10
C
C
E
2.20 BSC
E2 0.70
A
A1
e
K
L
0.65 BSC
0.20
0.25
−−−
0.35
0.10
DETAIL B
DETAIL B
0.10
0.08
ALTERNATE
L1 0.00
CONSTRUCTIONS
7X
SOLDERING FOOTPRINT*
C
SIDE VIEW
A1
6X
0.58
SEATING
PLANE
1.36
C
PACKAGE
OUTLINE
D2
DETAIL A
6X L
e
6X
L1
3
1
2.50
0.96
E2
1
0.65
PITCH
6X
0.35
6
4
K
6X b
0.10
0.05
C
C
A B
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
NOTE 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
The products described herein (NCV8570), may be covered by one or more U.S. patents.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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