NCV8775CDT33RKG [ONSEMI]
Ultra Low Iq 350 mA LDO Regulator with Reset;
| 型号： | NCV8775CDT33RKG |
| 厂家： | 
ONSEMI |
| 描述： | Ultra Low Iq 350 mA LDO Regulator with Reset |
| 文件： | 总15页 (文件大小：225K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV8775C
Ultra Low Iq 350 mA LDO
Regulator with Reset
The NCV8775C is 350 mA LDO regulator with integrated reset
functions dedicated for microprocessor applications. Its robustness allows
NCV8775C to be used in severe automotive environments. Ultra low
quiescent current as low as 19 mA typical makes it suitable for
applications permanently connected to battery requiring ultra low
quiescent current with or without load. This feature is especially critical
when modules remain in active mode when ignition is off. The
NCV8775C contains protection functions as current limit, thermal
shutdown.
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MARKING
DIAGRAMS
DPAK−5
DT SUFFIX
CASE 175AA
Features
775CxxG
ALYWW
• Output Voltage Options: 3.3 V and 5 V
• Output Voltage Accuracy: 2%
• Output Current up to 350 mA
• Ultra Low Quiescent Current: typ 19 mA (max 28 mA)
• Very Wide Range of C and ESR Values for Stability
• Microprocessor Compatible Control Functions:
− Reset with Adjustable Delay
out
2
D PAK−5
NC
V8775Cxx
AWLYWWG
D5S SUFFIX
CASE 936A
• Wide Input Voltage Operation Range: up to 40 V
• Protection Features
− Current Limitation
− Thermal Shutdown
xx
A
= 50 (5.0 V Version)
= 33 (3.3 V Version)
= Assembly Location
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100 Grade 1
Qualified and PPAP Capable
WL, L = Wafer Lot
• EMC Compliant
Y
WW
= Year
= Work Week
• These are Pb−Free Devices
G or G = Pb−Free Package
Typical Applications
• Body Control Module
• Instruments and Clusters
• Occupant Protection and Comfort
• Powertrain
ORDERING INFORMATION
See detailed ordering and shipping information on page 12 of
this data sheet.
V
V
BAT
out
V
V
in
V
out
DD
C
C
in
out
10 mF
R
5 kW
0.1 mF
RO
NCV8775C
Microprocessor
RESET
D
RO
C
D
47 nF
GND
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
December, 2019 − Rev. 1
NCV8775C/D
NCV8775C
V
in
V
out
Thermal
Shutdown
RO
Driver
With
Current
Limit
Reset Driver
Error Amplifier
Reset Comparator
D
Reference
Delay
Timer
GND
Figure 2. Simplified Block Diagram
PIN CONNECTIONS
PIN 1. V
PIN 1. V
in
in
2. RO
Tab, 3. GND
4. D
2. RO
Tab, 3. GND
4. D
5. V
out
5. V
out
1
1
2
DPAK−5
D PAK−5
Figure 3. Pin Connections
PIN FUNCTION DESCRIPTION
Pin No.
DPAK−5
D2PAK−5
Pin Name
Description
1
V
Positive Power Supply Input. Connect 0.1 mF capacitor to ground.
Reset (Open Collector) Output. External Pull−up resistor connected to V
Power Supply Ground. Pin 3 internally connected to tab.
in
2
RO
GND
D
.
out
3, TAB
4
5
Reset Delay. Timing capacitor to GND for Reset Delay function.
V
out
Regulated Output Voltage. Connect 10 mF capacitor with ESR < 5 W to ground.
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2
NCV8775C
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Min
−0.3
−
Max
40
45
7
Unit
V
Input Voltage (Note 1)
DC
Load Dump − Suppressed
V
in
Input Voltage (Note 2)
Output Voltage
U *
s
V
V
out
−0.3
−0.3
−0.3
−40
−55
V
Reset Delay Voltage
Reset Output Voltage
Junction Temperature
Storage Temperature
V
D
7
V
V
RO
7
V
T
J
150
150
°C
°C
T
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in
production. Passed Class A according to ISO16750−1.
ESD CAPABILITY (Note 3)
Rating
ESD Capability, Human Body Model
ESD Capability, Charged Device Model
Symbol
Min
−4
Max
4
Unit
kV
ESD
ESD
HBM
CDM
−1
1
kV
3. This device series incorporates ESD protection and is tested by the following methods:
ESD HBM tested per AEC−Q100−002 (JS−001−2017)
Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes 2 x 2 mm due to
the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform
characteristic defined in JEDEC JS−002−2018.
LEAD SOLDERING TEMPERATURE AND MSL (Note 4)
Rating
Symbol
Min
Max
Unit
Moisture Sensitivity Level
DPAK−5
D2PAK−5
MSL
1
1
−
4. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
THERMAL CHARACTERISTICS (Note 5)
Rating
Symbol
Value
Unit
Thermal Characteristics, DPAK−5
°C/W
Thermal Resistance, Junction−to−Air (Note 6)
R
53.5
8.2
θJA
Thermal Reference, Junction−to−Lead (Note 6)
Thermal Resistance, Junction−to−Air (Note 7)
Thermal Reference, Junction−to−Lead (Note 7)
R
ψJL1
23.9
7.4
R
θJA
R
ψJL1
Thermal Characteristics, D2PAK−5
°C/W
Thermal Resistance, Junction−to−Air (Note 6)
Thermal Reference, Junction−to−Lead (Note 6)
Thermal Resistance, Junction−to−Air (Note 7)
Thermal Reference, Junction−to−Lead (Note 7)
R
53.3
7.6
θJA
R
ψJL1
23.7
6.9
R
θJA
R
ψJL1
5. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
6. Values based on 1s0p board with copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. Single layer − according
to JEDEC51.3.
7. Values based on 2s2p board with copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness for inner layers, 2 oz copper thickness for signal
layers and FR4 PCB substrate. 4 layers − according to JEDEC51.7.
RECOMMENDED OPERATING RANGE (Note 8)
Rating
Symbol
Min
4.5
Max
40
Unit
V
Input Voltage (Note 9)
Junction Temperature
V
in
T
J
−40
150
°C
8. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
9. Minimum V = 4.5 V or (V + V ), whichever is higher.
in
out
DO
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3
NCV8775C
ELECTRICAL CHARACTERISTICS V = 13.5 V, C = 0.1 mF, C = 10 mF, Min and Max values are valid for temperature range
in
in
out
−40°C ≤ T ≤ 150°C unless noted otherwise and are guaranteed by test, design or statistical correlation. Typical values are referenced to
J
T = 25°C (Notes 10 and 11)
J
Parameter
REGULATOR OUTPUT
Output Voltage (Accuracy %)
Test Conditions
Symbol
Min
Typ
Max
Unit
V
out
V
3.3 V V = 4.5 V to 40 V, I = 0.1 mA to 200 mA
3.234
3.234
4.9
3.3
3.3
5.0
5.0
3.366
3.366
5.1
in
out
V
in
= 4.5 V to 16 V, I = 0.1 mA to 350 mA
out
5.0 V V = 5.6 V to 40 V, I = 0.1 mA to 200 mA
in
in
out
V
= 5.975 V to 16 V, I = 0.1 mA to 350 mA
4.9
5.1
out
Line Regulation
Reg
−20
0
20
mV
line
3.3 V V = 4.5 V to 28 V, I = 5 mA
in
out
5.0 V V = 6 V to 28 V, I = 5 mA
in
out
Load Regulation
I
= 0.1 mA to 350 mA
Reg
−35
10
35
mV
mV
out
load
Dropout Voltage (Note 12)
V
DO
5.0 V I = 200 mA
−
−
200
350
350
600
out
I
= 350 mA
out
QUIESCENT CURRENT
Quiescent Current (I = I − I
)
I
q
mA
q
in
out
I
I
= 0.1 mA, T = 25°C
−
−
19
−
27
28
out
out
J
= 0.1 mA, T ≤ 125°C
J
CURRENT LIMIT PROTECTION
Current Limit
V
= 0.96 x V
= 0 V
I
500
500
−
−
1100
1100
mA
mA
out
out_nom
LIM
Short Circuit Current Limit
PSRR
V
out
I
SC
Power Supply Ripple Rejection (Note 13) f = 100 Hz, 0.5 V
D (RESET DELAY)
PSRR
−
80
−
dB
pp
Reset Charging Current
V
= 1.0 V
= 47 nF
I
2.0
1.2
10
4.0
1.3
16
6.5
1.4
22
mA
V
D
D
Upper Timing Threshold
V
DU
RD
RR
Reset Delay Time
C
t
t
ms
ms
D
Reset Reaction Time
6.0
RESET OUTPUT RO
Input Voltage Reset Threshold
V
decreasing, V > V
V
in_RT
V
in
out
RT
3.3 V
−
90
−
3.8
93
2.0
0.2
−
4.2
96
−
Output Voltage Reset Threshold
Reset Hysteresis
V
out
decreasing
V
RT
%V
%V
out
V
RH
out
Reset Output Low Voltage
Reset High Level Leakage Current
THERMAL SHUTDOWN
V
out
> 1 V, R > 5 kW
V
ROL
−
0.4
5
V
RO
I
−
mA
ROLK
Thermal Shutdown Temperature
(Note 13)
T
150
−
175
10
195
−
°C
°C
SD
Thermal Shutdown Hysteresis
(Note 13)
T
SH
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product per-
formance may not be indicated by the Electrical Characteristics if operated under different conditions.
10.Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
11. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T [ T . Low duty
A
J
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
12.Measured when output voltage falls 100 mV below the regulated voltage at V = 13.5 V.
in
13.Values based on design and/or characterization.
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4
NCV8775C
TYPICAL CHARACTERISTICS
30
28
26
24
22
20
18
16
14
12
10
30
V
= 13.5 V
= 100 mA
V
= 13.5 V
= 100 mA
in
in
28
26
24
22
20
18
16
14
12
10
I
I
out
out
V
= 5.0 V
V
= 3.3 V
out(nom)
out(nom)
−40 −20
0
20 40 60 80 100 120 140 160
−40 −20
0
20 40 60 80 100 120 140 160
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 4. Quiescent Current vs. Junction
Temperature
Figure 5. Quiescent Current vs. Junction
Temperature
800
700
600
500
400
300
200
100
0
800
700
600
500
400
300
200
100
0
I
= 100 mA
out
I
= 100 mA
out
T = 25°C
V
J
T = 25°C
V
J
= 3.3 V
out(nom)
= 5.0 V
out(nom)
0
4
8
12 16 20
24
28
32 36 40
0
4
8
12 16 20
24
28
32 36 40
V , INPUT VOLTAGE (V)
in
V , INPUT VOLTAGE (V)
in
Figure 6. Quiescent Current vs. Input Voltage
Figure 7. Quiescent Current vs. Input Voltage
1200
1000
800
600
400
200
0
1200
1000
800
600
400
200
0
V
V
= 13.5 V
V
V
= 13.5 V
in
in
T = −40°C
J
= 3.3 V
= 5.0 V
out(nom)
out(nom)
T = −40°C
J
T = 25°C
J
T = 25°C
J
T = 150°C
J
T = 150°C
J
0
50
100
150
200
250
300
350
0
50
100
150
200
250
300
350
I , OUTPUT CURRENT (mA)
OUT
I
, OUTPUT CURRENT (mA)
out
Figure 8. Quiescent Current vs. Output Current
Figure 9. Quiescent Current vs. Output Current
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5
NCV8775C
TYPICAL CHARACTERISTICS
5.10
3.38
V
= 13.5 V
= 100 mA
V
= 13.5 V
= 100 mA
in
in
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
I
I
out
out
V
= 5.0 V
V
= 3.3 V
out(nom)
out(nom)
−40 −20
0
20
40 60
80 100 120 140 160
−40 −20
0
20 40 60 80 100 120 140 160
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 10. Output Voltage vs. Junction
Temperature
Figure 11. Output Voltage vs. Junction
Temperature
4
3.5
3
6
5
4
3
2
1
0
I
V
= 100 mA
I
V
= 100 mA
out
out
= 3.3 V
= 5.0 V
out(nom)
out(nom)
2.5
2
T = 25°C
J
1.5
1
T = −40°C
J
T = 25°C
J
T = −40°C
T = 150°C
J
J
0.5
0
T = 150°C
J
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
V , INPUT VOLTAGE (V)
in
V , INPUT VOLTAGE (V)
in
Figure 12. Output Voltage vs. Input Voltage
Figure 13. Output Voltage vs. Input Voltage
700
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
V
V
= 13.5 V
V
= 13.5 V
in
in
= 5.0 V
V = 5.0 V
out(nom)
out(nom)
I
I
= 350 mA
= 200 mA
out
T = 25°C
J
T = 150°C
out
J
T = −40°C
J
−40 −20
0
20 40 60 80 100 120 140 160
0
50
100
150
200
250
300
350
I
, OUTPUT CURRENT (mA)
T , JUNCTION TEMPERATURE (°C)
J
out
Figure 14. Dropout Voltage vs. Output Current
Figure 15. Dropout Voltage vs. Junction
Temperature
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NCV8775C
TYPICAL CHARACTERISTICS
1000
800
600
400
200
0
1000
I
@ V = 0 V
out
SC
I
@ V = 0 V
out
SC
800
600
400
200
0
I
@ V = 3.168 V
out
LIM
I
@ V = 4.8 V
out
LIM
T = 25°C
out(nom)
T = 25°C
out(nom)
J
V
J
V
= 5.0 V
= 3.3 V
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
V , INPUT VOLTAGE (V)
in
V , INPUT VOLTAGE (V)
in
Figure 16. Output Current Limit vs. Input
Voltage
Figure 17. Output Current Limit vs. Input
Voltage
1100
1000
900
800
700
600
500
400
1100
1000
900
800
700
600
500
400
V
V
= 13.5 V
V
= 13.5 V
in
in
= 5.0 V
V = 3.3 V
out(nom)
out(nom)
I
@ V = 0 V
SC
out
I
@ V = 0 V
I
@ V = 3.168 V
SC
out
LIM
out
I
@ V = 4.8 V
LIM
out
−40 −20
0
20 40 60 80 100 120 140 160
−40 −20
0
20 40 60 80 100 120 140 160
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 18. Output Current Limit vs. Junction
Temperature
Figure 19. Output Current Limit vs. Junction
Temperature
100
10
100
10
Unstable Region
Stable Region
Unstable Region
Stable Region
1
1
0.1
0.01
0.1
0.01
V
= 13.5 V
V = 13.5 V
in
in
V
= 5.0 V
V
= 3.3 V
out(nom)
out(nom)
Cout = 1.0 mF − 100 mF
Cout = 1.0 mF − 100 mF
0
50
100
I , OUTPUT CURRENT (mA)
out
150
200
250
300
350
0
50
100
150
200
250
300
350
I
, OUTPUT CURRENT (mA)
out
Figure 20. Output Stability with Output
Capacitor ESR
Figure 21. Output Stability with Output
Capacitor ESR
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NCV8775C
TYPICAL CHARACTERISTICS
4.8
4.75
4.7
3.17
V
= 13.5 V
V = 13.5 V
in
in
V
= 5.0 V
V
= 3.3 V
out(nom)
out(nom)
3.13
3.09
3.05
3.01
2.97
4.65
4.6
4.55
4.5
−40 −20
0
20 40 60 80 100 120 140 160
−40 −20
0
20
40
60 80 100 120 140 160
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 22. Reset Threshold vs. Junction
Temperature
Figure 23. Reset Threshold vs. Junction
Temperature
4.2
V
= 13.5 V
in
4.1
4.0
V
= 3.3 V
out(nom)
3.9
3.8
3.7
3.6
3.5
3.4
−40 −20
0
20 40 60 80 100 120 140 160
T , JUNCTION TEMPERATURE (°C)
J
Figure 24. Input Voltage Reset Threshold vs.
Junction Temperature
22
20
18
16
14
12
10
22
20
18
16
14
12
10
V
C
= 13.5 V
= 47 nF
V
= 13.5 V
C = 47 nF
D
in
in
D
V
= 5.0 V
V
= 3.3 V
out(nom)
out(nom)
−40 −20
0
20 40
60
80 100 120 140 160
−40 −20
0
20
40
60
80 100 120 140 160
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 25. Reset Delay Time vs. Junction
Temperature
Figure 26. Reset Delay Time vs. Junction
Temperature
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NCV8775C
TYPICAL CHARACTERISTICS
120
100
80
60
40
20
0
6000
5500
5000
f = 10 Hz − 100 kHz
V = 268 mV
n
4500
I
= 100 mA
out
4000
3500
3000
2500
2000
I
= 100 mA
out
V
= 13.5 V
1500
1000
500
0
in
C
I
= 1 mF
V
= 13.5 V 0.5 V
out
in
PP
= 100 mA
C
V
= 1 mF
out
out
V
= 5.0 V
= 5.0 V
out(nom)
out(nom)
10
100
1000
10000
100000 1000000
10
100
1000
f, FREQUENCY (Hz)
10000
100000
f, FREQUENCY (Hz)
Figure 27. PSRR vs. Frequency
Figure 28. Noise vs. Frequency
T = 25°C
in
J
V
28 V
T = 25°C
J
= 13.5 V
I
C
= 100 mA
C
t
= 10 mF
350 mA
out
out
= 10 mF
= 1 ms (I
)
out
out
rise/fall
t
= 1 ms (V )
in
rise/fall
V
I
out
in
6 V
(10 V/div)
(200 mA/div)
0.1 mA
5.17 V
V
out
5 V
5.012 V
5 V
(200 mV/div)
V
out
4.78 V
(20 mV/div)
4.995 V
TIME (400 ms/div)
TIME (100 ms/div)
Figure 29. Line Transients
Figure 30. Load Transients
T = 25°C
J
I
C
C
= 100 mA
V
out
in
13.5 V
= 10 mF
(5 V/div)
out
= 47 nF
D
t
= 1 s (V )
in
rise/fall
0 V
V
out
0 V
0 V
(5 V/div)
V
RO
(5 V/div)
TIME (400 ms/div)
Figure 31. Power Up/Down Response
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NCV8775C
V
in
t
t
t
V
out
< t
> t
RR
RR
V
+ V
RT
RH
RT
V
V
RO
t
RR
t
RR
V
ROL
V
D
t
RD
t
RD
V
DU
t
Figure 32. Reset Function and Timing Diagram
DEFINITIONS
General
Current Limit and Short Circuit Current Limit
Current Limit is value of output current by which output
voltage drops below 96% of its nominal value. Short Circuit
Current Limit is output current value measured with output
of the regulator shorted to ground.
All measurements are performed using short pulse low
duty cycle techniques to maintain junction temperature as
close as possible to ambient temperature.
Output voltage
The output voltage parameter is defined for specific
temperature, input voltage and output current values or
specified over Line, Load and Temperature ranges.
PSRR
Power Supply Rejection Ratio is defined as ratio of output
voltage and input voltage ripple. It is measured in decibels
(dB).
Line Regulation
The change in output voltage for a change in input voltage
measured for specific output current over operating ambient
temperature range.
Line Transient Response
Typical output voltage overshoot and undershoot
response when the input voltage is excited with a given
slope.
Load Regulation
The change in output voltage for a change in output
current measured for specific input voltage over operating
ambient temperature range.
Load Transient Response
Typical output voltage overshoot and undershoot
response when the output current is excited with a given
slope between low−load and high−load conditions.
Dropout Voltage
The input to output differential at which the regulator
output no longer maintains regulation against further
reductions in input voltage. It is measured when the output
drops 100 mV below its nominal value. The junction
temperature, load current, and minimum input supply
requirements affect the dropout level.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 175°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Quiescent Current
Quiescent Current (I ) is the difference between the input
current (measured through the LDO input pin) and the
output load current.
Maximum Package Power Dissipation
q
The power dissipation level is maximum allowed power
dissipation for particular package or power dissipation at
which the junction temperature reaches its maximum
operating value, whichever is lower.
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10
NCV8775C
APPLICATIONS INFORMATION
VDU
The NCV8775C regulator is self−protected with internal
thermal shutdown and internal current limit. Typical
characteristics are shown in Figure 4 to Figure 34.
tRD + CD
ID
(eq. 1)
1.3 V
tRD + 47 nF
+ 15.3 ms
Input Decoupling (Cin)
4 mA
A ceramic or tantalum 0.1 mF capacitor is recommended
and should be connected close to the NCV8775C package.
Higher capacitance and lower ESR will improve the overall
line and load transient response.
Input Capacitor is required if regulator is located far from
power supply filter. If extremely fast input voltage transients
are expected with slew rate in excess of 4 V/ms then
appropriate input filter must be used. The filter can be
composed of several capacitors in parallel.
Other time delays can be obtained by changing the C
capacitor value. The Delay Time can be reduced by
D
decreasing the capacitance of C . Using the formula above,
D
Delay can be reduced as desired. For minimum reset delay
time Delay pin must be left open with no PCB trace
connected to the pin.
Thermal Considerations
As power in the NCV8775C increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the NCV8775C has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
NCV8775C can handle is given by:
Output Decoupling (Cout
)
The NCV8775C is a stable component and does not
require a minimum Equivalent Series Resistance (ESR) for
the output capacitor. Stability region of ESR vs Output
Current is shown in Figures 20 and 21. The minimum output
decoupling value is 1 mF and can be augmented to fulfill
stringent load transient requirements. The regulator works
with ceramic chip capacitors as well as tantalum devices.
Larger values improve noise rejection and load regulation
transient response.
ƪT
ƫ
J(max) * TA
(eq. 2)
PD max
+
(
)
Reset Operation
RqJA
A reset signal is provided on the Reset Output (RO) pin to
provide feedback to the microprocessor of an out of
regulation condition. The timing diagram of reset function
is shown in Figure 32. This is in the form of a logic signal on
RO. Output voltage conditions below the Reset threshold
Since T is not recommended to exceed 150°C, then the
J
2
NCV8775C soldered on 645 mm , 1 oz copper area, FR4
can dissipate up to 2.35 W (for D2PAK−5) when the ambient
temperature (T ) is 25°C. See Figures 33 and 34 for R
A
qJA
versus PCB area. The power dissipated by the NCV8775C
can be calculated from the following equations:
cause RO to go low. RO is pulled up to V by an external
out
resistor, typically 5.0 kW in value. Output voltage regulation
must be maintained for the delay time before the reset output
signals a valid condition. The delay for the reset output is
defined as the amount of time it takes the timing capacitor
on the delay pin to charge from a residual voltage of 0 V to
ǒ
Ǔ
ǒ
Ǔ
(eq. 3)
(eq. 4)
PD + Vin Iq@Iout ) Iout Vin * Vout
or
ǒ
Ǔ
PD(max) ) Vout Iout
the upper timing threshold voltage V
charging current for this is I of 4 mA and D pin voltage in
of 1.3 V. The
Vin(max)
+
DU
Iout ) Iq
D
NOTE: Items containing I can be neglected if I >> I .
steady state is typically 0 V. By using typical IC parameters
with a 47 nF capacitor on the D Pin, the following time delay
is derived:
q
out
q
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11
NCV8775C
110
100
90
80
70
60
50
40
30
20
10
0
110
100
90
80
70
60
50
40
30
20
10
0
1 oz, Single Layer
2 oz, Single Layer
1 oz, Single Layer
2 oz, Single Layer
1 oz, 4 Layer
400
1 oz, 4 Layer
400
0
200
600
800
1000
0
200
600
800
1000
2
2
COPPER HEAT SPREADER AREA (mm )
Figure 33. Thermal Resistance vs. PCB Copper
Area (DPAK−5)
COPPER HEAT SPREADER AREA (mm )
Figure 34. Thermal Resistance vs. PCB Copper
Area (D2PAK−5)
Hints
The NCV8775C is not developed in compliance with
ISO26262 standard. If application is safety critical then the
above application example diagram shown in Figure 35 can
be used.
V
and GND printed circuit board traces should be as
in
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external filter components, especially
the output capacitor, as near as possible to the device to
increase EMC performance.
Vout
VBAT
Vin
Vout
VDD
Cout
Cin
VCC
I/O
RESET
Voltage
NCV8775C
Microprocessor
Supervisor
(e.g. NCV30X, NCV809)
GND
I/O
D
RO
CD
GND
Figure 35. NCV8775C Application Diagram
ORDERING INFORMATION
Device
†
Output Voltage
Package
Shipping
NCV8775CDT33RKG
3.3 V
DPAK−5
(Pb−Free)
2500 / Tape & Reel
2500 / Tape & Reel
800 / Tape & Reel
800 / Tape & Reel
NCV8775CDT50RKG
NCV8775CDS33R4G
NCV8775CDS50R4G
5.0 V
3.3 V
5.0 V
DPAK−5
(Pb−Free)
D2PAK−5
(Pb−Free)
D2PAK−5
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
12
NCV8775C
PACKAGE DIMENSIONS
DPAK−5, CENTER LEAD CROP
CASE 175AA
ISSUE B
NOTES:
SEATING
−T−
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
PLANE
C
2. CONTROLLING DIMENSION: INCH.
B
R
INCHES
DIM MIN MAX
MILLIMETERS
E
V
R1
MIN
5.97
6.35
2.19
0.51
0.46
0.61
MAX
6.22
6.73
2.38
0.71
0.58
0.81
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.020 0.028
0.018 0.023
0.024 0.032
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.045 BSC
Z
A
K
S
1 2 3 4
5
4.56 BSC
U
0.87
0.46
2.60
1.01
0.58
2.89
K
L
F
1.14 BSC
J
R
0.170 0.190
4.32
4.70
0.63
0.51
0.89
3.93
4.83
5.33
1.01
−−−
1.27
4.32
R1 0.185 0.210
L
H
S
U
V
Z
0.025 0.040
0.020 −−−
0.035 0.050
0.155 0.170
D 5 PL
M
G
0.13 (0.005)
T
RECOMMENDED
SOLDERING FOOTPRINT*
6.4
0.252
2.2
0.086
0.34
0.013
5.8
0.228
5.36
0.217
10.6
0.417
0.8
0.031
mm
inches
ǒ
Ǔ
SCALE 4:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
13
NCV8775C
PACKAGE DIMENSIONS
D2PAK 5−LEAD
CASE 936A−02
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A
AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 6.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED 0.025
(0.635) MAXIMUM.
−T−
TERMINAL 6
OPTIONAL
CHAMFER
A
E
U
S
K
V
B
H
1
2
3
4 5
INCHES
MILLIMETERS
M
L
DIM
A
B
C
D
E
MIN
MAX
0.403
0.368
0.180
0.036
0.055
MIN
9.804
9.042
4.318
0.660
1.143
MAX
10.236
9.347
4.572
0.914
1.397
0.386
0.356
0.170
0.026
0.045
D
P
N
M
0.010 (0.254)
T
G
R
G
H
K
L
M
N
P
0.067 BSC
1.702 BSC
14.707
1.270 REF
0.539
0.579 13.691
0.050 REF
0.000
0.088
0.018
0.058
0_
0.010
0.102
0.026
0.078
8_
0.000
2.235
0.457
1.473
0_
0.254
2.591
0.660
1.981
8_
C
R
S
0.116 REF
2.946 REF
U
V
0.200 MIN
0.250 MIN
5.080 MIN
6.350 MIN
SOLDERING FOOTPRINT
8.38
0.33
1.702
0.067
10.66
0.42
1.016
0.04
3.05
0.12
16.02
0.63
mm
inches
ǒ
Ǔ
SCALE 3:1
2
5−LEAD D PAK
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14
NCV8775C
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◊
NCV8775C/D
相关型号：
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IC 2.5 A SWITCHING REGULATOR, 230 kHz SWITCHING FREQ-MAX, PDSO16, SO-16, Switching Regulator or Controller
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