NCV8800HDW75R2G
更新时间:2024-09-18 13:01:38
品牌:ONSEMI
描述:Synchronous Automotive Buck Regulator, SO-16 WB, 1000-REEL
NCV8800HDW75R2G 概述
Synchronous Automotive Buck Regulator, SO-16 WB, 1000-REEL 开关式稳压器或控制器
NCV8800HDW75R2G 规格参数
是否无铅: | 不含铅 | 生命周期: | Obsolete |
零件包装代码: | SOIC | 包装说明: | SOP-16 |
针数: | 16 | Reach Compliance Code: | unknown |
ECCN代码: | EAR99 | HTS代码: | 8542.39.00.01 |
Factory Lead Time: | 1 week | 风险等级: | 5.19 |
Is Samacsys: | N | 模拟集成电路 - 其他类型: | SWITCHING REGULATOR |
控制模式: | CURRENT/VOLTAGE-MODE | 控制技术: | PULSE WIDTH MODULATION |
最大输入电压: | 16 V | 最小输入电压: | 3.5 V |
标称输入电压: | 13.5 V | JESD-30 代码: | R-PDSO-G16 |
JESD-609代码: | e3 | 长度: | 10.3 mm |
湿度敏感等级: | 3 | 功能数量: | 1 |
端子数量: | 16 | 最高工作温度: | 125 °C |
最低工作温度: | -40 °C | 最大输出电流: | 2.5 A |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | SOP |
封装等效代码: | SOP16,.4 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 峰值回流温度(摄氏度): | 260 |
认证状态: | Not Qualified | 座面最大高度: | 2.65 mm |
子类别: | Switching Regulator or Controllers | 表面贴装: | YES |
切换器配置: | BUCK | 最大切换频率: | 230 kHz |
温度等级: | AUTOMOTIVE | 端子面层: | Tin (Sn) |
端子形式: | GULL WING | 端子节距: | 1.27 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
宽度: | 7.5 mm | Base Number Matches: | 1 |
NCV8800HDW75R2G 数据手册
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PDF下载NCV8800 Series
Synchronous Buck Regulator
with 1.0 Amp Switch
The NCV8800 is an automotive synchronous step−down buck
regulator. This part provides an efficient step−down voltage compared
to linear regulators. The NCV8800 uses very few external components
allowing for maximum use of printed circuit board space.
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Features
• Output Voltage Options: 2.6 V, 3.3 V, 5.0 V, 7.5 V
• ±3.0% Output
• 3.5 V Operation
SO−16L
DW SUFFIX
CASE 751G
16
1
• AUXILIARY Hold Up Pin (for Cranking Conditions)
• On−Chip Switching Power Devices (0.4 Ω R
• Constant Frequency
• Synchronous Operation
)
DS(ON)
PIN CONNECTIONS AND
MARKING DIAGRAM
• On−Chip Charge Pump Control Circuitry
• Nonoverlap Logic
1
16
V
IN
AUXILIARY
• Power Up Sequencing Control Option (2.6 V and 3.3 V Only)
• ENABLE Battery Voltage Capable Option
• Selectable Reset Delay
ENABLE
RESET
GND
CP
SWITCH
GND
GND
GND
DELAY
V
NC
COMP
• Dual Pin Feedback Connection
• V Control Topology
• Internally Fused Leads in SO−16L Package
IN2
FB1
FB2
2
• NCV Prefix for Automotive and Other Applications Requiring Site
x
= Voltage Ratings as Indicated Below:
2 = 2.6 V
and Change Control
3 = 3.3 V
5 = 5.0 V
Typical Applications
7 = 7.5 V
• Telecommunications
• Mobile Multimedia
y
= ENABLE Option as Indicated Below:
S = Sequenced
• Instrumentation
• Automotive Entertainment Systems
H = High Voltage
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
A
100
90
80
70
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
V
= 7.5 V
OUT
60
50
40
30
20
10
0
V
OUT
= 5.0 V
V
OUT
= 3.3 V
V
OUT
= 2.6 V
V
= 13.5 V
L =100 mH
IN
0
100
200
300
400
500
600
700
800
LOAD CURRENT (mA)
Figure 1. Efficiency vs. Load Current
Semiconductor Components Industries, LLC, 2003
1
Publication Order Number:
September, 2003 − Rev. 10
NCV8800/D
NCV8800 Series
Auxiliary Supply
(optional)
External Regulator
0.01 µF
MRA4004T3
AUXILIARY
ENABLE
RESET
GND
V
IN
CP
SWITCH
GND
0.1 µF
10 µF*
5.1 k
100 Ω
V
BAT
GND
DELAY
FB1
GND
V
IN2
NC
1.0 k
0.01 µF
FB2
COMP
100 µH
100 µF
0.1 µF
RESET
V
OUT
*The supply capacitor
must be located
physically close to
the IC pins.
Figure 2. Application Diagram
Figure 3. Typical Operation With An 8.0 W Load
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2
NCV8800 Series
MAXIMUM RATINGS*
Rating
Value
Unit
V
Supply Voltages, V , V
−0.3 to 45
−0.3 to 8.0
−0.3 to 7.0
−0.3 to 8.0
−0.3 to 30
−0.3 to 7.0
−1.0 to 45
−40 to 150
−55 to 150
IN
IN2
AUXILIARY
V
ENABLE (Sequenced Option)
ENABLE (High Voltage Option)
RESET
V
V
V
DELAY
V
SWITCH (V
= 0 V)
V
5VSENSE
Operating Junction Temperature
Storage Temperature Range
°C
°C
ESD −Human Body Model (AUXILIARY, ENABLE, RESET, DELAY, FB1, FB2, CP, SWITCH, COMP)
2.0
1.3
200
kV
kV
V
Human Body Model (VIN, VIN2)
Machine Model (All Pins)
Package Thermal Resistance, SO−16L
Junction−to−Case, R
°C/W
18
80
q
JC
Junction−to−Ambient, R
q
JA
Lead Temperature Soldering:
Reflow (SMD Style Only) (Note 1)
240 Peak
(Note 2)
°C
1. 60 second maximum above 183°C.
2. −5°C/+0°C allowable condition.
*The maximum package power dissipation must be observed.
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3
NCV8800 Series
ELECTRICAL CHARACTERISTICS (−40°C ≤ T ≤ 125°C; Sequenced ENABLE Option: 3.5 V ≤ V ≤ 16 V,
J
IN
3.5 V ≤ V
≤ 16 V, AUXILIARY = 6.0 V, ENABLE = 5.0 V; High Voltage ENABLE Option: 6.0 V ≤ V ≤ 16 V, 6.0 V ≤ V ≤ 16 V;
IN2
IN2
IN
unless otherwise stated.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
General
Quiescent Current (V
Sleep Mode
Operating
)
ENABLE = 0 V, V = 12.6 V,
−
−
−
−
40
30
µA
µA
IN2
IN
T = −40°C
J
ENABLE = 0 V, V = 12.6 V,
IN
T = 25°C, 125°C
J
ENABLE = 5.0 V, V = 13.5 V, I
= 0
−
−
15
230
95
mA
kHz
%
IN
OUT
Switching Frequency
Switching Duty Cycle
Thermal Shutdown
Feedback
−
180
85
200
90
−
Note 3
150
165
200
°C
Feedback Voltage Threshold, 2.6 V Option (V
Feedback Voltage Threshold, 3.3 V Option (V
Feedback Voltage Threshold, 5.0 V Option (V
Feedback Voltage Threshold, 7.5 V Option (V
RESET
)
FB
)
FB
)
FB
)
FB
−
−
−
−
2.522
3.201
4.850
7.275
2.6
3.3
5.0
7.5
2.678
3.399
5.150
7.725
V
V
V
V
V
OUT
V
OUT
Increasing
Decreasing
2.44
2.40
−
−
V
V
V
FB
Undervoltage RESET Threshold, 2.6 V Option
V
− 0.04
FB
Undervoltage RESET Hysteresis, 2.6 V Option
Overvoltage RESET Threshold, 2.6 V Option
Overvoltage RESET Hysteresis, 2.6 V Option
Undervoltage RESET Threshold, 3.3 V Option
Undervoltage RESET Hysteresis, 3.3 V Option
Overvoltage RESET Threshold, 3.3 V Option
Overvoltage RESET Hysteresis, 3.3 V Option
Undervoltage RESET Threshold, 5.0 V Option
Undervoltage RESET Hysteresis, 5.0 V Option
Overvoltage RESET Threshold, 5.0 V Option
Overvoltage RESET Hysteresis, 5.0 V Option
Undervoltage RESET Threshold, 7.5 V Option
Undervoltage RESET Hysteresis, 7.5 V Option
Overvoltage RESET Threshold, 7.5 V Option
−
−
−
−
−
−
−
−
40
−
−
mV
V
V
Increasing
Decreasing
V
+ 0.04
−
−
2.80
2.76
V
V
OUT
OUT
FB
V
FB
40
−
−
mV
V
OUT
V
OUT
Increasing
Decreasing
3.10
3.04
−
−
V
FB
V
V
V
− 0.05
FB
50
−
−
mV
V
OUT
V
OUT
Increasing
Decreasing
V
FB
+ 0.05
−
−
3.56
3.51
V
V
V
FB
50
−
−
mV
V
OUT
V
OUT
Increasing
Decreasing
4.70
4.61
−
−
V
FB
V
V
V
FB
− 0.075
75
−
−
mV
V
OUT
V
OUT
Increasing
Decreasing
V
FB
+ 0.075
−
−
5.39
5.31
V
V
V
FB
75
−
−
mV
V
OUT
V
OUT
Increasing
Decreasing
7.05
6.92
−
−
V
FB
V
V
V
FB
− 0.115
115
−
−
mV
V
OUT
V
OUT
Increasing
Decreasing
V
FB
+ 0.115
−
−
8.08
7.96
V
V
V
FB
Overvoltage RESET Hysteresis, 7.5 V Option
3. Guaranteed By Design.
115
−
−
mV
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4
NCV8800 Series
ELECTRICAL CHARACTERISTICS (continued) (−40°C ≤ T ≤ 125°C; Sequenced ENABLE Option: 3.5 V ≤ V ≤ 16 V,
J
IN
3.5 V ≤ V
≤ 16 V, AUXILIARY = 6.0 V, ENABLE = 5.0 V; High Voltage ENABLE Option: 6.0 V ≤ V ≤ 16 V, 6.0 V ≤ V ≤ 16 V;
IN2
IN2
IN
unless otherwise stated.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
RESET
RESET Leakage Current
RESET Output Low Voltage
RESET Delay
RESET = 5.25 V
= 1.6 mA
−
−
−
−
25
µA
I
0.4
V
OUT
DELAY Connected to FB1, FB2
DELAY = 0 V
28.70
14.35
32.60
16.30
36.66
18.33
ms
ms
ENABLE
ENABLE Threshold
Increasing
Decreasing
1.1
1.0
1.9
1.6
2.3
2.2
V
V
ENABLE Hysteresis
ENABLE Input Resistance
DELAY
−
100
50
250
100
550
200
mV
ENABLE = 5.25 V, V = 13.5 V
kW
IN2
DELAY Input Current
SWITCH
DELAY = 5.15 V
4.0
10
16
µA
SWITCH ON Resistance
I
= 0.5 A, T = −40°C, 25°C
−
−
0.40
0.55
0.60
0.75
Ω
Ω
SWITCH
J
I
= 0.5 A, T = 125°C
SWITCH
J
Current Limit
−
1.0
1.6
2.5
A
Error Amplifier
Error Amplifier Transconductance
2.6 V Option
3.3 V Option
5.0 V Option
7.5 V Option
2.58 V ≤ FB1 ≤ 2.62 V
2.58 V ≤ FB2 ≤ 2.62 V
3.275 V ≤ FB1 ≤ 3.325 V
3.275 V ≤ FB2 ≤ 3.325 V
4.962 V ≤ FB1 ≤ 5.038 V
4.962 V ≤ FB2 ≤ 5.038 V
7.442 V ≤ FB1 ≤ 7.558 V
7.442 V ≤ FB2 ≤ 7.558 V
0.55
0.43
0.28
0.19
−
−
−
−
2.10
1.65
1.09
0.73
1/m
Ω
Error Amplifier Bandwidth
Note 4
1.0
−
−
MHz
Output Tracking (Sequencing)
Feedback to ENABLE Tracking Voltage, 2.6 V Option
−
−
60
80
67
85
75
90
%
%
Feedback to ENABLE Tracking Voltage, 3.3 V Option
4. Guaranteed By Design.
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5
NCV8800 Series
PACKAGE PIN DESCRIPTION
PACKAGE LEAD #
LEAD SYMBOL
FUNCTION
1
2
3
AUXILIARY
ENABLE
RESET
Alternate path for voltage input to the IC.
Sense for powerup. This pin must be high before SWITCH turns on.
CMOS compatible open drain output lead. RESET goes low whenever FB1 or FB2 is
below the RESET low threshold, or above the RESET high threshold.
4, 5, 12, 13
GND
DELAY
FB1
Ground.
6
7
RESET delay control. Time is doubled when pin moved to FB1 or FB2 from 0 V.
Voltage feedback to error amplifier. Shorted with FB2.
Voltage feedback to error amplifier. Shorted with FB1.
Loop compensation node for error amplifier. (1.0 kΩ and 0.1 µF to ground).
No connection.
8
FB2
9
COMP
NC
10
11
14
15
16
V
IN2
Supply input voltage for internal bias circuitry.
Drive for external inductor.
SWITCH
CP
Node for charge pump bootstrap capacitor.
Supply input voltage for output drivers.
V
IN
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6
100 W
V
IN2
CP
0.1 mF
BIAS
MRA4004T3
AUXILIARY
V
IN
UVLO
OVLO
Current Limit
Power Up/Down
Sequence
V
BAT
ENABLE
CP Control
and ENABLE
0.01 µF
UVLO
OVLO
PWM COMP
FB1
FB2
+
−
0.4 Ω
0.4 Ω
R
Q
Nonoverlap
Logic and Drive
LATCH
2.6 V
S
Q
200 kHz
OSC
SWITCH
33 µH
100 µF
Thermal Shutdown
Current Limit
ART Ramp
COMP
Error Amp
1 k
GND
−
+
0.1 mF
POR
Timer
5.1 k
Over/Under
Voltage
RESET
RESET COMP
−
+
Bandgap
Voltage
Reference
DELAY
NCV8800 Series
CIRCUIT DESCRIPTION
RESET
ENABLE
The NCV8800 remains in sleep mode drawing less than
25 µA of quiescent current until the ENABLE pin is brought
high powering up the device. There are two options
available for the ENABLE feature.
• Option 1 (Sequenced). The output voltage tracks the
ENABLE pin with a maximum delta voltage between
them (reference the Output Tracking specs in the
Electrical Characteristics). This allows the device to be
used with microprocessors requiring dual supply
voltages. One voltage is typically needed to power the
core of the microprocessor, and another high voltage is
needed to power the microprocessor I/O.
The RESET is an open drain output which goes low when
the feedback voltage on FB1 and FB2 goes below the
undervoltage RESET threshold. The output also goes low
when the voltage on FB1 and FB2 exceeds the overvoltage
RESET threshold. The RESET output is an open drain
output capable of sinking 1.6 mA.
FB1 and FB2
FB1 and FB2 are the feedback pins to the error amplifier,
which control the output SWITCH as needed to the
regulated output. They are internally wire bonded to the
same electrical connection providing double protection for
an open circuit which would cause the buck regulator to rise
• Option 2 (High Voltage). This option removes the
sequencing feature above, and allows the device to be
controlled up to the battery voltage on the ENABLE
pin with an external resistor (10 k). See Figure 5.
above its desired output reaching the voltage on V . These
IN
pins also provide the feedback path for the RESET function.
DELAY
There are two options for the delay time for the RESET to go
low. Connecting the pin to GND will provide a minimum of 14
ms. Connecting the pin to FB1 and FB2 will provide a
minimum of 28 ms. Absolute max voltage on the DELAY
pin is 7.0 V. Use a resistor divider to run off higher voltages.
The 7.5 V option will require this divider (see Figure 6).
10 k
V
IN
ENABLE
V
OUT
V
BAT
DELAY
(7.0 V max)
Figure 5. Switched Battery Application
AUXILIARY
The AUXILIARY pin provides an alternate path for the IC
to maintain operation. The AUXILIARY pin is diode OR’d
Figure 6.
with the V pin to the control circuitry (the DMOS output
IN
drivers are not included). If the voltage (V ) from the
IN
COMP
battery dips as low as 3.5 V during a crank condition, the
NCV8800 will maintain operation through a 6.0 V(min)
connection on the AUXILIARY pin. Using this feature is
optional. This pin should be grounded when not in use.
The COMP pin provides access to the error amplifiers
output. Switching power supplies work as feedback control
systems, and require compensation for stability. A 1.0 k
resistor and 0.1 µF capacitor work well in the application in
Figure 2.
VIN
Normal supply voltage input. An external diode must be
provided to afford reverse battery protection.
CP
The on−chip DMOS drivers require the gates of the
devices to be pulled above their drain voltage. An external
capacitor located between the SWITCH output, and the CP
pin provides the charge pump action to drive the gate of the
high−side driver high enough to turn the device on.
SWITCH
DMOS output drivers with 0.75 Ω max push/pull
capability. Non−overlap logic is provided to guarantee shoot
through current is minimized.
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8
NCV8800 Series
APPLICATIONS INFORMATION
2
The V control method is illustrated in Figure 8. The output
voltage is used to generate both the error signal and the ramp
signal. Since the ramp signal is simply the output voltage, it
is affected by any change in the output regardless of the origin
of the change. The ramp signal also contains the DC portion
of the output voltage, which allows the control circuit to drive
the main switch to 0% or 100% duty cycle as required.
A change in line voltage changes the current ramp in the
NCV8800
Power Up/Down
V
OUT
Sequence and
ENABLE
Switch
R
EX
56 µA
FB1
FB2
R1*
2
Error Amp
−
+
inductor, affecting the ramp signal, which causes the V
*The value of R1
is dependent
on the output
voltage option
and is between
25 k and 200 k.
control scheme to compensate the duty cycle. Since the
change in the inductor current modifies the ramp signal, as
R2
21.4 k
2
in current mode control, the V control scheme has the same
1.20 V
advantages in line transient response.
A change in load current will have an effect on the output
voltage, altering the ramp signal. A load step immediately
changes the state of the comparator output, which controls
the main switch. Load transient response is determined only
by the comparator response time and the transition speed of
the main switch. The reaction time to an output load step has
no relation to the crossover frequency of the error signal
loop, as in traditional control methods.
The error signal loop can have a low crossover frequency,
since transient response is handled by the ramp signal loop.
The main purpose of this “slow” feedback loop is to provide
DC accuracy. Noise immunity is significantly improved,
since the error amplifier bandwidth can be rolled off at a low
frequency. Enhanced noise immunity improves remote
sensing of the output voltage, since the noise associated with
long feedback traces can be effectively filtered.
Figure 7.
Increasing the Output Voltage
Adjustments to the output voltage can be made with an
external resistor (R ). The increase in output voltage will
EX
typically be 56 µA × R . Caution and consideration must
EX
be given to the tracking feature and temperature coefficient
and matching of internal and external resistors. Output
tracking always follows the Feedback pins (FB1 and FB2).
The typical temperature coefficient for R1 and R2 is
+4600 ppm/°C.
THEORY OF OPERATION
V2 Control Method
2
The V method of control uses a ramp signal that is
Line and load regulations are drastically improved
because there are two independent voltage loops. A voltage
mode controller relies on a change in the error signal to
compensate for a derivation in either line or load voltage.
This change in the error signal causes the output voltage to
change corresponding to the gain of the error amplifier,
which is normally specified as line and load regulation. A
current mode controller maintains fixed error signal under
deviation in the line voltage, since the slope of the ramp
signal changes, but still relies on a change in the error signal
generated by the ESR of the output capacitors. This ramp is
proportional to the AC current through the main inductor
and is offset by the value of the DC output voltage. This
control scheme inherently compensates for variations in
either line or load conditions, since the ramp signal is
generated from the output voltage itself. This control
scheme differs from traditional techniques such as voltage
mode, which generates an artificial ramp, and current mode,
which generates a ramp from inductor current.
2
for a deviation in load. The V method of control maintains
PWM Comparator
a fixed error signal for both line and load variations, since
both line and load affect the ramp signal.
+
GATE(H)
−
GATE(L)
Constant Frequency Operation
During normal operation, the oscillator generates a 200 kHz,
90% duty cycle waveform. The rising edge of this waveform
determines the beginning of each switching cycle, at which
point the high−side switch will be turned on. The high−side
switch will be turned off when the ramp signal intersects the
output of the error amplifier (COMP pin voltage).
Therefore, the switch duty cycle can be modified to regulate
the output voltage to the desired value as line and load
conditions change.
Output
Voltage
Feedback
Ramp Signal
Error Amplifier
−
Error Signal
Reference
Voltage
+
COMP
Figure 8. V2 Control Block Diagram
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9
NCV8800 Series
100
The major advantage of constant frequency operation is
that the component selections, especially the magnetic
component design, become very easy. Oscillator frequency
is fixed at 200 kHz.
90
80
70
60
Start−Up
After the NCV8800 is powered up, the error amplifier will
begin linearly charging the COMP pin capacitor. The COMP
capacitance and the source current of the error amplifier
determine the slew rate of COMP voltage. The output of the
error amplifier is connected internally to the inverting input
of the PWM comparator and it is compared with the divided
down output voltage FB1/FB2 at the non−inverting input of
the PWM comparator. At the beginning of each switching
cycle, the oscillator output will set the PWM latch. This
causes the high−side switch to turn on and the regulator
output voltage to ramp up.
50
40
0
0.5
1.0
1.5
2.0
2
2.5
3.0
Copper Area (inch )
Figure 9. 16 Lead SOW (4 Leads Fused), qJA as
a Function of the Pad Copper Area (2 oz. Cu.
Thickness), Board Material = 0.0625, G−10/R−4
When the divided down output voltage achieves a level set
by the COMP voltage, the high−side switch will be turned
Heat Sinks
2
off. The V control loop will adjust the high−side switch
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
duty cycle as required to ensure the regulator output voltage
tracks the COMP voltage. Since the COMP voltage
increases gradually, Soft Start can be achieved.
Overcurrent Protection
The output switch is protected on both the high side and
low side. Current limit is set at 1.0 A (min).
determine the value of R
:
qJA
R
+ R
) R
) R
qSA
(3)
qJA
qJC
qCS
where:
R
qJC
R
qCS
R
qSA
= the junction−to−case thermal resistance,
= the case−to−heatsink thermal resistance, and
= the heatsink−to−ambient thermal resistance.
R
qJC
appears in the package section of the data sheet. Like
R
qJA
, it too is a function of package type. R
and R
are
qCS
qSA
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
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10
NCV8800 Series
ORDERING INFORMATION
Device
Output Voltage
ENABLE Option
Package
Shipping†
46 Units/Rail
NCV8800SDW26
NCV8800SDW26R2
NCV8800HDW26
NCV8800HDW26R2
NCV8800SDW33
NCV8800SDW33R2
NCV8800HDW33
NCV8800HDW33R2
NCV8800HDW50
NCV8800HDW50R2
NCV8800HDW75
NCV8800HDW75R2
Sequenced
1000 Tape & Reel
46 Units/Rail
2.6 V
High Voltage
Sequenced
High Voltage
1000 Tape & Reel
46 Units/Rail
1000 Tape & Reel
46 Units/Rail
3.3 V
SO−16L
1000 Tape & Reel
46 Units/Rail
5.0 V
7.5 V
1000 Tape & Reel
46 Units/Rail
High Voltage
1000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
11
NCV8800 Series
PACKAGE DIMENSIONS
SO−16L
DW SUFFIX
CASE 751G−03
ISSUE B
A
D
q
16
9
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INLCUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
1
8
MILLIMETERS
B
16X B
DIM MIN
MAX
2.65
0.25
0.49
0.32
10.45
7.60
A
A1
B
C
D
E
2.35
0.10
0.35
0.23
10.15
7.40
M
S
S
B
0.25
T
A
e
1.27 BSC
H
h
10.05
0.25
0.50
0
10.55
0.75
0.90
7
SEATING
PLANE
L
14X
e
q
_
_
C
T
2
V is a trademark of Switch Power, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
JAPAN: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
N. American Technical Support: 800−282−9855 Toll Free USA/Canada
NCV8800/D
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