NDD03N80Z-1G [ONSEMI]
NâChannel Power MOSFET;型号: | NDD03N80Z-1G |
厂家: | ONSEMI |
描述: | NâChannel Power MOSFET |
文件: | 总8页 (文件大小:131K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NDD03N80Z, NDF03N80Z
N‐Channel Power MOSFET
800 V, 4.5 W
Features
• ESD Diode−Protected Gate
• 100% Avalanche Tested
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R MAX
DS(ON)
• 100% Rg Tested
• These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
V
Compliant
(BR)DSS
800 V
4.5 W @ 10 V
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
Rating
Drain−to−Source Voltage
Continuous Drain Current R
Symbol NDD
V
NDF
800
Unit
V
N-Channel
DSS
D (2)
I
D
2.9
3.3
(Note 1)
A
q
JC
Continuous Drain Current
I
D
1.9
2.1
(Note 1)
A
R
, T = 100°C
q
JC
A
Pulsed Drain Current, V @ 10 V
I
12
96
13
25
A
W
V
G (1)
GS
DM
Power Dissipation R
P
D
q
JC
Gate−to−Source Voltage
V
30
GS
S (3)
Single Pulse Avalanche Energy, I
2.5 A
=
E
AS
100
mJ
D
ESD (HBM) (JESD22−A114)
V
2300
4500
V
V
esd
RMS Isolation Voltage (t = 0.3 sec.,
V
ISO
4
R.H. ≤ 30%, T = 25°C) (Figure 14)
A
Peak Diode Recovery (Note 2)
dv/dt
4.5
3.3
V/ns
A
Continuous Source Current
(Body Diode)
I
S
1
2
3
1
2
3
Maximum Temperature for Soldering
Leads
T
260
°C
°C
L
NDD03N80Z−1G
IPAK
CASE 369D
NDF03N80ZH
TO−220FP
CASE 221AH
Operating Junction and
Storage Temperature Range
T , T
−55 to 150
J
stg
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
4
2
1
3
1. Limited by maximum junction temperature
NDD03N80ZT4G
DPAK
2. I = 3.3 A, di/dt ≤ 100 A/ms, V ≤ BV
, T = +150°C
S
DD
DSS
J
CASE 369AA
MARKING AND ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
August, 2012 − Rev. 0
NDD03N80Z/D
NDD03N80Z, NDF03N80Z
THERMAL RESISTANCE
Parameter
Symbol
Value
Unit
Junction−to−Case (Drain)
NDF03N80Z
NDD03N80Z
R
4.0
1.3
°C/W
q
JC
Junction−to−Ambient Steady State
(Note 3) NDF03N80Z
(Note 4) NDD03N80Z
(Note 3) NDD03N80Z−1
R
50
33
96
q
JA
3. Insertion mounted
4. Surface mounted on FR4 board using 1” sq. pad size (Cu area = 1.127” sq [2 oz] including traces).
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Characteristic
OFF CHARACTERISTICS
Symbol
Test Conditions
Min
Typ
Max
Unit
Drain-to-Source Breakdown Voltage
V
V
GS
= 0 V, I = 1 mA
800
V
(BR)DSS
D
Drain-to-Source Breakdown Voltage
Temperature Coefficient
V
/T
J
Reference to 25°C, I = 1 mA
870
mV/°C
(BR)DSS
D
Drain−to−Source Leakage Current
I
V
DS
= 800 V, V = 0 V
T = 25°C
1.0
50
10
mA
mA
DSS
GS
J
T = 125°C
J
Gate-to-Source Leakage Current
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
I
V
GS
= 20 V
GSS
V
V
DS
= V , I = 50 mA
3.0
4.1
11
4.5
4.5
V
GS(TH)
GS
D
Negative Threshold Temperature
Coefficient
V
/T
J
Reference to 25°C, I = 50 mA
mV/°C
GS(TH)
D
Static Drain-to-Source On Resistance
Forward Transconductance
R
V
V
= 10 V, I = 1.2 A
3.7
2.1
W
DS(ON)
GS
D
g
= 15 V, I = 1.2 A
S
FS
DS
D
DYNAMIC CHARACTERISTICS
Input Capacitance (Note 6)
C
440
52
pF
nC
iss
Output Capacitance (Note 6)
C
oss
V
= 25 V, V = 0 V, f = 1 MHz
GS
DS
Reverse Transfer Capacitance
(Note 6)
C
9.0
rss
Total Gate Charge (Note 6)
Q
17
3.5
9.1
g
Gate-to-Source Charge (Note 6)
Q
gs
gd
V
DS
= 400 V, I = 3.3 A, V = 10 V
D GS
Gate-to-Drain (“Miller”) Charge
(Note 6)
Q
Plateau Voltage
Gate Resistance
V
6.5
5.5
V
GP
R
W
g
RESISTIVE SWITCHING CHARACTERISTICS (Note 7)
Turn-on Delay Time
Rise Time
t
9.0
7.0
17
ns
d(on)
t
r
V
= 400 V, I = 3.3 A,
D
DD
V
= 10 V, R = 0 W
GS
G
Turn-off Delay Time
Fall Time
t
d(off)
t
f
9.0
SOURCE−DRAIN DIODE CHARACTERISTICS
Diode Forward Voltage
V
T = 25°C
0.9
0.8
360
81
1.6
V
SD
J
I
S
= 3.0 A, V = 0 V
GS
T = 100°C
J
Reverse Recovery Time
Charge Time
t
ns
rr
t
a
b
V
GS
= 0 V, V = 30 V
DD
= 3.3 A, d /d = 100 A/ms
I
S
i t
Discharge Time
t
280
1.3
Reverse Recovery Charge
Q
nC
rr
5. Pulse Width ≤ 380 ms, Duty Cycle ≤ 2%.
6. Guaranteed by design.
7. Switching characteristics are independent of operating junction temperatures.
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2
NDD03N80Z, NDF03N80Z
TYPICAL CHARACTERISTICS
3.0
2.5
2.0
1.5
5.0
V
= 6.8 V to 10 V
6.6 V
GS
V
DS
= 25 V
T = 25°C
J
6.4 V
4.0
3.0
2.0
1.0
0.0
T = −55°C
J
6.2 V
T = 150°C
J
6.0 V
5.8 V
1.0
0.5
5.0 V
5.2 V
5.6 V
5.4 V
0.0
0
5
10
15
20
25
1
2
3
4
5
6
7
8
9
10
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
12
11
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
I
= 1.2 A
V
= 10 V
D
GS
T = 25°C
T = 25°C
J
J
10
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10
, GATE−TO−SOURCE VOLTAGE (V)
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5
V
GS
I , DRAIN CURRENT (A)
D
Figure 3. On−Region versus Gate−to−Source
Figure 4. On−Resistance versus Drain
Voltage
Current and Gate Voltage
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
1.15
1.10
1.05
1.00
0.95
0.90
I
V
= 1.2 A
D
I
D
= 1 mA
= 10 V
GS
−50
−25
0
25
50
75
100
125 150
−50
−25
0
25
50
75
100
125 150
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. On−Resistance Variation with
Figure 6. BVDSS Variation with Temperature
Temperature
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3
NDD03N80Z, NDF03N80Z
TYPICAL CHARACTERISTICS
10.0
1.0
10000
1000
100
10
T = 25°C
J
V
GS
= 0 V
f = 1 MHz
T = 150°C
J
C
iss
C
oss
C
rss
T = 125°C
J
0.1
1
0
50 100 150 200 250 300 350 400 450 500
, DRAIN−TO−SOURCE VOLTAGE (V)
1
10
, DRAIN−TO−SOURCE VOLTAGE (V)
100
V
DS
V
DS
Figure 7. Drain−to−Source Leakage Current
Figure 8. Capacitance Variation
versus Voltage
15.0
14.0
13.0
450
400
350
300
Q
T
12.0
11.0
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
V
DS
V
GS
250
200
150
100
50
Q
Q
GD
GS
V
I
= 400 V
= 3.3 A
T = 25°C
DS
D
J
0
0
2
4
6
8
10 12 14 16 18 20
Q , TOTAL GATE CHARGE (nC)
g
Figure 9. Gate−to−Source Voltage and
Drain−to−Source Voltage versus Total Charge
1000
100
10
100
V
= 400 V
= 3 A
= 10 V
DD
I
D
V
GS
10
t
t
d(off)
t
r
f
t
T = 150°C
J
d(on)
1.0
0.1
125°C
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
, SOURCE−TO−DRAIN VOLTAGE (V)
25°C
−55°C
1.0
1
10
100
R , GATE RESISTANCE (W)
V
SD
G
Figure 10. Resistive Switching Time Variation
versus Gate Resistance
Figure 11. Diode Forward Voltage versus
Current
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4
NDD03N80Z, NDF03N80Z
TYPICAL CHARACTERISTICS
100
10
V
≤ 30 V
GS
SINGLE PULSE
= 25°C
10 ms
100 ms
1 ms
10 ms
T
C
dc
1
0.1
R
LIMIT
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
0.01
0.1
1
10
100
1000
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 12. Maximum Rated Forward Biased
Safe Operating Area − NDD03N80Z
10
1
50% (DUTY CYCLE)
20%
10%
5.0%
2.0%
0.1
R
Steady State
= 1.3°C/W
q
JC
1.0%
SINGLE PULSE
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (s)
Figure 13. Thermal Impedance (Junction−to−Case) − NDD03N80Z
LEADS
HEATSINK
0.110″ MIN
Figure 14. Isolation Test Diagram
Measurement made between leads and heatsink with all leads shorted together.
*For additional mounting information, please download the ON Semiconductor
Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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5
NDD03N80Z, NDF03N80Z
Table 1. ORDERING INFORMATION
†
Device
Package
Shipping
NDD03N80Z−1G
IPAK
75 Units / Rail
2500 / Tape & Reel
50 Units / Rail
(Pb-Free, Halogen-Free)
NDD03N80ZT4G
DPAK
(Pb-Free, Halogen-Free)
NDF03N80ZH
(In Development)
TO−220FP
(Pb-Free, Halogen-Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MARKING DIAGRAMS
4
Drain
4
Drain
NDF03N80ZH
AYWW
Gate
Source
2
Drain
1
3
1
2
3
Gate Source
Gate Drain Source
Drain
IPAK
DPAK
TO−220FP
A
= Location Code
= Year
WW = Work Week
Y
G, H = Pb−Free, Halogen−Free Package
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6
NDD03N80Z, NDF03N80Z
PACKAGE DIMENSIONS
TO−220 FULLPACK, 3−LEAD
CASE 221AH
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. CONTOUR UNCONTROLLED IN THIS AREA.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH
AND GATE PROTRUSIONS. MOLD FLASH AND GATE
PROTRUSIONS NOT TO EXCEED 0.13 PER SIDE. THESE
DIMENSIONS ARE TO BE MEASURED AT OUTERMOST
EXTREME OF THE PLASTIC BODY.
SEATING
PLANE
A
B
E
A
P
E/2
H1
A1
M
M
0.14
B
A
Q
5. DIMENSION b2 DOES NOT INCLUDE DAMBAR
PROTRUSION. LEAD WIDTH INCLUDING PROTRUSION
SHALL NOT EXCEED 2.00.
D
C
NOTE 3
1
2
3
MILLIMETERS
DIM MIN
MAX
4.70
2.90
2.70
0.84
1.40
0.79
15.30
10.30
A
A1
A2
b
4.30
2.50
2.50
0.54
1.10
0.49
14.70
9.70
L
L1
b2
c
3X
c
b
3X
b2
e
M
M
0.25
B
A
C
D
A2
E
e
2.54 BSC
H1
L
6.70
12.70
---
3.00
2.80
7.10
14.73
2.80
3.40
3.20
L1
P
Q
IPAK
CASE 369D
ISSUE C
C
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
V
S
E
R
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
MILLIMETERS
4
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
A
1
2
3
−T−
SEATING
PLANE
2.29 BSC
K
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
J
F
H
0.155
−−−
D 3 PL
G
M
T
0.13 (0.005)
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7
NDD03N80Z, NDF03N80Z
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE)
CASE 369AA
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
D
A
E
c2
H
b3
B
4
2
L3
L4
Z
DETAIL A
1
3
INCHES
DIM MIN MAX
0.086 0.094
A1 0.000 0.005
0.025 0.035
b2 0.030 0.045
b3 0.180 0.215
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2 0.018 0.024
GAUGE
SEATING
PLANE
L2
PLANE
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
L3 0.035 0.050
ROTATED 905 CW
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
SOLDERING FOOTPRINT*
6.20
0.244
3.00
0.118
2.58
0.102
5.80
0.228
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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NDD03N80Z/D
相关型号:
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