NDTL03N150CG [ONSEMI]

Power MOSFET;
NDTL03N150CG
型号: NDTL03N150CG
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET

文件: 总5页 (文件大小:423K)
中文:  中文翻译
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NDTL03N150C  
Power MOSFET  
1500V, 10.5, 2.5A, N-Channel  
Features  
www.onsemi.com  
Low On-Resistance  
Ultra High Voltage  
High Speed Switching  
100% Avalanche Tested  
Pb-Free and RoHS compliance  
V
R
(on) Max  
I
DSS  
DS  
10.5@10V  
D Max  
2.5A  
1500V  
Typical Applications  
Switch mode power supply  
AC Drive  
ELECTRICAL CONNECTION  
N-Channel  
2
SPECIFICATIONS  
ABSOLUTE MAXIMUM RATINGS at Ta = 25°C (Note 1, 2, 3, 4)  
Parameter  
Symbol  
Value  
Unit  
V
1 : Gate  
2 : Drain  
3 : Source  
Drain to Source Voltage  
V
1500  
1
DSS  
GSS  
Gate to Source Voltage  
V
30  
V
Drain Current (DC)  
I
2.5  
A
D
Drain Current (Pulse)  
PW10μs, duty cycle1%  
3
A
I
5
DP  
2.5  
P
Power Dissipation  
W
D
140  
150  
MARKING  
Tc=25°C  
Junction Temperature  
Storage Temperature  
Tj  
°C  
°C  
mJ  
A
Tstg  
55 to +150  
34  
Avalanche Energy (Single Pulse) (Note 2)  
Avalanche Current (Note 3)  
E
AS  
03N150  
I
2.5  
AV  
LOT No.  
C
Note 1 : Stresses exceeding those listed in the Maximum Ratings table may damage  
the device. If any of these limits are exceeded, device functionality should not  
be assumed, damage may occur and reliability may be affected.  
Note 2 : V =50V, L=10mH, I =2.5A (Fig.1)  
DD AV  
Note 3 : L10mH, Single Pulse  
1
TO-3P-3L  
2
3
THERMAL RESISTANCE RATINGS  
Parameter  
ORDERING INFORMATION  
See detailed ordering and shipping  
information on page 5 of this data sheet.  
Symbol  
Value  
Unit  
Junction to Case Steady State  
R
0.89  
50.0  
θJC  
°C/W  
Junction to Ambient (Note 4)  
Note 4 : Insertion mounted  
R
θJA  
© Semiconductor Components Industries, LLC, 2016  
March 2016 - Rev. 2  
1
Publication Order Number :  
NDTL03N150C/D  
NDTL03N150C  
ELECTRICAL CHARACTERISTICS at Ta = 25°C (Note 5, 6, 7)  
Value  
typ  
Parameter  
Symbol  
V(  
Conditions  
Unit  
min  
max  
Drain to Source Breakdown Voltage  
Zero-Gate Voltage Drain Current  
Gate to Source Leakage Current  
Gate Threshold Voltage  
)
I =10mA, V =0V  
1500  
V
mA  
nA  
V
BR DSS  
D
GS  
=1200V, V =0V  
I
I
V
1
DSS  
GSS  
DS  
GS  
DS  
DS  
GS  
V
V
V
=30V, V =0V  
DS  
100  
4
V
(th)  
=10V, I =1mA  
2
GS  
FS  
D
Forward Transconductance  
g
=20V, I =1.25A  
1.9  
8
S
D
Static Drain to Source On-State  
Resistance  
R
DS  
(on)  
I =1.25A, V =10V  
10.5  
Ω
D
GS  
Input Capacitance  
650  
70  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
nC  
nC  
nC  
V
Ciss  
V
=30V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Turn-ON Delay Time  
Rise Time  
Coss  
Crss  
DS  
20  
t (on)  
d
15  
t
24  
r
See Fig.2  
Turn-OFF Delay Time  
Fall Time  
140  
47  
t (off)  
d
t
f
Total Gate Charge  
Qg  
34  
Gate to Source Charge  
Gate to Drain “Miller” Charge  
Forward Diode Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
Qgs  
Qgd  
V
=200V, V =10V, I =2.5A  
GS  
4.7  
15  
DS  
D
V
I =2.5A, V =0V  
S
0.8  
350  
2220  
1.5  
SD  
GS  
trr  
ns  
nC  
See Fig.3  
I =2.5A, V =0V, di/dt=100A/μs  
S GS  
Qrr  
Effective Output Capacitance,  
Energy Related (Note 6)  
Effective Output Capacitance,  
Time Related (Note 7)  
Co(er)  
18.3  
pF  
V
=0V, V =0 to 1200V  
DS  
GS  
Co(tr)  
29.6  
pF  
Note 5 : Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted.  
Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
Note 6 : Co(er) is a fixed capacitance that gives the same stored energy as Coss while V  
is rising from 0 to 80% V(  
)
.
DS  
is rising from 0 to 80% V(  
BR DSS  
Note 7 : Co(tr) is a fixed capacitance that gives the same charging time as Coss while V  
)
.
DS  
BR DSS  
Fig. 1 Unclamped Inductive Switching Test Circuit  
Fig. 2 Switching Time Test Circuit  
Fig. 3 Reverse Recovery Time Test Circuit  
www.onsemi.com  
2
NDTL03N150C  
www.onsemi.com  
3
NDTL03N150C  
www.onsemi.com  
4
NDTL03N150C  
PACKAGE DIMENSIONS  
unit : mm  
TO-3P-3L  
CASE 340AF  
ISSUE A  
SEATING  
PLANE  
NOTES:  
B
A
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS  
3. CONTOUR UNCONTROLLED IN THIS AREA.  
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR GATE  
PROTRUSIONS. MOLD FLASH OR GATE PROTRUSIONS NOT TO  
EXCEED 0.13 PER SIDE. THESE DIMENSIONS ARE TO BE MEA  
SURED AT THE OUTERMOST EXTREME OF THE PLASTIC BODY.  
5. DIMENSIONS b1 AND b2 DO NOT INCLUDE- DAMBAR PROTRU  
SION. DAMBAR PROTRUSION SHALL NOT EXCEED 0.10.  
E
A
P1  
P
Q
A1  
4
D1  
D
D2  
MILLIMETERS  
L1  
NOTE 3  
DIM MIN  
NOM  
4.80  
1.50  
1.40  
1.00  
2.00  
3.00  
0.60  
MAX  
5.00  
1.65  
1.60  
1.20  
2.20  
3.20  
0.75  
A
A1  
A2  
b
b1  
b2  
c
4.60  
1.45  
1.20  
0.80  
1.80  
2.80  
0.55  
E1  
L
D
19.70 19.90 20.10  
D1 16.56 16.76 16.96  
1
2
3
D2  
E
9.80 10.00 10.20  
15.40 15.60 15.80  
2X  
b1  
c
BOTTOM VIEW  
3X  
b
E1 13.40 13.60 13.80  
e
L
L1  
P
P1  
Q
b2  
A2  
5.15  
5.45  
5.75  
e
19.80 20.00 20.20  
SIDE VIEW  
3.30  
3.00  
6.80  
4.80  
3.50  
3.20  
7.00  
5.00  
3.70  
3.40  
7.20  
5.20  
TOP VIEW  
1 : Gate  
GENERIC MARKING  
DIAGRAM*  
2 : Drain  
3 : Source  
XXXXXG  
AYWW  
XXXXX = Specific Device Code  
A
Y
= Assembly Location  
= Year  
WW  
G
= Work Week  
= Pb-Free Package  
*This information is generic. Please refer  
to device data sheet for actual part  
marking. Pb-Free indicator, “G”, may  
or not be present.  
ORDERING INFORMATION  
Device  
Marking  
Package  
Shipping (Qty / Packing)  
30 / Tube  
TO-3P-3L  
(Pb-Free)  
NDTL03N150CG  
03N150C  
Note on usage : Since the NDTL03N150C is a MOSFET product, please avoid using this device in the vicinity  
of highly charged objects.  
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiariesin the United States  
and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of  
SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without  
further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose,  
nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including  
without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can  
and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each  
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are  
not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or  
sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers,  
employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of,  
directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was  
negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all  
applicable copyright laws and is not for resale in any manner.  
www.onsemi.com  
5

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