NL17SZ00CMUTCG [ONSEMI]
LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO6, 1 X 1 MM, 0.35 PITCH, ROHS COMPLIANT, UDFN-6;![NL17SZ00CMUTCG](http://pdffile.icpdf.com/pdf2/p00270/img/icpdf/NL17SZ00CMUT_1622249_icpdf.jpg)
型号: | NL17SZ00CMUTCG |
厂家: | ![]() |
描述: | LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO6, 1 X 1 MM, 0.35 PITCH, ROHS COMPLIANT, UDFN-6 栅 输入元件 光电二极管 逻辑集成电路 触发器 |
文件: | 总9页 (文件大小:132K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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NL17SZ00
Single 2-Input NAND Gate
The NL17SZ00 is a single 2−input NAND Gate in three tiny
footprint packages. The device performs much as LCX multi−gate
products in speed and drive.
Features
http://onsemi.com
• Tiny SOT−353, SOT−553 and SOT−953 Packages
• 2.7 ns T at 5 V (typ)
PD
MARKING
DIAGRAMS
5
• Source/Sink 24 mA at 3.0 V
5
• Over−Voltage Tolerant Inputs
1
L1 MG
• Pin For Pin with NC7SZ00P5X, TC7SZ00FU and TC7SZ00AFE
SOT−353/SC70−5/SC−88A
DF SUFFIX
G
• Chip Complexity: FETs = 20
CASE 419A
1
• Designed for 1.65 V to 5.5 V V Operation
CC
L1 = Specific Device Marking
= Date Code*
= Pb−Free Package
• These Devices are Pb−Free and are RoHS Compliant
M
G
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
V
IN B
IN A
GND
1
2
3
6
5
CC
5
4
IN A
IN B
V
CC
1
2
5
SOT−553
XV5 SUFFIX
CASE 463B
5
NC
L1 M
1
1
OUT Y
GND
3
L1 = Specific Device Marking
M
= Date Code
OUT Y
4
SOT−353/SC70−5/
SC−88A/SOT−553
UDFN6
1.45 x 1.0
UDFN
XM
CASE 517AQ
1
V
UDFN6
1.0 x 1.0
CASE 517BX
1
2
5
4
IN A
GND
IN B
CC
X M
1
X
M
= Specific Device Marking
= Date Code
OUT Y
3
SOT−953
CASE 527AE
T M
1
SOT−953
T
M
= Specific Device Code
= Month Code
Figure 1. Pinouts (Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
IN A
IN B
OUT Y
&
Figure 2. Logic Symbol
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
May, 2013 − Rev. 11
NL17SZ00/D
NL17SZ00
PIN ASSIGNMENT (SOT−353/
SC70−5/SC−88A/SOT−553/UDFN)
PIN ASSIGNMENT (SOT−953)
FUNCTION TABLE
Input
Pin
Function
Output
Y = AB
Pin
Function
1
IN A
1
IN A
2
3
4
5
GND
IN B
A
L
B
L
Y
H
H
H
L
2
3
4
5
IN B
GND
IN Y
OUT Y
L
H
L
V
CC
H
H
V
CC
H
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
DC Supply Voltage
DC Input Voltage
DC Output Voltage
−0.5 to + 7.0
−0.5 to + 7.0
CC
V
V
IN
V
OUT
−0.5 to V + 0.5
V
CC
(SOT−353/SC70−5/SC−88A/SOT−553/UDFN Packages)
V
OUT
DC Output Voltage
(SOT−953 Package)
Output at High or Low State
Power−Down Mode (V = 0 V)
−0.5 to V + 0.5
V
CC
−0.5 to + 0.5
CC
I
DC Input Diode Current
DC Output Diode Current
−50
mA
mA
IK
I
V
< GND, V
> V
CC
50
OK
OUT
OUT
(SOT−353/SC70−5/SC−88A/SOT−553/UDFN Packages)
I
DC Output Diode Current (SOT−953 Package)
DC Output Current
V
< GND
−50
50
mA
mA
mA
°C
OK
OUT
I
OUT
I
DC Supply Current per Supply Pin
Storage Temperature Range
100
CC
T
STG
−65 to + 150
260
T
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Thermal Resistance
°C
L
T
+150
°C
J
q
SOT−353 (Note 1)
SOT−553
350
496
°C/W
JA
P
D
Power Dissipation in Still Air at 85°C
SOT−353
SOT−553
186
135
mW
MSL
Moisture Sensitivity
Level 1
F
Flammability Rating
ESD Classification
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
R
ESD
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
2000
200
N/A
I
Latchup Performance Above V and Below GND at 125°C (Note 5)
100
mA
LATCHUP
CC
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A, rated to EIA/JESD22−A114−B.
3. Tested to EIA/JESD22−A115−A, rated to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
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2
NL17SZ00
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
1.65
0
Max
5.5
5.5
5.5
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
DC Output Voltage
V
IN
V
V
OUT
0
V
(SOT−353/SC70−5/SC−88A/SOT−553/UDFN Packages)
DC Output Voltage (SOT−953 Package)
Operating Temperature Range
V
0
V
V
OUT
CC
T
−55
+125
°C
A
t , t
Input Rise and Fall Time
V
CC
V
CC
= 3.0 V 0.3 V
= 5.0 V 0.5 V
0
0
100
20
ns/V
r
f
DC ELECTRICAL CHARACTERISTICS
T
A
= 255C
Typ
−555C v T v 1255C
A
V
CC
Min
Max
Min
Max
(V)
Symbol
Parameter
Condition
Unit
V
IH
High−Level Input Voltage
1.65 to 1.95 0.75 V
0.75 V
V
CC
CC
CC
CC
2.3 to 5.5
0.7 V
0.7 V
V
Low−Level Input Voltage
1.65 to 1.95
2.3 to 5.5
0.25 V
0.25 V
V
V
IL
CC
CC
CC
CC
0.3 V
0.3 V
V
OH
High−Level Output Voltage
I
= −100 mA
1.65 to 5.5
1.65
2.3
V
CC
− 0.1
1.29
V
V
CC
− 0.1
1.29
OH
I
I
CC
= −3 mA
= −8 mA
1.4
2.1
2.4
2.7
2.5
4.0
OH
V
IN
= V or V
IL IH
1.9
2.2
2.4
2.3
3.8
1.9
2.2
2.4
2.3
3.8
OH
I
I
I
I
= −12 mA
= −16 mA
= −24 mA
= −32 mA
2.7
3.0
3.0
4.5
OH
OH
OH
OH
V
OL
Low−Level Output Voltage
= V or V
I
= 100 mA
1.65 to 5.5
1.65
2.3
0.1
0.24
0.3
0.4
0.4
0.1
0.24
0.3
0.4
0.4
V
OL
I
I
= 3 mA
= 8 mA
0.08
0.20
0.22
0.28
0.38
0.42
OL
V
IN
IH
OH
OL
I
I
I
I
= 12 mA
= 16 mA
= 24 mA
= 32 mA
2.7
3.0
3.0
4.5
OL
OL
0.55
0.55
0.55
0.55
OL
OL
I
Input Leakage Current
V
= 5.5 V or GND
0 to 5.5
0
0.1
1
1.0
10
mA
mA
IN
IN
I
Power Off Leakage
Current
V
V
= 5.5 V or
OFF
IN
= 5.5 V
OUT
I
Quiescent Supply Current
V
IN
= 5.5 V or GND
5.5
1
10
mA
CC
AC ELECTRICAL CHARACTERISTICS t = t = 3.0 ns
R
F
T
A
= 255C
−555C v T v 1255C
A
V
CC
Min
Typ
5.4
4.5
3.0
2.4
2.4
2.0
2.4
Max
Min
2.0
2.0
0.8
0.5
1.5
0.5
0.8
Max
(V)
1.65
1.8
Symbol
Parameter
Condition
Unit
t
Propagation Delay
(Figure 3 and 4)
2.0
2.0
0.8
0.5
1.5
0.5
0.8
11.4
9.5
6.5
4.5
5.0
3.9
4.3
12
ns
R = 1 MW, C = 15 pF
PLH
L
L
t
PHL
R = 1 MW, C = 15 pF
10.0
7.0
4.7
5.2
4.1
4.5
L
L
R = 1 MW, C = 15 pF
2.5 to 0.2
3.3 0.3
L
L
R = 1 MW, C = 15 pF
L
L
R = 500 W, C = 50 pF
L
L
5.0 0.5
R = 1 MW, C = 15 pF
L
L
R = 500 W, C = 50 pF
L
L
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3
NL17SZ00
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
= 5.5 V, V = 0 V or V
Typical
u4
Unit
pF
C
Input Capacitance
V
CC
IN
I
CC
C
Power Dissipation Capacitance
(Note 6)
10 MHz, V = 3.3 V, V = 0 V or V
25
pF
PD
CC
I
CC
10 MHz, V = 5.5 V, V = 0 V or V
30
CC
I
CC
6. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
t = 3 ns
f
t = 3 ns
f
V
CC
V
CC
90%
50%
90%
50%
INPUT
A and B
10%
10%
OUTPUT
GND
INPUT
R
C
L
L
t
t
PHL
PLH
V
V
OH
OUTPUT Y
50%
50%
A 1−MHz square input wave is recommended for
OL
propagation delay tests.
Figure 3. Switching Waveform
Figure 4. Test Circuit
DEVICE ORDERING INFORMATION
Device Order Number
†
Package Type
SHipping
NL17SZ00DFT2G
SOT−353
(Pb−Free)
3000 / Tape & Reel
4000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
8000 / Tape & Reel
NL17SZ00XV5T2G
SOT−553
(Pb−Free)
NL17SZ00AMUTCG
(In Development)
UDFN6, 1.45 x 1.0
(Pb−Free)
NL17SZ00CMUTCG
(In Development)
UDFN6, 1.0 x 1.0
(Pb−Free)
NL17SZ00P5T5G
SOT−953
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NL17SZ00
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
G
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
−B−
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
1
2
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
0.026 BSC
0.65 BSC
M
M
B
D 5 PL
0.2 (0.008)
---
0.004
0.004
0.004
0.010
0.012
---
0.10
0.10
0.10
0.25
0.30
K
N
S
N
0.008 REF
0.20 REF
0.079
0.087
2.00
2.20
J
C
K
H
SOLDER FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
NL17SZ00
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
CASE 463B
ISSUE B
NOTES:
D
−X−
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
A
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
L
5
4
3
MILLIMETERS
INCHES
NOM
0.022
0.009
0.005
0.063
0.047
0.020 BSC
0.008
0.063
E
−Y−
DIM
A
b
c
D
E
MIN
0.50
0.17
0.08
1.50
1.10
NOM
0.55
0.22
0.13
1.60
MAX
MIN
MAX
0.024
0.011
0.007
0.067
0.051
H
E
0.60
0.27
0.18
1.70
1.30
0.020
0.007
0.003
0.059
0.043
1
2
b 5 PL
1.20
c
e
L
0.50 BSC
0.20
1.60
e
M
0.08 (0.003)
X Y
0.10
1.50
0.30
1.70
0.004
0.059
0.012
0.067
H
E
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
NL17SZ00
PACKAGE DIMENSIONS
UDFN6, 1.45x1.0, 0.5P
CASE 517AQ
ISSUE O
A
B
D
L
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
L1
DETAIL A
PIN ONE
REFERENCE
OPTIONAL
E
MILLIMETERS
CONSTRUCTIONS
DIM MIN
0.45
A1 0.00
MAX
0.55
0.05
A
0.10
C
EXPOSED Cu
MOLD CMPD
A2
b
0.07 REF
0.20
1.45 BSC
TOP VIEW
0.30
0.10
C
D
E
e
1.00 BSC
0.50 BSC
DETAIL B
L
L1
0.30
−−−
0.40
0.15
DETAIL B
OPTIONAL
0.05
0.05
C
C
CONSTRUCTIONS
A
MOUNTING FOOTPRINT
6X
A1
SEATING
PLANE
6X
A2
C
SIDE VIEW
e
0.30
PACKAGE
OUTLINE
6X L
1.24
3
1
DETAIL A
6X
1
0.53
0.50
PITCH
6
4
DIMENSIONS: MILLIMETERS
6X b
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
0.10 C A B
NOTE 3
C
0.05
BOTTOM VIEW
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7
NL17SZ00
PACKAGE DIMENSIONS
UDFN6, 1x1, 0.35P
CASE 517BX
ISSUE O
NOTES:
A
B
E
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
PIN ONE
REFERENCE
2X
0.10
C
MILLIMETERS
DIM MIN
MAX
0.55
0.05
A
A1
A3
b
0.45
0.00
0.13 REF
2X
0.10
C
TOP VIEW
0.12
0.22
A3
D
E
e
L
1.00 BSC
1.00 BSC
0.35 BSC
0.05
C
C
A
0.25
0.30
0.35
0.40
L1
0.05
RECOMMENDED
A1
SEATING
C
SIDE VIEW
e
PLANE
SOLDERING FOOTPRINT*
05.4X8
6X
0.22
5X L
3
1
L1
1.18
6
4
1
0.35
6X b
0.53
PITCH
PKG
M
0.10
C A B
OUTLINE
DIMENSIONS: MILLIMETERS
M
NOTE 3
0.05
C
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
8
NL17SZ00
PACKAGE DIMENSIONS
SOT−953
CASE 527AE
ISSUE E
NOTES:
X
Y
D
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
A
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
5
4
3
PIN ONE
H
E
INDICATOR
E
1
2
MILLIMETERS
DIM MIN
NOM
0.37
0.15
0.12
1.00
MAX
0.40
0.20
0.17
1.05
0.85
A
b
0.34
0.10
0.07
0.95
0.75
C
TOP VIEW
e
C
D
SIDE VIEW
E
e
0.80
0.35 BSC
HE
L
0.95
1.00
0.175 REF
1.05
5X
L
L2
L3
0.05
−−−
0.10
−−−
0.15
0.15
5X
5X
L3
L2
SOLDERING FOOTPRINT*
5X
0.35
5X
0.20
5X
b
PACKAGE
OUTLINE
0.08 X
Y
BOTTOM VIEW
1.20
1
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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Phone: 81−3−5817−1050
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Order Literature: http://www.onsemi.com/orderlit
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Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NL17SZ00/D
相关型号:
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