NL17SZ175DBVT1G [ONSEMI]
D-Type Flip-Flop with Asynchronous Clear;
| 型号： | NL17SZ175DBVT1G |
| 厂家： | 
ONSEMI |
| 描述： | D-Type Flip-Flop with Asynchronous Clear 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总12页 (文件大小：322K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ON Semiconductor
Is Now
To learn more about onsemi™, please visit our website at
www.onsemi.com
onsemi andꢀꢀꢀꢀꢀꢀꢀand other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi
product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and holdonsemi and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
D-Type Flip-Flop with
Asynchronous Clear
NL17SZ175
The NL17SZ175 is a single, positive edge triggered, D−type CMOS
Flip−Flop with Asynchronous Clear operating from a 1.65 V to 5.5 V
supply.
www.onsemi.com
Features
MARKING
DIAGRAMS
• Designed for 1.65 V to 5.5 V V Operation
CC
• 2.6 ns t at V = 5 V (Typ)
PD
CC
6
• Inputs/Outputs Overvoltage Tolerant up to 5.5 V
SC−88
CASE 419B−02
• I
Supports Partial Power Down Protection
• Sink 32 mA at 4.5 V
G
XXXM
OFF
G
1
1
• Available in SC−88, SC−74 and UDFN6 Packages
• Chip Complexity < 100 FETs
SC−74
CASE 318F−05
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
XXX MG
6
Compliant
G
1
IEEC / IEC
C
UDFN6
1.45 x 1.0
CASE 517AQ
XM
CP
1
D
Q
Figure 1. Logic Symbol
UDFN6
1.0 x 1.0
CASE 517BX
X M
1
X, XXX = Specific Device Code
M
W
G
= Date Code*
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
February, 2021 − Rev. 1
NL17SZ175/D
NL17SZ175
Connection Diagrams
CP
GND
D
1
2
3
CP
6
5
4
C
CP 1
GND 2
D 3
6 C
5 V
C
Q
V
CC
D
CC
Q
4 Q
Figure 2. SC−88/SC−74 (Top View)
PIN DESCRIPTIONS
Figure 3. UDFN6(Top Through View)
FUNCTION TABLE
Pin Name
Description
Data Input
Inputs
Output
D
CP
C
CP
D
L
C
H
H
H
L
Q
L
Clock Pulse Input
Clear Input
H
X
X
H
Q
Flip−Flop Output
Qn
L
X
H = HIGH Logic Level
L = LOW Logic Level
Qn = No Change in Data
X = Immaterial
www.onsemi.com
2
NL17SZ175
MAXIMUM RATINGS
Symbol
Characteristics
Value
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
DC Output Voltage
−0.5 to +6.5
−0.5 to +6.5
V
IN
V
V
OUT
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
−0.5 to V + 0.5
V
CC
−0.5 to +6.5
−0.5 to +6.5
Power−Down Mode (V = 0 V)
CC
I
DC Input Diode Current
V
< GND
< GND
−50
−50
mA
mA
mA
mA
°C
IK
IN
I
DC Output Diode Current
V
OUT
OK
I
DC Output Source/Sink Current
DC Supply Current per Supply Pin or Ground Pin
Storage Temperature Range
50
OUT
I
or I
GND
STG
100
CC
T
−65 to +150
260
T
Lead Temperature, 1 mm from Case for 10 secs
Junction Temperature Under Bias
Thermal Resistance (Note 2)
°C
L
T
+150
°C
J
q
SC−88
SC−74
UDFN6
377
320
154
°C/W
JA
P
D
Power Dissipation in Still Air
SC−88
SC−74
UDFN6
332
390
812
mW
MSL
Moisture Sensitivity
Level 1
−
−
V
F
R
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage (Note 3)
Human Body Model
Charged Device Model
2000
1000
I
Latchup Performance (Note 4)
$100
mA
Latchup
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Applicable to devices with outputs that may be tri−stated.
2. Measured with minimum pad spacing on an FR4 board, using 10mm−by−1inch, 2 ounce copper trace no air flow per JESD51−7.
3. HBM tested to ANSI/ESDA/JEDEC JS−001−2017. CDM tested to EIA/JESD22−C101−F. JEDEC recommends that ESD qualification to
EIA/JESD22−A115−A (Machine Model) be discontinued per JEDEC/JEP172A.
4. Tested to EIA/JESD78 Class II.
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min
1.65
0
Max
5.5
Unit
V
V
CC
Positive DC Supply Voltage
DC Input Voltage
V
IN
5.5
V
V
OUT
DC Output Voltage
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
0
0
0
V
CC
5.5
5.5
Power−Down Mode (V = 0 V)
CC
T
Operating Temperature Range
Input Rise and Fall Time
−55
+125
°C
A
t , t
r
V = 1.65 V to 1.95 V
CC
0
0
0
0
20
20
10
5
ns
f
V
CC
V
CC
V
CC
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
www.onsemi.com
3
NL17SZ175
DC ELECTRICAL CHARACTERISTICS
T
A
= 255C
Typ
−555C 3 T 3 1255C
A
V
(V)
CC
Min
Max
Min
Max
Symbol
Parameter
Condition
Units
1.65 to 1.95 0.65 V
−
−
−
−
−
−
0.65 V
−
−
V
High−Level Input
V
CC
CC
CC
IH
Voltage
2.3 to 5.5
1.65 to 1.95
2.3 to 5.5
0.70 V
0.70 V
CC
−
−
0.35 V
−
−
0.35 V
V
Low−Level Input
Voltage
V
V
CC
CC
IL
0.30 V
0.30 V
CC
CC
V
OH
High−Level Output
Voltage
V
= V or V
IH IL
IN
OH
OH
OH
OH
OH
OH
I
I
I
I
I
I
= −100 mA
= −4 mA
1.65 to 5.5
V
CC
− 0.1
V
CC
−
−
−
−
−
−
V − 0.1
CC
1.29
−
−
−
−
−
−
1.65
2.3
3
3
4.5
1.29
1.52
2.1
2.7
2.5
4
= −8 mA
1.9
2.4
2.3
3.8
1.9
2.4
2.3
3.8
= −16 mA
= −24 mA
= −32 mA
V
OL
Low−Level Output
Voltage
V
= V or V
V
IN
OH
OH
OH
OH
OH
OH
IH
IL
I
I
I
I
I
I
= 100 mA
= 4 mA
1.65 to 5.5
−
−
−
−
−
−
−
0.1
0.24
0.3
0.4
0.55
0.55
−
−
−
−
−
−
0.1
0.24
0.3
0.4
0.55
0.55
1.65
2.3
3
3
4.5
0.08
0.12
0.24
0.26
0.31
= 8 mA
= 16 mA
= 24 mA
= 32 mA
I
Input Leakage Current
V
= 5.5 V or GND
= 5.5 V or
1.65 to 5.5
0
−
−
−
−
0.1
1.0
−
−
1.0
10
mA
mA
IN
IN
I
Power Off Leakage
Current
V
V
OFF
IN
OUT
= 5.5 V
I
Quiescent Supply
Current
V
IN
= V or GND
5.5
−
−
1.0
−
10
mA
CC
CC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
www.onsemi.com
4
NL17SZ175
AC ELECTRICAL CHARACTERISTICS
T
A
= +25°C
Typ
−
T = −40 to +85°C
A
Min
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Max
−
Min
100
Max
−
Unit
Symbol
Parameter
V
(V)
Conditions
CC
f
Maximum Clock Frequency
(Figure 4, 5)
1.65
1.8
C = 50 pF,
MHz
MAX
L
R = 500 W
L
−
−
100
125
150
175
−
−
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
1.65
−
−
−
−
−
−
−
−
−
t
, t
Propagation Delay, CP to Q
(Figure 4, 5)
C = 15 pF,
9.8
6.5
3.8
2.8
2.2
3.4
2.6
9.8
6.5
3.8
2.8
2.2
3.4
2.7
−
15.0
10.0
6.5
4.5
3.5
5.5
4.0
13.5
9.0
6.0
4.3
3.2
5.3
4.0
−
16.5
11.0
7.0
5.0
3.8
6.2
4.7
15.0
10.0
6.4
4.6
3.5
5.8
4.5
−
ns
PLH PHL
L
R = 1 MW
L
1.8
−
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
3.0 to 3.6
4.5 to 5.5
1.65
−
−
−
C = 50 pF,
−
L
R = 500 W
L
−
t
Propagation Delay, C to Q
(Figure 4, 5)
C = 15 pF,
−
ns
PHL
L
R = 1 MW
L
1.8
−
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
3.0 to 3.6
4.5 to 5.5
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
−
−
−
C = 50 pF,
−
L
R = 500 W
L
−
t
S
Setup Time, CP to D
(Figure 4, 5)
C = 50 pF,
2.5
2.0
1.5
1.5
1.5
1.5
3.0
2.8
2.5
3.0
2.8
2.5
1.0
1.0
1.0
ns
ns
ns
ns
ns
L
R = 500 W
L
−
−
−
−
−
−
t
H
Hold Time, CP to D
(Figure 4, 5)
C = 50 pF,
−
−
−
L
R = 500 W
L
−
−
−
−
−
−
t
W
Pulse Width, CP
(Figure 4, 5)
C = 50 pF,
−
−
−
L
R = 500 W
L
−
−
−
−
−
−
Pulse Width, C
(Figure 4, 5)
Clock HIGH
or LOW
−
−
−
−
−
−
C = 50 pF,
L
R = 500 W
L
−
−
−
t
Recovery Time, C to CP
(Figure 4, 5)
C = 50 pF,
−
−
−
rec
L
R = 500 W
L
−
−
−
−
−
−
www.onsemi.com
5
NL17SZ175
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Input Capacitance
Condition
Typical
2.5
Units
pF
C
V
V
= 5.5 V, V = 0 V or V
IN
IN
CC
CC
CC
C
Output Capacitance
= 5.5 V, V = 0 V or V
4.0
pF
OUT
CC
IN
C
Power Dissipation Capacitance
(Note 5)
10 MHz, V = 5.5 V, V = 0 V or V
CC
4.0
pF
PD
CC
IN
5. C is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
) at
PD
CCD
no output loading and operating at 50% duty cycle. C is related to I
dynamic operating current by the expression:
PD
CCD
I
= (C ) (V ) (f ) + (I static).
CCD
PD
CC
IN
CC
OPEN
Test
Switch
C , pF
L
R , W R , W
L 1
2 x V
GND
Position
CC
t
/ t
Open
See AC Characteristics Table
PLH PHL
R
R
1
L
t
/ t
2 x V
50
50
500
500
500
500
PLZ PZL
CC
t
/ t
GND
DUT
OUTPUT
PHZ PZH
X = Don’t Care
R
T
C *
L
C includes probe and jig capacitance
L
R is Z
of pulse generator (typically 50 W)
T
OUT
f = 1 MHz
Figure 4. Test Circuit
Figure 5. Switching Waveforms
V , V
mo
t
, t
t
, t , t , t
PZL PLZ PZH PHZ
V
, V
V
, V
/ 2
/ 2
/ 2
/ 2
V , V
PLH PHL
CC
mi
Y
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
V
CC
V
CC
V
CC
V
CC
V
V
V
V
/ 2
/ 2
/ 2
/ 2
V
CC
V
CC
V
CC
V
CC
/ 2
/ 2
/ 2
/ 2
0.15
0.15
0.3
CC
CC
CC
CC
0.3
www.onsemi.com
6
NL17SZ175
DEVICE ORDERING INFORMATION
Pin 1 Orientation
(See below)
†
Device
Packages
Specific Device Code
Shipping
NL17SZ175DFT2G
(In Development)
SC−88
TBD
Q4
3000 / Tape & Reel
NL17SZ175DBVT1G
SC−74
AT
Q4
Q4
3000 / Tape & Reel
3000 / Tape & Reel
NL17SZ175MU1TCG
(In Development)
UDFN6, 1.45 x 1.0, 0.5P
TBD
NL17SZ175MU3TCG
(In Development)
UDFN6, 1.0 x 1.0, 0.35P
TBD
Q4
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Pin 1 Orientation in Tape and Reel
www.onsemi.com
7
NL17SZ175
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
2X
aaa H D
NOTES:
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa C
2X
2X 3 TIPS
bbb H D
e
MILLIMETERS
DIM MIN NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−− 0.043
−−− 0.004
6X b
B
TOP VIEW
A
−−−
−−−
1.10
A1 0.00
A2 0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1 1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
6X
0.66
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
8
NL17SZ175
PACKAGE DIMENSIONS
SC−74
CASE 318F−05
ISSUE N
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
6
5
2
4
4. 318F−01, −02, −03, −04 OBSOLETE. NEW STANDARD 318F−05.
E
H
E
1
3
MILLIMETERS
INCHES
NOM
0.039
0.002
0.015
0.007
0.118
0.059
0.037
0.016
0.108
−
DIM
A
A1
b
c
D
E
e
L
MIN
0.90
0.01
0.25
0.10
2.90
1.30
0.85
0.20
2.50
0°
NOM
1.00
0.06
0.37
0.18
3.00
1.50
0.95
0.40
2.75
−
MAX
MIN
0.035
0.001
0.010
0.004
0.114
0.051
0.034
0.008
0.099
0°
MAX
0.043
0.004
0.020
0.010
0.122
0.067
0.041
0.024
0.118
10°
1.10
0.10
0.50
0.26
3.10
1.70
1.05
0.60
3.00
10°
b
e
q
c
A
0.05 (0.002)
H
E
q
L
A1
SOLDERING FOOTPRINT*
2.4
0.094
0.95
0.037
1.9
0.074
0.95
0.037
0.7
0.028
1.0
mm
inches
ǒ
Ǔ
SCALE 10:1
0.039
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 1:
PIN 1. CATHODE
2. ANODE
STYLE 2:
STYLE 3:
PIN 1. EMITTER 1
2. BASE 1
STYLE 4:
PIN 1. COLLECTOR 2
STYLE 5:
PIN 1. CHANNEL 1
2. ANODE
STYLE 6:
PIN 1. CATHODE
2. ANODE
PIN 1. NO CONNECTION
2. COLLECTOR
3. EMITTER
2. EMITTER 1/EMITTER 2
3. COLLECTOR 1
4. EMITTER 3
5. BASE 1/BASE 2/COLLECTOR 3
6. BASE 3
3. CATHODE
4. CATHODE
5. ANODE
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
3. CHANNEL 2
4. CHANNEL 3
5. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. NO CONNECTION
5. COLLECTOR
6. BASE
6. CATHODE
6. COLLECTOR 1
6. CHANNEL 4
STYLE 10:
STYLE 11:
PIN 1. EMITTER
2. BASE
STYLE 7:
PIN 1. SOURCE 1
2. GATE 1
STYLE 8:
PIN 1. EMITTER 1
2. BASE 2
STYLE 9:
PIN 1. EMITTER 2
2. BASE 2
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
3. DRAIN 2
4. SOURCE 2
5. GATE 2
3. COLLECTOR 2
4. EMITTER 2
5. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
4. COLLECTOR
5. ANODE
6. CATHODE
6. DRAIN 1
6. COLLECTOR 1
6. COLLECTOR 2
www.onsemi.com
9
NL17SZ175
PACKAGE DIMENSIONS
UDFN6, 1.45x1.0, 0.5P
CASE 517AQ
ISSUE O
A
B
D
L
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
L1
DETAIL A
PIN ONE
REFERENCE
OPTIONAL
E
MILLIMETERS
CONSTRUCTIONS
DIM MIN
0.45
A1 0.00
MAX
0.55
0.05
A
0.10
C
EXPOSED Cu
MOLD CMPD
A2
b
0.07 REF
0.20
1.45 BSC
TOP VIEW
0.30
0.10
C
D
E
e
1.00 BSC
0.50 BSC
DETAIL B
L
L1
0.30
−−−
0.40
0.15
DETAIL B
OPTIONAL
0.05
0.05
C
C
CONSTRUCTIONS
A
6X
MOUNTING FOOTPRINT
A1
SEATING
PLANE
6X
A2
C
SIDE VIEW
e
0.30
PACKAGE
OUTLINE
6X L
1.24
3
1
DETAIL A
6X
0.53
1
0.50
PITCH
DIMENSIONS: MILLIMETERS
6
4
6X b
0.10 C A B
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
NOTE 3
C
0.05
BOTTOM VIEW
www.onsemi.com
10
NL17SZ175
PACKAGE DIMENSIONS
UDFN6, 1x1, 0.35P
CASE 517BX
ISSUE O
NOTES:
A B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
PIN ONE
REFERENCE
E
2X
0.10
C
MILLIMETERS
DIM MIN
MAX
0.55
0.05
A
A1
A3
b
0.45
0.00
0.13 REF
2X
0.10
C
TOP VIEW
0.12
0.22
A3
D
E
e
L
1.00 BSC
1.00 BSC
0.35 BSC
0.05
C
C
A
0.25
0.30
0.35
0.40
L1
0.05
RECOMMENDED
A1
SEATING
PLANE
C
SIDE VIEW
e
SOLDERING FOOTPRINT*
05.4X8
6X
0.22
5X L
3
1
L1
1.18
6
4
1
0.35
6X b
0.53
PKG
PITCH
M
0.10
C A B
OUTLINE
DIMENSIONS: MILLIMETERS
M
NOTE 3
C
0.05
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Email Requests to: orderlit@onsemi.com
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800−282−9855 Toll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
ON Semiconductor Website: www.onsemi.com
◊
www.onsemi.com
相关型号：
©2020 ICPDF网 联系我们和版权申明