NL17SZ1 [ONSEMI]
Single Non-Inverting Buffer with Schmitt Trigger; 单非反相缓冲器带施密特触发器
| 型号： | NL17SZ1 |
| 厂家： | 
ONSEMI |
| 描述： | Single Non-Inverting Buffer with Schmitt Trigger |
| 文件： | 总6页 (文件大小：63K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NL17SZ17
Single Non−Inverting Buffer
with Schmitt Trigger
The NL17SZ17 is a single Non−inverting Schmitt Trigger Buffer in
two tiny footprint packages. The device performs much as LCX
multi−gate products in speed and drive.
http://onsemi.com
Features
• Tiny SOT−353 and SOT−553 Packages
• Source/Sink 24 mA at 3.0 Volts
MARKING
DIAGRAMS
• Overvoltage Tolerant Inputs and Outputs
• Chip Complexity: FETs = 20
5
5
d
LX
1
• Designed for 1.65 V to 5.5 V V Operation
CC
SOT−353/SC70−5/SC−88A
DF SUFFIX
1
• Pb−Free Packages are Available
CASE 419A
d = Date Code
5
5
LX D
1
1
SOT−553
XV5 SUFFIX
CASE 463B
5
4
NC
A
V
Y
1
2
CC
LX = Device Marking
D
= One Digit Date Code
GND
3
PIN ASSIGNMENT
Pin
Function
1
NC
Figure 1. Pinout (Top View)
2
3
4
5
A
GND
Y
Y
A
V
CC
Figure 2. Logic Symbol
FUNCTION TABLE
A Input
Y Output
L
L
H
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
December, 2004 − Rev. 6
NL17SZ17/D
NL17SZ17
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
CC
DC Supply Voltage
*0.5 to )7.0
V
DC Input Voltage
*0.5 ≤ V ≤ )7.0
V
I
O
I
V
DC Output Voltage
Output in High or LOW State (Note 1)
V < GND
*0.5 ≤ V ≤ 7.0
V
O
I
IK
DC Input Diode Current
*50
*50
mA
mA
mA
mA
mA
°C
I
I
DC Output Diode Current
DC Output Sink Current
V < GND
O
OK
I
O
$50
I
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
$100
CC
I
$100
GND
T
*65 to )150
260
STG
T
L
°C
T
J
)150
°C
SOT−353 (Note 2)
SOT−553
350
496
°C/W
q
JA
Power Dissipation in Still Air at 85°C
SOT−353
SOT−553
186
135
mW
mA
P
D
MSL
Moisture Sensitivity
Flammability Rating
Level 1
UL 94 V−0 @ 0.125 in
±500
F
R
Oxygen Index: 28 to 34
I
Latchup Performance
ESD Classification
Above V and Below GND at 85°C (Note 6)
Latchup
CC
Human Body Model (Note 3)
Machine Model (Note 4)
Charged Device Model
Class IC
Class A
N/A
ESD
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. I absolute maximum rating must be observed.
O
2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
3. Tested to EIA/JESD22−A114−A, rated to EIA/JESD22−A114−B.
4. Tested to EIA/JESD22−A115−A, rated to EIA/JESD22−A115−A.
5. Tested to JESD22−C101−A.
6. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
Supply Voltage
Operating
Data Retention Only
1.65
1.5
5.5
5.5
V
V
Input Voltage, (Note 7)
0
0
5.5
5.5
V
V
I
V
O
Output Voltage
(HIGH or LOW State)
T
Operating Free−Air Temperature
Input Transition Rise or Fall Rate
*40
)85
°C
A
Dt/DV
V
CC
V
CC
V
CC
= 2.5 V $0.2 V
= 3.0 V $0.3 V
= 5.0 V $0.5 V
0
0
0
No Limit
No Limit
No Limit
ns/V
7. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.
http://onsemi.com
2
NL17SZ17
DC ELECTRICAL CHARACTERISTICS
T
A
= 255C
Typ
*405C v T v 855C
A
V
(V)
CC
Min
Max
Min
Max
Symbol
V )
Parameter
Positive Input
Condition
Unit
1.65
2.3
2.7
3.0
4.5
5.5
0.6
1.0
1.2
1.3
1.9
2.2
1.0
1.5
1.7
1.9
2.7
3.3
1.4
1.8
2.0
2.2
3.1
3.6
0.6
1.0
1.2
1.3
1.9
2.2
1.4
1.8
2.0
2.2
3.1
3.6
V
T
Threshold Voltage
V *
Negative Input
Threshold Voltage
1.65
2.3
2.7
3.0
4.5
5.5
0.2
0.4
0.5
0.6
1.0
1.2
0.5
0.75 1.15
0.87
1.0
1.5
1.9
0.8
0.2
0.4
0.5
0.6
1.0
1.2
0.8
1.15
1.4
1.5
2.0
2.3
V
V
V
T
1.4
1.5
2.0
2.3
V
H
Input Hysteresis Voltage
1.65
2.3
2.7
3.0
4.5
5.5
0.1
0.25
0.3
0.4
0.6
0.7
0.48
0.75
0.83 1.15
0.93
1.2
1.4
0.9
1.1
0.1
0.25
0.3
0.4
0.6
0.7
0.9
1.1
1.15
1.2
1.5
1.7
1.2
1.5
1.7
V
OH
High−Level Output Voltage
I
I
I
I
I
I
I
= −100 mA
= −3 mA
1.65 to 5.5
1.65
2.3
V
*0.1
V
CC
V
*0.1
OH
OH
OH
OH
OH
OH
OH
CC
CC
V
IN
= V or V
IL
1.29
1.52
2.1
2.4
2.7
2.5
4.0
1.29
1.9
2.2
2.4
2.3
3.8
IH
= *8 mA
= *12 mA
= *16 mA
= *24 mA
= *32 mA
1.9
2.2
2.4
2.3
3.8
2.7
3.0
3.0
4.5
V
OL
Low−Level Output Voltage
= V or V
I
OL
I
OL
I
OL
I
OL
I
OL
I
OL
I
OL
= 100 mA
= 4 mA
= 8 mA
= 12 mA
= 16 mA
= 24 mA
= 32 mA
1.65 to 5.5
1.65
2.3
0.1
0.08 0.24
0.1
0.24
0.3
0.4
0.4
0.55
0.55
V
V
IN
IH
IL
0.2
0.22
0.28
0.3
0.4
0.4
2.7
3.0
3.0
4.5
0.38 0.55
0.42 0.55
I
Input Leakage Current
V
V
= 5.5 V or GND
0 to 5.5
0
$0.1
$1.0
mA
mA
IN
IN
I
Power Off−Output
Leakage Current
= 5.5 V
1.0
10
OFF
OUT
I
Quiescent Supply Current
V
IN
= V or GND
5.5
1.0
10
mA
CC
CC
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns)
r
f
T
A
= 255C
*405C v T v 855C
A
V
(V)
CC
Min
Typ
Max
Min
Max
Symbol
Parameter
Condition
Unit
t
t
Propagation Delay
Input A to Y
(Figures 3 and 4)
R = 1 MW, C = 15 pF
1.65
1.8
2.5 $ 0.2
3.3 $ 0.3
5.0 $ 0.5
2.0
2.0
1.0
1.0
0.5
9.1
7.6
5.0
3.7
3.1
15
12.5
9.0
6.3
5.2
2.0
2.0
1.0
1.0
0.5
15.6
13
9.5
6.5
5.5
ns
PLH
L
L
PHL
R = 500 W, C = 50 pF
3.3 $ 0.3
5.0 $ 0.5
1.5
0.8
4.4
3.7
7.2
5.9
1.5
0.8
7.5
6.2
L
L
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
= 5.5 V, V = 0 V or V
Typical
Unit
pF
C
Input Capacitance
V
CC
u2.5
IN
I
CC
C
Power Dissipation Capacitance
(Note 8)
10 MHz, V = 3.3 V, V = 0 V or V
9
11
pF
PD
CC
I
CC
CC
10 MHz, V = 5.5 V, V = 0 V or V
CC
I
8. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
http://onsemi.com
3
NL17SZ17
INPUT
OUTPUT
V
CC
A or B
50%
GND
R
C
L
L
t
t
PHL
PLH
Y
A 1 MHz square input wave is recommended for
propagation delay tests.
50% V
CC
Figure 4. Test Circuit
Figure 3. Switching Waveforms
4
3
2
1
(V ))
T
V typ
H
(V *)
T
2
2.5
3
3.5 3.6
V
CC
, POWER SUPPLY VOLTAGE (VOLTS)
V typ = (V ) typ) − (V * typ)
H
T
T
Figure 5. Typical Input Threshold, VT), VT* versus Power Supply Voltage
V
CC
V
CC
V
H
V
H
V )
V )
T
T
V
in
V
in
V *
T
V *
T
GND
GND
V
V
OH
OH
OL
V
out
V
out
V
OL
V
(b) A Schmitt−Trigger Offers Maximum Noise Immunity
(a) A Schmitt−Trigger Squares Up Inputs With Slow
Rise and Fall Times
Figure 6. Typical Schmitt−Trigger Applications
DEVICE ORDERING INFORMATION
Device Nomenclature
Logic
No. of
Temp
Tape and
Device Order
Number
Device Package
Package
Type
Tape/Reel
Size
Circuit
Gates per
Range
Reel
Suffix
†
Function
Suffix
Indicator Package Identifier
Technology
NL17SZ17DFT2
NL
1
7
SZ
17
DF
T2
SOT−353/SC70−5/ 178 mm,
SC−88A 3000 Units
NL17SZ17DFT2G
NL
1
7
SZ
SZ
17
17
DF
T2
SOT−353/SC70−5/ 178 mm,
SC−88A
3000 Units
(Pb−Free)
NL17SZ17XV5T2
NL
1
7
XV5
T2
SOT−553*
(Pb−Free)
178 mm,
4000 Units
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
http://onsemi.com
4
NL17SZ17
PACKAGE DIMENSIONS
SOT−353
DF SUFFIX
5−LEAD PACKAGE
CASE 419A−02
ISSUE G
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
A
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD 419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
G
INCHES
DIM MIN MAX
MILLIMETERS
5
4
3
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
−B−
S
1
2
0.026 BSC
0.65 BSC
−−−
0.004
0.004
0.004
0.010
0.012
−−−
0.10
0.10
0.10
0.25
0.30
M
M
B
K
N
S
0.2 (0.008)
D 5 PL
0.008 REF
0.20 REF
0.079
0.087
2.00
2.20
N
J
C
K
H
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
NL17SZ17
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
5−LEAD PACKAGE
CASE 463B−01
ISSUE A
NOTES:
A
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
C
−X−
K
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
5
4
3
B
−Y−
S
1
2
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.067
0.051
0.024
0.011
A
B
C
D
G
J
1.50
1.10
0.50
0.17
1.70 0.059
1.30 0.043
0.60 0.020
0.27 0.007
D 5 PL
J
G
M
0.08 (0.003)
X
Y
0.50 BSC
0.020 BSC
0.08
0.10
1.50
0.18 0.003
0.30 0.004
1.70 0.059
0.007
0.012
0.067
K
S
STYLE 1:
STYLE 2:
PIN 1. BASE 1
2. EMITTER 1/2
3. BASE 2
4. COLLECTOR 2
5. COLLECTOR 1
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
NL17SZ17/D
相关型号：
©2020 ICPDF网 联系我们和版权申明