NLV14067BDWR2G [ONSEMI]
Analog Multiplexers / Demultiplexers;
| 型号： | NLV14067BDWR2G |
| 厂家： | 
ONSEMI |
| 描述： | Analog Multiplexers / Demultiplexers |
| 文件： | 总9页 (文件大小：143K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC14067B
Analog Multiplexers /
Demultiplexers
The MC14067 multiplexer/demultiplexer is a digitally controlled
analog switch featuring low ON resistance and very low leakage
current. This device can be used in either digital or analog
applications.
http://onsemi.com
The MC14067 is a 16−channel multiplexer/demultiplexer with an
inhibit and four binary control inputs A, B, C, and D. These control
inputs select 1−of−16 channels by turning ON the appropriate analog
switch (see MC14067 truth table.)
Features
SOIC−24
DW SUFFIX
CASE 751E
• Low OFF Leakage Current
• Matched Channel Resistance
• Low Quiescent Power Consumption
• Low Crosstalk Between Channels
• Wide Operating Voltage Range: 3 to 18 V
• Low Noise
MARKING DIAGRAM
14067B
AWLYYWWG
• Pin for Pin Replacement for CD4067B
• These Devices are Pb−Free and are RoHS Compliant
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
A
= Assembly Location
WL = Wafer Lot
YY = Year
MAXIMUM RATINGS (Voltages Referenced to V
)
WW = Work Week
SS
G
= Pb−Free Package
Symbol
Parameter
Value
– 0.5 to + 18.0
Unit
V
V
DD
DC Supply Voltage Range
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
V , V
in out
Input or Output Voltage Range
(DC or Transient)
– 0.5 to V + 0.5
V
DD
I
in
Input Current (DC or Transient),
per Control Pin
10
mA
I
sw
Switch Through Current
25
mA
P
D
Power Dissipation, per Package
(Note 1)
500
mW
T
Ambient Temperature Range
Storage Temperature Range
– 55 to + 125
– 65 to + 150
260
_C
_C
_C
A
T
stg
T
Lead Temperature
(8–Second Soldering)
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: − 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V or V ). Unused outputs must be left open.
SS
DD
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
May, 2013 − Rev. 8
MC14067B/D
MC14067B
TRUTH TABLE
Control Inputs
Selected
Channel
A
B
C
D
Inh
X
0
1
0
X
0
0
1
X
0
0
0
X
0
0
0
1
0
0
0
None
X0
X1
X2
1
0
1
0
1
0
0
1
0
1
1
1
0
0
0
0
0
0
0
0
X3
X4
X5
X6
1
0
1
0
1
0
0
1
1
0
0
0
0
1
1
1
0
0
0
0
X7
X8
X9
X10
1
0
1
0
1
1
0
0
1
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
X11
X12
X13
X14
X15
PIN ASSIGNMENT
16−Channel Analog
Multiplexer/Demultiplexer
X
X7
X6
X5
X4
X3
1
2
3
4
5
6
24
V
DD
23 X8
22 X9
21 X10
20 X11
19 X12
15
10
11
14
13
9
INHIBIT
A
B
CONTROLS
C
D
X0
8
X1
X2
X1
X0
A
7
18 X13
17 X14
16 X15
15 INHIBIT
7
X2
6
X3
8
5
X4
9
COMMON
OUT/IN
4
X5
X
1
10
11
12
3
X6
B
14
13
C
D
2
X7
SWITCHES
IN/OUT
23
22
21
20
19
18
17
16
X8
V
SS
X9
V
DD
= PIN 24
= PIN 12
X10
X11
X12
X13
X14
X15
V
SS
FUNCTIONAL DIAGRAM
INHIBIT
A
B
C
D
CONTROL
INPUTS
1-OF-16 DECODER
X0
X1
X2
X3
X4
X5
X6
X7
X8
X9
X
IN/OUT
X
OUT/IN
X10
X11
X12
X13
X14
X15
http://onsemi.com
2
MC14067B
ELECTRICAL CHARACTERISTICS
− 55°C
Min Max Min
25_C
125_C
Max Min Max
(2)
Typ
Characteristic
Symbol
V
DD
Test Conditions
Unit
SUPPLY REQUIREMENTS (Voltages Referenced to V
)
SS
Power Supply Voltage
Range
V
DD
−
3.0
18
3.0
−
18
3.0
18
V
Quiescent Current Per
Package
I
5.0 Control Inputs: V
−
−
−
5.0
10
20
−
−
−
0.005
0.010
0.015
5.0
10
20
−
−
−
150
300
600
mA
DD
in =
10
V
SS
or V
,
DD
15 Switch I/O: V v V
v
(3)
SS
I/O
V
DD
, and
DV
v500 mV
switch
Total Supply Current
(Dynamic Plus
Quiescent,
I
5.0
10
15
T
A
= 25_C only (The
mA
D(AV)
(0.07 mA/kHz) f + I
(0.20 mA/kHz) f + I
(0.36 mA/kHz) f + I
DD
DD
DD
channel component,
Typical
(V – V )/R , is
in
out
on
Per Package
not included.)
CONTROL INPUTS — INHIBIT, A, B, C, D (Voltages Referenced to V
)
SS
Low−Level Input Voltage
V
5.0
10
15
R
= per spec,
on
= per spec
−
−
−
1.5
3.0
4.0
−
−
−
2.25
4.50
6.75
1.5
3.0
4.0
−
−
−
1.5
3.0
4.0
V
V
IL
IH
in
I
off
High−Level Input Voltage
V
5.0
10
15
R
= per spec,
3.5
7.0
11
−
−
−
3.5
7.0
11
2.75
5.50
8.25
−
−
−
3.5
7.0
11
−
−
−
on
I
off
= per spec
Input Leakage Current
Input Capacitance
I
15
—
V
in
= 0 or V
−
−
0.1
−
−
0.00001
5.0
0.1
7.5
−
−
1.0
mA
DD
C
−
−
pF
in
SWITCHES IN/OUT AND COMMONS OUT/IN — X, Y (Voltages Referenced to V
)
SS
Recommended Peak−to−
Peak Voltage Into or
Out of the Switch
V
−
Channel On or Off
0
V
0
0
−
−
V
0
0
V
V
p−p
I/O
DD
DD
DD
Recommended Static or
Dynamic Voltage
DV
−
Channel On
0
600
600
300
mV
switch
(3)
Across the Switch
(Figure 1)
Output Offset Voltage
ON Resistance
V
−
V
= 0 V, No Load
−
−
−
10
−
−
−
mV
OO
in
(3)
R
5.0 DV
10
15
v 500 mV
,
−
−
−
800
400
220
−
−
−
250
120
80
1050
500
280
−
−
−
1300
550
320
W
on
switch
V = V or V
in IL IH
(Control), and V
in
0 to V (Switch)
DD
DON Resistance
Between
DR
5.0
10
15
−
−
−
70
50
45
−
−
−
25
10
10
70
50
45
−
−
−
135
95
65
W
on
Any Two Channels
in the Same Package
Off−Channel Leakage
I
off
15
V
in
= V or V
IH
−
100
−
0.05
100
−
1000 nA
IL
Current (Figure 2)
(Control) Channel to
Channel or Any One
Channel
Capacitance, Switch I/O
C
C
−
−
Inhibit = V
−
—
—
10
−
−
−
pF
pF
I/O
DD
Capacitance, Common O/I
Inhibit = V
O/I
DD
(MC14067B)
(MC14097B)
−
−
−
−
−
−
100
60
−
−
−
−
−
−
Capacitance, Feedthrough
(Channel Off)
C
−
−
Pins Not Adjacent
Pins Adjacent
−
−
−
0.47
−
−
−
pF
I/O
2. Data labeled “Typ” is not to be used for design purposes, but is intended as an indication of the IC’s potential performance.
3. For voltage drops across the switch (DV
) > 600 mV ( > 300 mV at high temperature), excessive V
DD
current may be drawn; i.e.
switch
DD
the current out of the switch may contain both V and switch input components. The reliability of the device will be unaffected unless the
Maximum Ratings are exceeded. (See first page of this data sheet.)
http://onsemi.com
3
MC14067B
ELECTRICAL CHARACTERISTICS (C = 50 pF, T = 25_C)
L
A
V
– V
SS
DD
Vdc
(4)
Characteristic
Symbol
,t
Typ
Max
Unit
Propagation Delay Times
t
ns
PLH PHL
Channel Input−to−Channel Output (R = 200 kW)
L
MC14067B
(Figure 3)
5.0
10
15
35
15
12
90
40
30
Propagation Delay Times
t
,t
ns
ns
ns
ns
ns
PLH PHL
Channel Input−to−Channel Output (R = 1.0 kW)
MC14067B
L
(Figure 3)
5.0
10
15
50
30
20
Control Input−to−Channel Output
Channel Turn−On Time (R = 10 kW)
MC14067B
L
5.0
10
15
240
115
75
600
290
190
t
, t
PZH PZL
Channel Turn−Off Time (R = 300 kW)
MC14067B
L
(Figure 4)
5.0
10
15
250
120
75
625
300
190
t
,t
PHZ PLZ
Channel Turn−Off Time (R = 10 kW)
MC14067B
L
(Figure 4)
5.0
10
15
625
450
350
Any Pair of Address Inputs to Output
MC14067B
t
, t
PLH PHL
5.0
10
15
280
115
85
700
290
215
Second Harmonic Distortion
−
10
0.3
−
%
(R = 10 kW, f = 1 kHz, V = 5 V
)
L
in
p−p
ON Channel Bandwidth
BW
MHz
[R = 50 W, V = 1/2 (V – V )
(sine−wave)]
Off Channel Feedthrough Attenuation
[R = 50 W, V = 1/2 (V −V ) (sine−wave)]
SS p−p
L
in
DD
SS p−p
20 Log10 (V /V ) = − 3 dB
MC14067B
(Figure 5)
10
10
15
−
−
out in
−
– 40
dB
dB
L
in
DD
f
in
= 20 MHz – MC14067B
(Figure 5)
Channel Separation
[R = 1 kW, V = 1/2 (V −V ) (sine−wave)]
SS p−p
−
10
10
– 40
30
−
−
L
in
DD
f
= 20 MHz
(Figure 6)
in
Crosstalk, Control Inputs−to−Common O/I
(R1 = 1 kW, R = 10 kW,
−
mV
L
Control t = t = 20 ns, Inhibit = V )
(Figure 7)
r
f
SS
4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
http://onsemi.com
4
MC14067B
ORDERING INFORMATION
Device
†
Package
Shipping
SOIC−24
(Pb−Free)
30 Units / Rail
MC14067BDWG
NLV14067BDWG*
MC14067BDWR2G
NLV14067BDWR2G*
SOIC−24
(Pb−Free)
1000 Units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
OFF CHANNEL UNDER TEST
V
DD
ON SWITCH
A
V
CONTROL
SECTION
OF IC
SS
CONTROL
SECTION
OF IC
OTHER
CHANNEL(S)
V
V
SS
LOAD
V
DD
SOURCE
V
V
SS
DD
Figure 1. DV Across Switch
Figure 2. Off Channel Leakage
V
C
A
B
C
D
PULSE
GENERATOR
V
DD
V
out
A
B
C
D
C = 50 pF
L
INH
R
L
V
out
V
in
V
X
INH
C = 50 pF
L
R
L
V
DD
V
SS
V V
SS DD
20 ns
20 ns
V
in
90%
50%
V
C
20 ns
20 ns
90%
10%
V
V
DD
V
in
50%
90%
V = V
in
V = V
DD
10%
V
out
50%
SS
X
SS
t
t
PHL
PLH
t , t
PZH PZL
t , t
PHZ PLZ
50%
V
out
V = V
in
V = V
V
out
50%
SS
10%
X
DD
Figure 3. Propagation Delay Test Circuit
and Waveforms Vin to Vout
Figure 4. Turn−On and Delay Turn−Off
Test Circuit and Waveforms
http://onsemi.com
5
MC14067B
V
DD
A, B, and C inputs used to turn ON or OFF
the switch under test.
R
L
A
B
C
D
ON
A
B
C
OFF
INH
V
out
V
D
out
C = 50 pF
L
R
L
INH
R
C = 50 pF
L
L
V
in
V
in
Figure 5. Bandwidth and Off−Channel
Figure 6. Channel Separation
Feedthrough Attenuation
(Adjacent Channels Used for Setup)
A
B
C
D
V
C
V
out
R
INH
C = 50 pF
L
L
R1
Figure 7. Crosstalk, Control to Common O/I
V
A
B
C
D
A
V
B
INH
V
DD
C
V
DD
L
V
out
KEITHLEY 160
DIGITAL
MULTIMETER
50%
50%
V
A
10 k
V
DD
1 kW
RANGE
X-Y
PLOTTER
V
B
t
t
PLH
PHL
V
SS
V
out
50%
Figure 8. Channel Resistance (RON) Test Circuit
Figure 9. Propagation Delay, Any Pair of
Address Inputs to Output
http://onsemi.com
6
MC14067B
TYPICAL RESISTANCE CHARACTERISTICS
350
300
350
300
250
200
150
100
250
200
150
T = 125°C
A
T = 125°C
A
100
25°C
25°C
-ꢀ55°C
-ꢀ55°C
50
0
50
0
-ꢀ10 -ꢀ8.0 -ꢀ6.0 -ꢀ4.0 -ꢀ2.0
-ꢀ10 -ꢀ8.0 -ꢀ6.0 -ꢀ4.0 -ꢀ2.0
0
0.2 4.0 6.0 8.0
10
0
0.2 4.0
6.0 8.0 10
V , INPUT VOLTAGE (VOLTS)
in
V , INPUT VOLTAGE (VOLTS)
in
Figure 10. VDD = 7.5 V, VSS = − 7.5 V
Figure 11. VDD = 5.0 V, VSS = − 5.0 V
350
300
700
600
T = 25°C
A
250
200
150
100
500
400
300
200
V
DD
= 2.5 V
T = 125°C
5.0 V
A
7.5 V
25°C
50
0
100
0
-ꢀ55°C
-ꢀ10 -ꢀ8.0 -ꢀ6.0 -ꢀ4.0 -ꢀ2.0
0
0.2 4.0
6.0 8.0 10
-ꢀ10 -ꢀ8.0 -ꢀ6.0 -ꢀ4.0 -ꢀ2.0
0
0.2 4.0 6.0 8.0
10
V , INPUT VOLTAGE (VOLTS)
in
V , INPUT VOLTAGE (VOLTS)
in
Figure 13. Comparison at 25°C, VDD = −ꢀVSS
Figure 12. VDD = 2.5 V, VSS = − 2.5 V
http://onsemi.com
7
MC14067B
APPLICATIONS INFORMATION
Figure A illustrates use of the Analog Multiplexer /
Demultiplexer. The 0−to−5 V Digital Control signal is used
signal which allows no margin at either peak. If voltage
transients above V and/or below V are anticipated on
DD
SS
to directly control a 5 V analog signal.
the analog channels, external diodes (D ) are recommended
p−p
x
The digital control logic levels are determined by V
as shown in Figure B. These diodes should be small signal
types able to absorb the maximum anticipated current surges
during clipping.
DD
and V . The V voltage is the logic high voltage; the V
SS
DD
SS
voltage is logic low. For the example. V = + 5 V = logic
DD
high at the control inputs; V = GND = 0 V = logic low.
The absolute maximum potential difference between V
SS
DD
The maximum analog signal level is determined by V
and V is 18.0 volts. Most parameters are specified up to
DD
SS
and V . The analog voltage must swing neither higher than
15 V which is the recommended maximum difference
SS
V
nor lower than V . The example shows a 5 V
between V and V .
DD
SS
p−p
DD SS
+5 V
V
DD
V
SS
+ꢀ5.0 V
5 V
SWITCH
I/O
p-p
5 V
ANALOG SIGNAL
COMMON
O/I
p-p
+2.5 V
ANALOG SIGNAL
+5 V
GND
MC14067B
EXTERNAL
CMOS
DIGITAL
0-TO-5 V DIGITAL
CONTROL SIGNALS
CIRCUITRY
Figure A. Application Example
V
DD
V
DD
D
D
D
X
X
X
X
SWITCH
I/O
COMMON
O/I
D
V
SS
V
SS
Figure B. External Germanium or Schottky Clipping Diodes
http://onsemi.com
8
MC14067B
PACKAGE DIMENSIONS
SOIC−24 WB
CASE 751E−04
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
H
D
A
B
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS b AND c APPLY TO THE FLAT SEC-
TION OF THE LEAD AND ARE MEASURED
BETWEEN 0.10 AND 0.25 FROM THE LEAD TIP.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH, PROTRUSIONS OR GATE BURRS SHALL
NOT EXCEED 0.15 mm PER SIDE. INTERLEAD
FLASH OR PROTRUSION SHALL NOT EXCEED
0.25 PER SIDE. DIMENSIONS D AND E1 ARE
DETERMINED AT DATUM H.
0.25 C
24
1
13
12
E
E1
L
C
DETAIL A
5. A1 IS DEFINED AS THE VERTICAL DISTANCE
FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
24X
b
PIN 1
INDICATOR
M
S
S
B
0.25
C A
MILLIMETERS
DIM MIN
MAX
2.65
0.29
0.49
0.32
15.54
TOP VIEW
NOTE 3
A
A1
b
2.35
0.13
0.35
h
x 45
_
A
M
c
0.23
D
E
15.25
10.30 BSC
E1
e
h
L
M
7.40
1.27 BSC
7.60
c
SEATING
PLANE
e
A1
DETAIL A
C
NOTE 3
0.25
0.41
0
0.75
0.90
8
NOTE 5
END VIEW
SIDE VIEW
_
_
RECOMMENDED
SOLDERING FOOTPRINT*
24X
1.62
24X
0.52
11.00
1
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
MC14067B/D
相关型号：
©2020 ICPDF网 联系我们和版权申明