NLV74HC157ADTR2G [ONSEMI]
Quad 2-Input Data Selectors/Multiplexers;
| 型号： | NLV74HC157ADTR2G |
| 厂家： | 
ONSEMI |
| 描述： | Quad 2-Input Data Selectors/Multiplexers |
| 文件： | 总7页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74HC157A
Quad 2-Input Data
Selectors/Multiplexers
High−Performance Silicon−Gate CMOS
The MC74HC157A is identical in pinout to the LS157. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
http://onsemi.com
This device routes 2 nibbles (A or B) to a single port (Y) as
determined by the Select input. The data is presented at the outputs in
noninverted form. A high level on the Output Enable input sets all four
Y outputs to a low level.
SOIC−16
D SUFFIX
CASE 751B
TSSOP−16
DT SUFFIX
CASE 948F
Features
PIN ASSIGNMENT
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
SELECT
A0
1
2
16
15
V
CC
OUTPUT
ENABLE
B0
Y0
A1
B1
3
4
5
6
14 A3
13 B3
12 Y3
11 A2
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Y1
7
8
10 B2
• Chip Complexity: 82 FETs or 20.5 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
GND
9
Y2
MARKING DIAGRAMS
16
1
16
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
HC
Compliant
HC157AG
AWLYWW
157A
ALYWG
G
1
2
A0
SOIC−16
TSSOP−16
5
A1
NIBBLE
A
= Assembly Location
= Wafer Lot
11
A INPUTS
4
7
A2
A3
L, WL
Y, YY
Y0
Y1
Y2
Y3
14
= Year
W, WW = Work Week
DATA
9
G or G
= Pb−Free Package
3
6
OUTPUTS
B0
B1
B2
B3
12
(Note: Microdot may be in either location)
NIBBLE
10
13
FUNCTION TABLE
Inputs
B INPUTS
PIN 16 = V
CC
PIN 8 = GND
Output
Outputs
1
Enable Select Y0 − Y3
SELECT
H
L
L
X
L
H
L
15
OUTPUT
ENABLE
A0−A3
B0−B3
X = don’t care
Figure 1. Logic Diagram
A0−A3, B0−B3 = the levels of
the respective Data−Word
Inputs.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
August, 2014 − Rev. 12
MC74HC157A/D
MC74HC157A
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
–0.5 to +7.0
CC
V
–0.5 to V + 0.5
V
in
CC
V
out
–0.5 to V + 0.5
V
CC
I
20
25
50
mA
mA
mA
mW
in
cuit. For proper operation, V and
in
I
I
DC Output Current, per Pin
out
V
out
should be constrained to the
range GND v (V or V ) v V
.
DC Supply Current, V and GND Pins
in
out
CC
CC
CC
Unused inputs must always be
tied to an appropriate logic voltage
P
D
Power Dissipation in Still Air,
SOIC Package†
TSSOP Package†
500
450
level (e.g., either GND or V ).
CC
Unused outputs must be left open.
T
Storage Temperature
– 65 to + 150
_C
_C
stg
T
Lead Temperature, 1 mm from Case for 10 Seconds
(SOIC or TSSOP Package)
L
260
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
†Derating: SOIC Package: –7 mW/_C from 65_ to 125_C
TSSOP Package: −6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
DC Supply Voltage (Referenced to GND)
Min
2.0
0
Max
Unit
V
V
CC
6.0
V , V
in out
DC Input Voltage, Output Voltage
(Referenced to GND)
V
CC
V
T
Operating Temperature, All Package Types
–55
+125
_C
ns
A
t , t
r
Input Rise and Fall Time
(Figure 1)
V
CC
V
CC
V
CC
= 2.0 V
= 4.5 V
= 6.0 V
0
0
0
1000
500
400
f
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
http://onsemi.com
2
MC74HC157A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
V
CC
–55 to
V
25_C
Symbol
Parameter
Test Conditions
= V – 0.1 V
|I | v 20 mA
v 85_C
v 125_C
Unit
V
IH
Minimum High−Level Input
Voltage
V
2.0
3.0
4.5
6.0
1.5
2.1
1.5
2.1
1.5
2.1
V
out
CC
out
3.15
4.2
3.15
4.2
3.15
4.2
V
Maximum Low−Level Input
Voltage
V
= 0.1 V
2.0
3.0
4.5
6.0
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
V
V
IL
out
|I | v 20 mA
out
V
OH
Minimum High−Level Output
Voltage
V
in
= V
IH
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
|I | v 20 mA
out
V
= V
|I | v 2.4 mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.2
3.7
5.2
in
IH
IL
out
|I | v 6.0 mA
out
|I | v 7.8 mA
out
V
OL
Maximum Low−Level Output
Voltage
V
in
= V
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
|I | v 20 mA
out
V
= V
|I | v 2.4 mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.4
0.4
0.4
in
IL
out
|I | v 6.0 mA
out
|I | v 7.8 mA
out
I
Maximum Input Leakage Current
V
in
= V or GND
6.0
6.0
0.1
0.5
1.0
5.0
1.0
10
mA
mA
in
CC
I
Maximum Three−State Leakage Output in High−Impedance State
OZ
Current
V = V or V
in IL IH
V
out
= V or GND
CC
I
Maximum Quiescent Supply
Current (per Package)
V
= V or GND
= 0 mA
6.0
4.0
40
160
mA
CC
in
CC
I
out
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6.0 ns)
L
r
f
Guaranteed Limit
–55 to
V
CC
25_C
105
65
21
18
V
v 85_C
v 125_C
Symbol
Parameter
Unit
t
t
t
t
,
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 4)
2.0
3.0
4.5
6.0
130
85
160
115
32
ns
PLH
t
PHL
26
22
27
,
Maximum Propagation Delay, Select to Output Y
(Figures 2 and 4)
2.0
3.0
4.5
6.0
110
70
22
140
90
28
165
115
33
ns
ns
ns
PLH
t
PHL
19
24
28
,
Maximum Propagation Delay, Output Enable to Output Y
(Figures 3 and 4)
2.0
3.0
4.5
6.0
100
60
20
125
80
25
150
110
30
PLH
t
PHL
17
21
26
,
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
16
110
36
22
TLH
t
THL
19
C
Maximum Input Capacitance
−
10
10
10
pF
pF
in
Typical @ 25°C, V = 5.0 V
CC
33
C
Power Dissipation Capacitance (Per Package)*
PD
2
* Used to determine the no−load dynamic power consumption: P = C
V
f + I
V
.
D
PD CC
CC CC
http://onsemi.com
3
MC74HC157A
PIN DESCRIPTIONS
INPUTS
The data present on these pins is in its noninverted form. For
the Output Enable input at a high level, the outputs are at a
low level.
A0, A1, A2, A3 (Pins 2, 5, 11, 14)
Nibble A inputs. The data present on these pins is
transferred to the outputs when the Select input is at a low
level and the Output Enable input is at a low level. The data
is presented to the outputs in noninverted form.
CONTROL INPUTS
Select (Pin 1)
Nibble select. This input determines the data word to be
transferred to the outputs. A low level on this input selects
the A inputs and a high level selects the B inputs.
B0, B1, B2, B3 (Pins 3, 6, 10, 13)
Nibble B inputs. The data present on these pins is
transferred to the outputs when the Select input is at a high
level and the Output Enable input is at a low level. The data
is presented to the outputs in noninverted form.
Output Enable (Pin 15)
Output Enable input. A low level on this input allows the
selected input data to be presented at the outputs. A high
level on this input sets all outputs to a low level.
OUTPUTS
Y0, Y1, Y2, Y3 (Pins 4, 7, 9, 12)
Data outputs. The selected input Nibble is presented at
these outputs when the Output Enable input is at a low level.
SWITCHING WAVEFORMS
t
r
t
f
t
r
t
f
V
V
CC
CC
90%
50%
10%
90%
50%
10%
SELECT
INPUT A OR B
GND
GND
t
t
t
PLH
PHL
t
PHL
PLH
90%
50%
10%
90%
50%
10%
OUTPUT Y
OUTPUT Y
t
t
THL
TLH
t
t
THL
TLH
Figure 2. HC157A
Figure 3. Y versus Selected, Noninverted
t
r
t
f
V
CC
90%
50%
10%
OUTPUT
GND
ENABLE
t
t
PLH
PHL
90%
50%
10%
OUTPUT Y
t
t
TLH
THL
Figure 4. HC157A
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
C *
L
*Includes all probe and jig capacitance
Figure 5. Test Circuit
http://onsemi.com
4
MC74HC157A
EXPANDED LOGIC DIAGRAM
2
3
A0
B0
A1
B1
4
7
Y0
5
6
Y1
Y2
NIBBLE
11
10
14
13
DATA
OUTPUTS
A2
B2
A3
B3
OUTPUTS
9
12
Y3
15
1
OUTPUT ENABLE
SELECT
ORDERING INFORMATION
†
Device
MC74HC157ADG
Package
Shipping
SOIC−16
(Pb−Free)
48 Units / Rail
MC74HC157ADR2G
MC74HC157ADTR2G
NLV74HC157ADR2G*
NLV74HC157ADTR2G*
SOIC−16
(Pb−Free)
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−16
(Pb−Free)
SOIC−16
(Pb−Free)
TSSOP−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable
http://onsemi.com
5
MC74HC157A
PACKAGE DIMENSIONS
TSSOP−16
CASE 948F
ISSUE B
16X KREF
NOTES:
1. DIMENSIONING AND TOLERANCING PER
M
S
S
0.10 (0.004)
T
U
V
ANSI Y14.5M, 1982.
S
U
0.15 (0.006) T
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
K
K1
16
9
2X L/2
J1
SECTION N−N
B
−U−
L
J
PIN 1
IDENT.
N
8
0.25 (0.010)
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
M
S
0.15 (0.006) T
U
A
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
N
−V−
A
B
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
F
C
1.20
−−− 0.047
DETAIL E
D
F
0.15 0.002 0.006
0.75 0.020 0.030
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
−W−
0.18
0.09
0.09
0.19
0.19
0.28 0.007 0.011
C
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.10 (0.004)
H
DETAIL E
SEATING
PLANE
−T−
6.40 BSC
0.252 BSC
D
G
M
0
8
0
8
_
_
_
_
SOLDERING FOOTPRINT
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
MC74HC157A
PACKAGE DIMENSIONS
SOIC−16
CASE 751B−05
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
16
9
8
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
MILLIMETERS
INCHES
MIN
0.386
DIM MIN
MAX
MAX
0.393
0.157
0.068
0.019
0.049
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00
G
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
F
R X 45
K
_
G
J
1.27 BSC
0.050 BSC
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
K
M
P
R
C
7
0
_
_
_
_
−T−
SEATING
PLANE
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
J
M
D
16 PL
M
S
S
A
0.25 (0.010)
T
B
SOLDERING FOOTPRINT*
8X
6.40
16X
1.12
1
16
16X
0.58
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
MC74HC157A/D
相关型号：
©2020 ICPDF网 联系我们和版权申明