NMLU1210 [ONSEMI]
Full Bridge Rectifier; 全桥整流器
| 型号： | NMLU1210 |
| 厂家： | 
ONSEMI |
| 描述： | Full Bridge Rectifier |
| 文件： | 总6页 (文件大小：152K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NMLU1210
Full Bridge Rectifier
Dual 20 V N−Channel with dual 3.2 A Schottky Barrier Diode, 4.0 x
4.0 x 0.5 mm mCool™ Package
Features
• Full−Bridge Rectifier Block
• Up to 3.2 A operation
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MOSFET
• Low R
) MOSFET to minimize conduction loss
DS(on
V
R
TYP
I MAX
D
• Low gate charge MOSFET
• Low VF Schottky diode
• Ultra Low Inductance Package
• This Device uses Halogen−Free Molding Compound
• These are Pb−Free Devices
(BR)DSS
DS(on)
23 mW @ 4.5 V
20 V
3.2 A
17 mW @ 10 V
SCHOTTKY DIODE
V
MAX
V TYP
F
I MAX
F
R
20 V
0.45 V
3.2 A
Applications
• Wireless Charging
• AC−DC Rectification
• Optimized for Power Management Applications for Portable
Products, such as Cell Phones, PMP, DSC, GPS, and others
RECTIFIER MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Symbol
Value
Unit
V
Input voltage between two MOSFET drain
V
LL
20
RECTIFIER
Bridge Operating Junction and Storage
Temperature
T , T
−55 to
125
°C
4.0 4.0 mm mCool Pin Connections
J
STG
(Top View)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
T
L
260
°C
MARKING DIAGRAM
1210
AYWWG
G
UDFN
CASE 517BS
Continuous Drain Current
I
2.2
1.16
1.2
A
T = 25°C
O
A
R_JA (Note 1)
T = 85°C
A
Power Dissipation
R_JA (Note 1)
P
I
W
A
T = 25°C
A
D
1210
A
Y
WW
G
= Specific Device Code
= Assembly Location
= Year
T = 85°C
A
0.47
3.2
Continuous Drain Current
R_JA t < 5 s (Note 1)
T = 25°C
A
O
= Work Week
T = 85°C
A
1.88
2.34
0.94
1.16
0.6
= Pb−Free Package
(*Note: Microdot may be in either location)
Power Dissipation
R_JA t < 5 s (Note 1)
P
I
W
A
T = 25°C
A
D
PIN CONNECTIONS
T = 85°C
A
Continuous Drain Current
R_JA (Note 2)
T = 25°C
A
O
Vout
Vout
L1_1
Vout
L1_2
GND2
GND2
T = 85°C
A
GND1
GND1
Power Dissipation
R_JA (Note 2)
P
0.47
0.185
W
T = 25°C
A
D
T = 85°C
A
(Top View)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
ORDERING INFORMATION
†
Device
Package
Shipping
UDFN
(Pb−Free)
NMLU1210TWG
3000 / Tape & Reel
2. Surface−mounted on FR4 board using the minimum recommended pad size
2
of 30 mm , 2 oz. Cu.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
December, 2011 − Rev. 0
NMLU1210/D
NMLU1210
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
82.5
42.5
209
Unit
Junction−to−Ambient – Steady State (Note 3)
Junction−to−Ambient – t ≤ 5 s (Note 3)
R
°C/W
θJA
R
θJA
Junction−to−Ambient – Steady State min Pad (Note 4)
R
θJA
3. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
2
4. Surface−mounted on FR4 board using the minimum recommended pad size of 30 mm , 2 oz. Cu.
BRIDGE ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
ON CHARACTERISTICS
Rectifying Forward Voltage (Note 5)
V
Input voltage V
=
5 V;
0.45
31
.56
V
fd2
LL
The output current of Rectifier I = 2 A
out
Rectifier leakage current
I
Input voltage V = 16 V;
1000
1000
uA
uA
leak
LL
No Load on the Rectifier output
Rectifier Reverse leakage current
I
Input voltage V = 0 V;
21
rleak
LL
The output voltage of the Rectifier
V
out
= 5 V
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
MOSFET ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
ON CHARACTERISTICS
Gate Threshold Voltage
Symbol
Test Condition
Min
Typ
Max
Unit
V
V
= VDS, I = 250 mA
1.2
2.2
V
GS(TH)
GS
D
Negative Threshold Temperature
Coefficient
V
/
GS(TH)
4
mV/°C
T
J
V
= 10 V, I = 3.2 A
17
23
26
32
GS
D
Drain−to−Source On Resistance
(Note 6)
R
mW
DS(on)
V
GS
= 4.5 V, I = 3.2 A
D
Forward Transconductance
g
FS
VDS = 10 V, I = 2.0 A
3.5
S
D
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage (Note 6)
V
SD
V
GS
= 0 V, I = 2.0 A
T = 25°C
0.79
0.65
V
S
J
T = 125°C
J
6. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
SCHOTTKY DIODE ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
I = 1.0 A
Min
Typ
0.36
0.41
0.04
Max
Unit
Maximum Instantaneous Forward
Voltage (Note 7)
V
F
V
F
I = 2.0 A
F
Maximum Instantaneous Reverse
Current
I
R
V
R
= 20 V
mA
7. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
SCHOTTKY DIODE ELECTRICAL CHARACTERISTICS (T = 100°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
I = 1.0 A
Min
Typ
0.29
0.36
4
Max
Unit
Maximum Instantaneous Forward
Voltage (Note 8)
V
F
V
F
I = 2.0 A
F
Maximum Instantaneous Reverse
Current
I
R
V
R
= 20 V
mA
8. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
9. For detailed MOSFET and Diode parameters, please refer to the ON Semiconductor datasheets of NTTFS4930N and MBR230LSFT1G.
The test on each individual die is limited to the system package.
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2
NMLU1210
Figure 1. Typical Application Circuit
GND1 and GND2 are not internally connected. The user should make the connection in the PCB design.
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3
NMLU1210
TYPICAL PERFORMANCE CURVES
(T = 25°C unless otherwise specified)
J
10
10
−55°C
125°C
25°C
1
1
125°C
25°C
−55°C
0.2 0.4 0.6
0.1
0.1
0
0.8
1.0 1.2 1.4
1.6 1.8
0
0.2 0.4 0.6
0.8
1.0 1.2 1.4
1.6 1.8
V , INSTANTANEOUS FORWARD VOLTAGE (V)
F
V , INSTANTANEOUS FORWARD VOLTAGE (V)
F
Figure 2. Bridge Typical Forward Voltage Drop
Figure 3. Bridge Maximum Forward Voltage
at Vin . 5 V
Drop at Vin . 5 V
1k
100
10
10k
1k
Maximum
Typical
100
10
Maximum
Typical
1
1
0.1
0.1
0.01
0.01
25
35 45
55
65 75
85 95 105 115 125
25
35 45
55
65 75
85 95 105 115 125
T , TEMPERATURE JUNCTION (°C)
J
T , TEMPERATURE JUNCTION (°C)
J
Figure 5. Input Leakage at 16 V vs. Junction
Temperature
Figure 4. Output Leakage at 5 V Bias vs.
Junction Temperature
700
40
I
= 2 A
D
I
= 2 A
D
600
500
400
300
200
100
0
T = 25°C
J
T = 25°C
J
35
30
25
20
15
2.0
3.0
4.0
5.0
6.0
(V)
7.0
8.0
9.0
10
2.0
3.0
V
4.0
5.0
6.0
7.0
8.0
9.0
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
GS
Figure 6. FET Typical On−Resistance vs.
Gate−to−Source Voltage ( from 3 V to 10 V)
Figure 7. FET Typical On−Resistance vs.
Gate−to−Source Voltage
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4
NMLU1210
TYPICAL PERFORMANCE CURVES
(T = 25°C unless otherwise specified)
J
10
100
10
125°C
1.0
0.1
1
125°C
25°C
25°C
0.01
−55°C
0.1
0.001
0
0.1 0.2 0.3
0.4
0.5 0.6 0.7
0.8 0.9
0
5
10
15
20
25
V , INSTANTANEOUS FORWARD VOLTAGE (V)
F
V , INSTANTANEOUS REVERSE VOLTAGE (V)
R
Figure 8. Schottky Typical Forward Current vs.
Forward Voltage
Figure 9. Schottky Typical Reverse Current vs.
Reverse Voltage
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5
NMLU1210
PACKAGE DIMENSIONS
UDFN8 4x4, 0.8P
CASE 517BS
ISSUE A
NOTES:
A
B
D
L
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
L3
L3
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. POSITIONAL TOLERANCE APPLIES TO ALL
OF THE EXPOSED PADS.
L1
L
PIN ONE
E
REFERENCE
DETAIL A
ALTERNATE
0.15
C
CONSTRUCTIONS
MILLIMETERS
DIM MIN
0.45
A1 0.00
MAX
0.55
0.05
0.15
C
TOP VIEW
A3
A
EXPOSED Cu
MOLD CMPD
A3
b
D
0.13 REF
DETAIL B
A
0.20
0.30
0.10
0.08
C
C
4.00 BSC
D2 2.10
D3 0.90
2.30
1.10
A1
(A3)
E
4.00 BSC
DETAIL B
E2 2.50
E3 1.00
2.70
1.20
NOTE 4
A1
ALTERNATE
SEATING
PLANE
C
CONSTRUCTIONS
SIDE VIEW
e
F
L
0.80 BSC
3.55 BSC
0.30
0.50
0.15
0.23
M
0.10
C A B
D3
L1 0.00
L3 0.13
NOTE 5
D2
DETAIL A
F/2
RECOMMENDED
SOLDERING FOOTPRINT*
1
8
4
2X
E3
M
0.10
C A B
4X
0.35
NOTE 5
6X
0.60
E2
2.34
5
PACKAGE
OUTLINE
8X b
e
M
0.10
0.05
C
C
A B
2.74
1.14
4.15
e/2
M
NOTE 3
F
2X
1.24
0.80
BOTTOM VIEW
1
0.40
0.80
DETAIL C
3.69
2X
1.15
DIMENSIONS: MILLIMETERS
DETAIL C
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NMLU1210/D
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