NS5A4684S [ONSEMI]
Ultra-Low Resistance Dual SPDT Analog Switch;型号: | NS5A4684S |
厂家: | ONSEMI |
描述: | Ultra-Low Resistance Dual SPDT Analog Switch 光电二极管 |
文件: | 总8页 (文件大小:139K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NS5A4684S
Ultra-Low Resistance
Dual SPDT Analog Switch
The NS5A4684S is an advanced CMOS analog switch fabricated in
Sub−micron silicon gate CMOS technology. The device is a dual
Independent Single Pole Double Throw (SPDT) switch featuring
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MARKING
Ultra−Low R of 0.6 ꢀ.
ON
The part also features guaranteed Break Before Make (BBM)
switching, assuring the switches never short the driver.
DIAGRAM
Features
• Ultra−Low R of 0.6 ꢀ Max
AGMG
WQFN10
CASE 488AQ
ON
G
• Interfaces with 2.8 V Chipset
1
• Single Supply Operation from 1.65−5.5 V
AG
M
G
= Specific Device Code
= Date Code/Assembly Location
= Pb−Free Device
• Full 0−V Signal Handling Capability
CC
• High Isolation; −68 dB at 100 kHz
• Low Standby Current, t50 nA
• Low Distortion; < 0.08% THD
• Low Crosstalk; < −70 dB at 100 kHz
(Note: Microdot may be in either location)
GND
6
NC2
7
• High Continuous Current Capability
$300 mA Through Each Switch
• Large Current Clamping Diodes at Analog Inputs
$300 mA Continuous Current Capability
• Package:
IN2
8
5
NC1
COM2
NO2
9
4
3
IN1
♦ 1.4 x 1.8 x 0.75 mm WQFN10 Package
• This is a Pb−Free Device
10
COM1
Applications
1
2
• Cell Phone Audio Block
• Speaker and Earphone Switching
• Ring−Tone Chip / Amplifier Switching
• Modems
V
CC
NO1
FUNCTION TABLE
NO 1, 2
IN 1, 2
NC 1, 2
0
1
OFF
ON
ON
OFF
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
©
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
March, 2013 − Rev. 1
NS5A4684S/D
NS5A4684S
COM
NO
NC
IN
Figure 1. Logic Equivalent Circuit
PIN DESCRIPTION
QFN PIN #
Symbol
Name and Function
2, 5, 7, 10
NC1 to NC2, NO1 to NO2
IN1 and IN2
Independent Channels
Controls
4, 8
3, 9
6
COM1 and COM2
GND
Common Channels
Ground (V)
1
V
CC
Positive Supply Voltage
MAXIMUM RATINGS
Symbol
Parameter
Value
−0.5 to +6.5
−0.5 v V v V + 0.5
Unit
V
V
V
V
Positive DC Supply Voltage
CC
IS
Analog Input Voltage (V , V , or V
)
V
NO NC
COM
IS
CC
Digital Select Input Voltage
−0.5 v V v +5.5
V
IN
IN
I
I
I
Continuous DC Current from COM to NC/NO
Peak Current from COM to NC/NO, 10 Duty Cycle (Note 1)
Continuous DC Current into COM/NO/NC with Respect to V or GND
300
500
100
mA
mA
mA
anl1
anl−pk1
clmp
CC
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Defined as 10% ON, 90% OFF Duty Cycle.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
1.65
GND
GND
−40
Max
5.5
Unit
V
V
V
V
DC Supply Voltage
CC
IN
Digital Select Input Voltage (OVT) Overvoltage Tolerance
Analog Input Voltage (NC, NO, COM)
5.5
V
V
CC
V
IS
T
A
Operating Temperature Range
+85
°C
ns/V
t , t
Input Rise or Fall Time, SELECT
V
CC
V
CC
= 1.6 V − 2.7 V
= 3.0 V − 5.0 V
20
10
r
f
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2
NS5A4684S
DC CHARACTERISTICS − DIGITAL SECTION (Voltages Referenced to GND)
Guaranteed Limit
25°C
−40°C to +85°C
Symbol
Parameter
Condition
V
CC
Unit
V
IH
Minimum High−Level Input Voltage, Select
Inputs
3.0
5.0
1.4
2.4
1.4
2.4
V
V
IL
Maximum Low−Level Input Voltage, Select
Inputs
3.0
5.0
0.7
0.8
0.7
0.8
V
I
Maximum Input Leakage Current, Select
Inputs
V
V
= V or GND
5.0
0.1
1.0
ꢁ
A
IN
IN
CC
I
I
Power Off Leakage Current
= V or GND
0
0.5
1.0
2.0
2.0
ꢁ A
ꢁ A
OFF
IN
CC
Maximum Quiescent Supply Current
(Note 2)
Select and V = V or GND
1.65 to 5.0
CC
IS
CC
2. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
DC ELECTRICAL CHARACTERISTICS − ANALOG SECTION
Guaranteed Maximum Limit
25°C −40°C to +85°C
Min
Max
Min
Max
Symbol
Parameter
Condition
= V or V = V
IH
V
Unit
CC
R
ON
NC/NO On−Resistance
V
V
3.0
4.3
5.0
0.55
0.45
0.4
0.6
0.5
0.5
ꢀ
IN
IS
IL
IN
(Note 3)
= GND to V
CC
I
= 100 mA
= 100 mA
COM
R
FLAT
NC/NO On−Resistance Flatness
I
3.0
4.3
5.0
0.16
0.11
0.11
0.20
0.14
0.14
ꢀ
ꢀ
COM
(Notes 3 and 4)
V
IS
= 0 to V
CC
ꢂ
R
On−Resistance Match Between Channels
V
= 1.5 V;
3.0
4.3
5.0
0.10
0.10
0.10
0.11
0.11
0.11
ON
IS
(Notes 3 and 5)
I
= 100 mA
= 2.2 V;
COM
V
IS
I
= 100 mA
COM
I
I
NC or NO Off Leakage Current (Note 3)
V
V
V
= V or V
IH
5.0
5.0
−5.0
−10
5.0
10
−50
50
nA
nA
NC(OFF)
IN
IL
or V = 0.3 V
NO
COM
NC
= 4.0 V
NO(OFF)
I
COM ON
Leakage Current
(Note 3)
V
V
V
V
V
V
= V or V
IH
−100
100
COM(ON)
IN
IL
0.3 V or 4.0 V with
floating or
NO
NC
NC
NO
COM
0.3 V or 4.0 V with
floating
= 0.3 V or 4.0 V
3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
4. Flatness is defined as the difference between the maximum and minimum value of On−resistance as measured over the specified analog
signal ranges.
5. ꢂ R
R
− R
between NC1 and NC2 or between NO1 and NO2.
ON = ON(MAX)
ON(MIN)
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3
NS5A4684S
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns)
r
f
Guaranteed Maximum Limit
25°C −40°C to +85°C
(V) Min Typ* Max
V
(V)
V
IS
CC
Min
Max
Symbol
Parameter
Turn−On Time
Test Conditions
R = 50 ꢀ, C = 35 pF
Unit
t
t
t
2.3 − 5.0 1.5
50
60
ns
ON
L
L
(Figures 3 and 4)
Turn−Off Time
R = 50 ꢀ, C = 35 pF
2.3 − 5.0 1.5
30
40
ns
ns
OFF
BBM
L
L
(Figures 3 and 4)
V = 3.0
IS
Minimum Break−Before−Make
Time
R = 50 ꢀ, C = 35 pF
3.0
1.5
2
15
L
L
(Figure 2)
Typical @ 25, V = 3.6 V
CC
C
C
C
Control Pin Input Capacitance
NO, NC Port Capacitance
3.5
60
pF
pF
pF
IN
NO/NC
COM
COM Port Capacitance When Switch is Enabled
200
*Typical Characteristics are at 25°C.
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
25°C
V
CC
(V)
Typical
Symbol
Parameter
Condition
centered between V and GND
Unit
BW
Maximum On−Channel −3 dB
Bandwidth or Minimum
Frequency Response
V
1.65 − 5.0
19
MHz
IN
CC
(Figure 5)
V
V
Maximum Feed−through On Loss
V
V
= 0 dBm @ 100 kHz to 50 MHz
1.65 − 5.0
1.65 − 5.0
1.65 − 5.0
3.0
−0.06
−68
38
dB
dB
pC
%
ONL
IN
IN
centered between V and GND (Figure 5)
CC
Off−Channel Isolation
f = 100 kHz; V = 1 V RMS; C = 5.0 pF
ISO
IS
L
V
IN
centered between V and GND (Figure 5)
CC
Q
Charge Injection Select Input to
Common I/O
V
V
L
GND, R = 0 ꢀ, C = 1.0 nF
OUT
IN = CC to
IS
L
Q = C x DV
(Figure 6)
THD
VCT
Total Harmonic Distortion
THD + Noise
F
= 20 Hz to 20 kHz, R = R
= 600 ꢀ, C = 50 pF
0.08
−70
IS
IS
L
gen
L
V
= 2.0 V RMS
Channel−to−Channel Crosstalk
f = 100 kHz; V = 1.0 V RMS, C = 5.0 pF, R = 50 ꢀ
1.65 − 5.0
dB
IS
L
L
V
IN
centered between V and GND (Figure 5)
CC
6. Off−Channel Isolation = 20log10 (V
/V ), V
= output, V = input to off switch.
COM NO
COM
NO
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4
NS5A4684S
V
CC
DUT
Input
GND
V
Output
CC
V
OUT
0.1 ꢁ F
t
BMM
50 ꢀ
35 pF
90%
90% of V
OH
Output
Switch Select Pin
GND
Figure 2. tBBM (Time Break−Before−Make)
V
CC
Input
50%
50%
90%
DUT
0 V
V
CC
Output
V
OUT
V
0.1 ꢁ F
OH
Open
90%
50 ꢀ
35 pF
Output
V
OL
Input
t
t
OFF
ON
Figure 3. tON/tOFF
V
CC
V
CC
Input
50%
50%
DUT
0 V
50 ꢀ
Output
V
OUT
V
OH
Open
35 pF
Output
V
10%
10%
OL
Input
t
t
ON
OFF
Figure 4. tON/tOFF
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5
NS5A4684S
50 ꢀ
DUT
Reference
Input
50 ꢀ Generator
Transmitted
Output
50 ꢀ
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.
ISO
ONL
V
OUT
= Off Channel Isolation = 20 Logǒ Ǔfor V
V
V
at 100 kHz
IN
ISO
V
IN
OUT
V
= On Channel Loss = 20 Logǒ Ǔfor V
at 100 kHz to 50 MHz
ONL
IN
V
IN
Bandwidth (BW) = the frequency 3 dB below V
ONL
V
CT
= Use V
setup and test to all other switch analog input/outputs terminated with 50 ꢀ
ISO
Figure 5. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
V
CC
V
IN
Open
Output
GND
C
L
Output
Off
ꢂ V
OUT
Off
On
V
IN
Figure 6. Charge Injection: (Q)
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6
NS5A4684S
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
0
−3
−6
−9
−12
−15
−18
0.01
0.1
1
10
100
0.01
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 7. Cross Talk vs. Frequency
@ VCC = 4.3 V
Figure 8. Bandwidth vs. Frequency
0.12
0.1
0.08
0.06
0.04
0.02
0
10
100
1000
FREQUENCY (Hz)
10000
100000
Figure 9. Total Harmonic Distortion
ORDERING INFORMATION
Device
†
Package
Shipping
NS5A4684SMNTAG
WQFN10
3000 / Tape & Reel
3000 / Tape & Reel
(Pb−Free)
NS5A4684SMNTBG
WQFN10
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
NS5A4684S
PACKAGE DIMENSIONS
WQFN10, 1.4x1.8, 0.4P
CASE 488AQ
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
EDGE OF PACKAGE
D
A
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
M1
E
PIN 1 REFERENCE
5. EXPOSED PADS CONNECTED TO DIE FLAG.
USED AS TEST CONTACTS.
DETAIL A
0.15
0.15
C
Bottom View
2X
MILLIMETERS
(Optional)
DIM MIN
MAX
0.80
A
A1
A3
b
0.70
0.00
C
2X
0.050
B
MOLD CMPD
EXPOSED Cu
0.20 REF
0.15
0.25
A
D
1.40 BSC
0.10
0.08
C
E
1.80 BSC
0.40 BSC
A3
e
L
0.30
0.50
0.60
0.05
C
0.40
0.00
L1
M1
A1
A1
DETAIL B
Side View
(Optional)
SEATING
PLANE
A3
C
5
3
e/2
e
MOUNTING FOOTPRINT
9 X L
6
1.700
9 X
0.563
0.0669
1
0.0221
0.663
0.0261
10
L1
0.200
0.0079
10 X
0.10 C A B
0.05 C
b
1
NOTE 3
2.100
0.0827
0.400
0.0157
PITCH
10 X
0.225
0.0089
mm
inches
ǒ
Ǔ
SCALE 20:1
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
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NS5A4684S/D
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