NSBC115TF3T5G [ONSEMI]
Digital Transistors (BRT);
| 型号： | NSBC115TF3T5G |
| 厂家： | 
ONSEMI |
| 描述： | Digital Transistors (BRT) |
| 文件： | 总11页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MUN2241, MMUN2241L,
MUN5241, DTC115TE,
DTC115TM3, NSBC115TF3
Digital Transistors (BRT)
R1 = 100 kW, R2 = 8 kW
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NPN Transistors with Monolithic Bias
Resistor Network
PIN CONNECTIONS
PIN 3
COLLECTOR
(OUTPUT)
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a base−
emitter resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space.
PIN 1
BASE
(INPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
Features
MARKING DIAGRAMS
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC-Q101 Qualified
and PPAP Capable
SC−59
CASE 318D
STYLE 1
XX MG
G
1
SOT−23
CASE 318
STYLE 6
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
XXX MG
Compliant
G
1
MAXIMUM RATINGS (T = 25°C)
A
Rating
Symbol
Max
Unit
SC−70/SOT−323
CASE 419
XX MG
Collector−Base Voltage
V
50
Vdc
CBO
CEO
G
STYLE 3
Collector−Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
V
50
100
40
6
Vdc
mAdc
Vdc
1
I
C
SC−75
CASE 463
STYLE 1
XX M
XX M
V
IN(fwd)
Input Reverse Voltage
V
IN(rev)
Vdc
1
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
SOT−723
CASE 631AA
STYLE 1
1
SOT−1123
CASE 524AA
STYLE 1
X M
1
XXX
M
G
=
=
=
Specific Device Code
Date Code*
Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending up-
on manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
November, 2016 − Rev. 2
DTC115T/D
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
Table 1. ORDERING INFORMATION
†
Device
Part Marking
Package
Shipping
MUN2241T1G
8U
SC−59
(Pb−Free)
3000 / Tape & Reel
MMUN2241LT1G
MUN5241T1G
A8U
AW
SOT−23
(Pb−Free)
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
8000 / Tape & Reel
8000 / Tape & Reel
SC−70/SOT−323
(Pb−Free)
DTC115TET1G
DTC115TM3T5G
NSBC115TF3T5G
7V
SC−75
(Pb−Free)
7D
SOT−723
(Pb−Free)
P (90°)*
SOT−1123
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
* (xx°) = Degree rotation in the clockwise direction.
300
250
(1) SC−75 and SC−70/SOT323; Minimum Pad
200
(2) SC−59; Minimum Pad
(1) (2) (3) (4) (5)
(3) SOT−23; Minimum Pad
(4) SOT−1123; 100 mm , 1 oz. copper trace
(5) SOT−723; Minimum Pad
2
150
100
50
0
−50 −25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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2
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
Table 2. THERMAL CHARACTERISTICS
Characteristic
THERMAL CHARACTERISTICS (SC−59) (MUN2241)
Total Device Dissipation
Symbol
Max
Unit
P
D
T = 25°C
A
(Note 1)
(Note 2)
(Note 1)
(Note 2)
230
338
1.8
2.7
mW
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
540
370
°C/W
°C/W
°C
q
JA
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
R
264
287
q
JL
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
THERMAL CHARACTERISTICS (SOT−23) (MMUN2241L)
Total Device Dissipation
T = 25°C
A
P
D
(Note 1)
(Note 2)
(Note 1)
(Note 2)
246
400
2.0
3.2
mW
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
R
508
311
°C/W
°C/W
°C
q
JA
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
174
208
q
JL
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
THERMAL CHARACTERISTICS (SC−70/SOT−323) (MUN5241)
Total Device Dissipation
T = 25°C
A
P
D
(Note 1)
(Note 2)
(Note 1)
(Note 2)
202
310
1.6
2.5
mW
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
R
618
403
°C/W
°C/W
°C
q
JA
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
280
332
q
JL
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
THERMAL CHARACTERISTICS (SC−75) (DTC115TE)
Total Device Dissipation
T = 25°C
A
P
D
(Note 1)
(Note 2)
(Note 1)
(Note 2)
200
300
1.6
2.4
mW
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
600
400
°C/W
°C
q
JA
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SOT−723) (DTC115TM3)
Total Device Dissipation
T , T
J
−55 to +150
stg
P
D
T = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
260
600
2.0
4.8
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
480
205
°C/W
°C
q
JA
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 Inch Pad.
2
3. FR−4 @ 100 mm , 1 oz. copper traces, still air.
2
4. FR−4 @ 500 mm , 1 oz. copper traces, still air.
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3
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
Table 2. THERMAL CHARACTERISTICS
Characteristic
THERMAL CHARACTERISTICS (SOT−1123) (NSBC115TF3)
Total Device Dissipation
Symbol
Max
Unit
P
D
T = 25°C
A
(Note 3)
(Note 4)
(Note 3)
(Note 4)
254
297
2.0
2.4
mW
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 3)
(Note 4)
R
493
421
°C/W
q
JA
Thermal Resistance, Junction to Lead
(Note 3)
R
193
°C/W
°C
q
JL
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 Inch Pad.
2
3. FR−4 @ 100 mm , 1 oz. copper traces, still air.
2
4. FR−4 @ 500 mm , 1 oz. copper traces, still air.
Table 3. ELECTRICAL CHARACTERISTICS (T = 25°C, unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
I
I
nAdc
nAdc
mAdc
Vdc
CBO
(V = 50 V, I = 0)
−
−
−
−
−
−
−
100
500
0.1
−
CB
E
Collector−Emitter Cutoff Current
(V = 50 V, I = 0)
CEO
CE
B
Emitter−Base Cutoff Current
(V = 6.0 V, I = 0)
I
EBO
−
EB
C
Collector−Base Breakdown Voltage
(I = 10 mA, I = 0)
V
V
(BR)CBO
(BR)CEO
50
50
C
E
Collector−Emitter Breakdown Voltage (Note 5)
(I = 2.0 mA, I = 0)
Vdc
−
C
B
ON CHARACTERISTICS
DC Current Gain (Note 5)
h
FE
(I = 5.0 mA, V = 10 V)
160
−
350
−
−
0.25
0.5
−
C
CE
Collector−Emitter Saturation Voltage (Note 5)
(I = 10 mA, I = 5.0 mA)
V
Vdc
Vdc
Vdc
Vdc
Vdc
kW
CE(sat)
C
B
Input Voltage (off)
(V = 5.0 V, I = 100 mA)
V
V
i(off)
−
0.6
1.0
−
CE
C
Input Voltage (on)
(V = 0.3 V, I = 1.0 mA)
i(on)
1.5
−
CE
C
Output Voltage (on)
(V = 5.0 V, V = 5.0 V, R = 1.0 kW)
V
OL
0.2
CC
B
L
Output Voltage (off)
V
OH
(V = 5.0 V, V = 0.25 V, R = 1.0 kW)
4.9
70
−
−
100
−
−
130
−
CC
B
L
Input Resistor
Resistor Ratio
R1
R /R
1
2
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
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4
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
TYPICAL CHARACTERISTICS − NSBC115TF3
10
1
1000
I /I = 10
C
B
150°C
25°C
150°C
−55°C
25°C
−55°C
100
0.1
V
CE
= 10 V
0.01
10
0
10
20
30
40
50
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 2. VCE(sat) vs. IC
Figure 3. DC Current Gain
2.4
2.0
100
10
150°C
f = 10 kHz
= 0 A
T = 25°C
A
25°C
I
E
−55°C
1.6
1.2
0.8
1
0.1
0.4
0
V
O
= 5 V
24
0.01
0
10
20
30
40
50
0
4
8
12
16
20
28
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
−55°C
10
25°C
150°C
1
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage vs. Output Current
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5
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
PACKAGE DIMENSIONS
SC−59
CASE 318D−04
ISSUE H
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
MILLIMETERS
INCHES
NOM
3
DIM
A
A1
b
c
D
E
e
L
MIN
1.00
0.01
0.35
0.09
2.70
1.30
1.70
0.20
2.50
NOM
1.15
0.06
0.43
0.14
2.90
1.50
1.90
0.40
2.80
MAX
MIN
MAX
0.051
0.004
0.020
0.007
0.122
0.067
0.083
0.024
0.118
E
1.30
0.10
0.50
0.18
3.10
1.70
2.10
0.60
3.00
0.039
0.001
0.014
0.003
0.106
0.051
0.067
0.008
0.099
0.045
0.002
0.017
0.005
0.114
0.059
0.075
0.016
0.110
H
E
1
2
b
e
H
E
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
C
A
L
A1
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.4
0.094
1.0
0.039
0.8
0.031
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
6
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AR
NOTES:
D
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
0.25
3
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
T
H
E
E
1
2
MILLIMETERS
INCHES
DIM
A
A1
b
c
D
E
e
L
L1
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0°
NOM
1.00
0.06
0.44
0.14
2.90
1.30
1.90
0.43
0.54
2.40
−−−
MAX
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0°
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10°
L
1.11
0.10
0.50
0.20
3.04
1.40
2.04
0.55
0.69
2.64
10°
3X
b
L1
VIEW C
e
TOP VIEW
A
H
E
T
c
A1
STYLE 6:
SEE VIEW C
SIDE VIEW
PIN 1. BASE
2. EMITTER
3. COLLECTOR
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
3X
2.90
0.90
3X
0.95
0.80
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
7
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419−04
ISSUE N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
D
e1
MILLIMETERS
INCHES
DIM
A
A1
A2
b
c
D
E
e
MIN
0.80
0.00
NOM
0.90
0.05
0.70 REF
0.35
0.18
2.10
1.24
1.30
0.65 BSC
MAX
1.00
0.10
MIN
0.032
0.000
NOM
0.035
0.002
0.028 REF
0.014
0.007
0.083
0.049
0.051
0.026 BSC
MAX
0.040
0.004
3
E
H
E
1
2
0.30
0.10
1.80
1.15
1.20
0.40
0.25
2.20
1.35
1.40
0.012
0.004
0.071
0.045
0.047
0.016
0.010
0.087
0.053
0.055
b
e
e1
L
H
E
0.38
2.10
0.015
0.083
0.20
2.00
0.56
2.40
0.008
0.079
0.022
0.095
STYLE 3:
c
PIN 1. BASE
2. EMITTER
3. COLLECTOR
A
A2
0.05 (0.002)
L
A1
SOLDERING FOOTPRINT*
0.65
0.025
0.65
0.025
1.9
0.075
0.9
0.035
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
8
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
PACKAGE DIMENSIONS
SC−75/SOT−416
CASE 463
ISSUE G
NOTES:
−E−
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
2
MILLIMETERS
DIM MIN NOM MAX
0.70
A1 0.00
INCHES
NOM MAX
3
MIN
e
−D−
A
0.80
0.05
0.90 0.027 0.031 0.035
0.10 0.000 0.002 0.004
0.30 0.006 0.008 0.012
0.25 0.004 0.006 0.010
1.65 0.061 0.063 0.065
0.90 0.027 0.031 0.035
0.04 BSC
1
b 3 PL
0.20 (0.008)
b
C
D
E
e
0.15
0.10
1.55
0.70
0.20
0.15
1.60
0.80
1.00 BSC
0.15
1.60
M
D
0.20 (0.008) E
H
E
L
0.10
1.50
0.20 0.004 0.006 0.008
1.70 0.060 0.063 0.067
H
E
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
C
A
L
A1
SOLDERING FOOTPRINT*
0.356
0.014
1.803
0.071
0.787
0.031
0.508
0.020
1.000
0.039
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
9
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
PACKAGE DIMENSIONS
SOT−723
CASE 631AA
ISSUE D
NOTES:
−X−
1. DIMENSIONING AND TOLERANCING PER ASME
D
Y14.5M, 1994.
A
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
b1
−Y−
3
E
HE
1
2
MILLIMETERS
DIM MIN
2X b
3X
C
NOM
0.50
0.21
0.31
0.12
MAX
0.55
0.27
0.37
0.17
1.25
0.85
2X e
0.08 X Y
A
b
b1
C
D
E
0.45
0.15
0.25
0.07
1.15
0.75
SIDE VIEW
TOP VIEW
L
1.20
0.80
1
0.40 BSC
e
H E
L
L2
1.15
0.15
1.20
0.29 REF
0.20
1.25
0.25
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
3X
L2
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
2X
0.40
2X
0.27
PACKAGE
OUTLINE
1.50
3X
0.52
0.36
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
10
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
PACKAGE DIMENSIONS
SOT−1123
CASE 524AA
ISSUE C
NOTES:
−X−
D
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
−Y−
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
1
2
3
E
TOP VIEW
MILLIMETERS
A
DIM MIN
MAX
0.40
0.28
0.20
0.17
0.85
0.65
0.40
1.05
A
b
0.34
0.15
b1 0.10
c
D
E
e
0.07
0.75
0.55
0.35
0.95
H
c
E
H
E
SIDE VIEW
L
0.185 REF
L2 0.05
0.15
STYLE 1:
PIN 1. BASE
b
3X
L2
2. EMITTER
3. COLLECTOR
0.08 X Y
e
3X
L
2X
b1
BOTTOM VIEW
SOLDERING FOOTPRINT*
1.20
3X 0.34
0.26
1
0.38
2X
0.20
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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DTC115T/D
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