NSS40600CF8T1G_07 [ONSEMI]
40 V, 7.0 A, Low VCE(sat) PNP Transistor; 40 V ， 7.0 A，低VCE （ sat）的PNP晶体管
| 型号： | NSS40600CF8T1G_07 |
| 厂家： | 
ONSEMI |
| 描述： | 40 V, 7.0 A, Low VCE(sat) PNP Transistor |
| 文件： | 总5页 (文件大小：107K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NSS40600CF8T1G
40 V, 7.0 A, Low VCE(sat)
PNP Transistor
2
ON Semiconductor’s e PowerEdge family of low V
CE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (V ) and high current gain capability. These
CE(sat)
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
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Typical applications are DC−DC converters and power management
in portable and battery powered products such as cellular and cordless
phones, PDAs, computers, printers, digital cameras and MP3 players.
Other applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
−40 VOLTS, 7.0 AMPS
PNP LOW VCE(sat) TRANSISTOR
EQUIVALENT RDS(on) 45 mW
2
cluster. The high current gain allows e PowerEdge devices to be
COLLECTOR
1, 2, 3, 6, 7, 8
driven directly from PMU’s control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
• This is a Pb−Free Device
4
MAXIMUM RATINGS (T = 25°C)
A
BASE
Rating
Symbol
Max
−40
Unit
Vdc
Vdc
Vdc
Adc
A
5
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
V
CEO
V
CBO
V
EBO
EMITTER
−40
−7.0
−6.0
−7.0
ChipFET]
CASE 1206A
STYLE 4
Collector Current − Continuous
Collector Current − Peak
Electrostatic Discharge
I
C
I
CM
ESD
HBM Class 3B
MM Class C
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic
VA M
G
Symbol
Max
Unit
Total Device Dissipation, T = 25°C
P
(Note 1)
830
6.7
mW
mW/°C
A
D
Derate above 25°C
VA = Specific Device Code
M = Month Code
Thermal Resistance,
Junction−to−Ambient
R
(Note 1)
150
°C/W
q
JA
G
= Pb−Free Package
Total Device Dissipation, T = 25°C
P
(Note 2)
(Note 2)
1.4
11.1
W
mW/°C
A
D
Derate above 25°C
PIN CONNECTIONS
Thermal Resistance,
Junction−to−Ambient
R
90
°C/W
°C/W
W
q
JA
8
7
6
5
1
2
3
4
C
C
C
E
C
C
C
B
Thermal Resistance,
Junction−to−Lead #1
R
(Note 2)
15
q
JL
Total Device Dissipation
(Single Pulse < 10 sec)
P
2.75
Dsingle
(Notes 2 & 3)
Junction and Storage
Temperature Range
T , T
−55 to
+150
°C
J
stg
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
†
Device
NSS40600CF8T1G
Package
Shipping
2
1. FR−4 @ 100 mm , 1 oz copper traces.
2
2. FR−4 @ 500 mm , 1 oz copper traces.
ChipFET
3000/
Tape & Reel
3. Thermal response.
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
1
Publication Order Number:
March, 2007 − Rev. 1
NSS40600CF8/D
NSS40600CF8T1G
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typical
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Breakdown Voltage
V
Vdc
Vdc
(BR)CEO
(BR)CBO
(BR)EBO
(I = −10 mAdc, I = 0)
−40
−40
−7.0
−
−
−
−
−
−
−
−
C
B
Collector−Base Breakdown Voltage
(I = −0.1 mAdc, I = 0)
V
V
C
E
Emitter−Base Breakdown Voltage
(I = −0.1 mAdc, I = 0)
Vdc
−
E
C
Collector Cutoff Current
(V = −40 Vdc, I = 0)
I
mAdc
mAdc
CBO
−0.1
−0.1
CB
E
Emitter Cutoff Current
I
EBO
(V = −7.0 Vdc)
−
EB
ON CHARACTERISTICS
DC Current Gain (Note 4)
h
FE
(I = −10 mA, I = −2.0 V)
250
250
220
180
150
−
−
300
−
−
−
−
−
−
−
C
C
(I = −500 mA, V = −2.0 V)
C
CE
(I = −1.0 A, V = −2.0 V)
C
CE
(I = −2.0 A, V = −2.0 V)
C
CE
(I = −3.0 A, V = −2.0 V)
C
CE
Collector−Emitter Saturation Voltage (Note 4)
(I = −0.1 A, I = −0.010 A) (Note 5)
V
V
CE(sat)
−
−
−
−
−
−
0.007
0.045
0.080
0.150
0.180
0.160
−0.010
−0.075
−0.110
−0.200
−0.250
−0.220
C
B
(I = −1.0 A, I = −0.100 A)
C
B
(I = −1.0 A, I = −0.010 A)
C
B
(I = −2.0 A, I = −0.020 A)
C
B
(I = −3.0 A, I = −0.030 A)
C
B
(I = −4.0 A, I = −0.400 A)
C
B
Base−Emitter Saturation Voltage (Note 4)
(I = −1.0 A, I = −0.01 A)
V
V
V
BE(sat)
−
−
−
−
−0.90
−0.90
C
B
Base−Emitter Turn−on Voltage (Note 4)
(I = −2.0 A, V = −3.0 V)
V
BE(on)
C
CE
Cutoff Frequency
(I = −100 mA, V = −5.0 V, f = 100 MHz)
f
MHz
T
100
−
−
−
−
−
C
CE
Input Capacitance (V = −0.5 V, f = 1.0 MHz)
Cibo
650
150
pF
pF
EB
Output Capacitance (V = −3.0 V, f = 1.0 MHz)
Cobo
−
CB
SWITCHING CHARACTERISTICS
Delay (V = 30 V, I = 750 mA, I = 15 mA)
t
t
−
−
−
−
−
−
−
−
120
220
650
240
ns
ns
ns
ns
CC
C
B1
d
Rise (V = 30 V, I = 750 mA, I = 15 mA)
t
r
CC
C
B1
Storage (V = 30 V, I = 750 mA, I = 15 mA)
CC
C
B1
s
Fall (V = 30 V, I = 750 mA, I = 15 mA)
t
f
CC
C
B1
4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
5. Guaranteed by design but not tested.
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2
NSS40600CF8T1G
0.25
0.20
0.15
0.10
0.35
I /I = 100
C
B
I /I = 10
C
B
V
= 150°C
CE(sat)
0.30
V
= 150°C
CE(sat)
0.25
0.20
0.15
0.10
25°C
25°C
−55°C
−55°C
0.05
0
0.05
0
0.001
0.01
0.1
1.0
10
0.001
0.01
0.1
1.0
10
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 1. Collector Emitter Saturation Voltage
vs. Collector Current
Figure 2. Collector Emitter Saturation Voltage
vs. Collector Current
750
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
I /I = 10
C
B
150°C (5 V)
650
550
450
350
150°C (2 V)
25°C (5 V)
−55°C
25°C
25°C (2 V)
−55°C (5 V)
−55°C (2 V)
250
150
50
150°C
0.3
0.2
0.001
0.01
0.1
1.0
10
0.001
0.01
0.1
1.0
10
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 3. DC Current Gain vs.
Collector Current
Figure 4. Base Emitter Saturation Voltage vs.
Collector Current
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
1.0
100 mA
I
C
= 500 mA
300 mA
10 mA
V
= −1.0 V
CE
−55°C
25°C
0.8
0.6
150°C
0.4
0.2
0
0.2
0.1
0.001
0.01
0.1
1.0
10
0.01
0.1
1.0
10
100
I , COLLECTOR CURRENT (A)
C
I , BASE CURRENT (mA)
B
Figure 5. Base Emitter Turn−On Voltage vs.
Figure 6. Saturation Region
Collector Current
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3
NSS40600CF8T1G
225
750
700
650
600
550
500
450
400
C
(pF)
obo
C
(pF)
ibo
200
175
150
125
100
75
50
350
300
0
1.0
2.0
3.0
4.0
5.0
6.0
0
5.0
V
10
15
20
25
30
35
V
, EMITTER BASE VOLTAGE (V)
, COLLECTOR BASE VOLTAGE (V)
CB
EB
Figure 7. Input Capacitance
Figure 8. Output Capacitance
10
1.0
1.0 mS
10 mS
0.1
100 mS
1.0 S
Thermal
Limit
0.01
0.01
0.1
1.0
(V
10
100
V
CE
)
dc
Figure 9. Safe Operating Area
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4
NSS40600CF8T1G
PACKAGE DIMENSIONS
ChipFET
CASE 1206A−03
ISSUE G
NOTES:
D
q
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
L
8
1
7
2
6
3
5
4
5
4
6
3
7
2
8
1
H
E
E
MILLIMETERS
INCHES
NOM
0.041
0.012
0.006
DIM
A
b
c
D
MIN
1.00
0.25
0.10
2.95
1.55
NOM
1.05
MAX
MIN
MAX
0.043
0.014
0.008
0.122
0.067
e1
b
1.10
0.35
0.20
3.10
1.70
0.039
0.010
0.004
0.116
0.061
c
0.30
e
0.15
3.05
0.120
0.065
E
1.65
e
e1
L
0.65 BSC
0.55 BSC
0.35
1.90
5° NOM
0.025 BSC
0.022 BSC
0.014
0.075
5° NOM
0.28
1.80
0.42
2.00
0.011
0.071
0.017
0.079
A
H
E
q
0.05 (0.002)
SOLDERING FOOTPRINT*
2.032
0.08
2.032
0.08
0.457
0.018
0.635
0.025
1.727
0.068
0.457
0.018
0.178
0.007
0.711
0.028
0.711
0.028
mm
inches
mm
inches
0.66
0.026
0.66
0.026
ǒ
Ǔ
ǒ
Ǔ
SCALE 20:1
SCALE 20:1
Basic
Style 4
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ChipFET is a trademark of Vishay Siliconix.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NSS40600CF8/D
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