NSTB1005DXV5T1 [ONSEMI]
Dual Common Base-Collector Bias Resistor Transistors; 双共基极 - 集电极偏置电阻晶体管
| 型号： | NSTB1005DXV5T1 |
| 厂家： | 
ONSEMI |
| 描述： | Dual Common Base-Collector Bias Resistor Transistors |
| 文件： | 总6页 (文件大小：63K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NSTB1005DXV5T1,
NSTB1005DXV5T5
Preferred Devices
Dual Common
Base−Collector Bias
Resistor Transistors
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NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
3
2
1
R1
R2
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. The NSTB1005DXV5T1
contains two complementary BRT devices are housed in the SOT−553
package which is ideal for low power surface mount applications
where board space is at a premium.
Q2
R2
Q1
R1
4
5
• Simplifies Circuit Design
• Reduces Board Space
5
• Reduces Component Count
• Available in 8 mm, 7 inch Tape and Reel
• Lead Free
1
SOT−553
CASE 463B
MARKING DIAGRAM
MAXIMUM RATINGS (T = 25°C unless otherwise noted, common for Q
A
1
and Q , − minus sign for Q (PNP) omitted)
2
1
5
Rating
Symbol
Value
50
Unit
UC D
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
V
Vdc
Vdc
CBO
CEO
1
V
50
UC = Specific Device Code
= Date Code
I
C
100
mAdc
D
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol
Max
Unit
ORDERING INFORMATION
Total Device Dissipation
P
D
†
Device
Package
Shipping
357 (Note 1)
2.9 (Note 1)
mW
mW/°C
T = 25°C
A
NSTB1005DXV5T1 SOT−553
4 mm pitch
Derate above 25°C
4000/Tape & Reel
Thermal Resistance −
Junction-to-Ambient
R
350 (Note 1)
°C/W
q
JA
NSTB1005DXV5T5 SOT−553
2 mm pitch
8000/Tape & Reel
Characteristic
(Both Junctions Heated)
Symbol
Max
Unit
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Total Device Dissipation
T = 25°C
Derate above 25°C
P
D
500 (Note 1)
4.0 (Note 1)
mW
A
mW/°C
Thermal Resistance −
Junction-to-Ambient
R
250 (Note 1)
−55 to +150
°C/W
q
JA
Preferred devices are recommended choices for future use
and best overall value.
Junction and Storage Temperature
1. FR−4 @ Minimum Pad
T , T
J stg
°C
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
March, 2004 − Rev. 0
NSTB1005DXV5/D
NSTB1005DXV5T1, NSTB1005DXV5T5
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
Q1 TRANSISTOR: PNP − OFF CHARACTERISTICS
Collector−Base Cutoff Current (V = 50 V, I = 0)
I
I
−
−
−
−
−
−
100
500
0.1
−
nAdc
nAdc
mAdc
Vdc
CB
E
CBO
Collector−Emitter Cutoff Current (V = 50 V, I = 0)
−
CE
B
CEO
Emitter−Base Cutoff Current
Collector−Base Breakdown Voltage (I = 10 mA, I = 0)
I
−
EBO
V
V
50
50
C
E
(BR)CBO
(BR)CEO
Collector−Emitter Breakdown Voltage (I = 2.0 mA, I = 0)
−
Vdc
C
B
ON CHARACTERISTICS
DC Current Gain
h
80
−
140
−
−
FE
Collector−Emitter Saturation Voltage (I = 10 mA, I = 0.3 mA)
V
CE(sat)
0.25
0.2
−
Vdc
Vdc
Vdc
kW
C
E
Output Voltage (on) (V = 5.0 V, V = 3.5 V, R = 1.0 kW)
V
−
−
CC
B
L
OL
Output Voltage (off) (V = 5.0 V, V = 0.5 V, R = 1.0 kW)
V
OH
4.9
32.9
0.8
−
CC
B
L
Input Resistor
Resistor Ratio
R1
R /R
47
1.0
61.1
1.2
1
2
Q2 TRANSISTOR: NPN − OFF CHARACTERISTICS
Collector-Base Cutoff Current (V = 50 V, I = 0)
I
I
−
−
−
−
−
−
100
500
0.1
nAdc
nAdc
mAdc
CB
E
CBO
Collector-Emitter Cutoff Current (V = 50 V, I = 0)
CB
B
CEO
Emitter-Base Cutoff Current
(V = 6.0, I = 5.0 mA)
EB
I
EBO
C
ON CHARACTERISTICS
Collector-Base Breakdown Voltage (I = 10 mA, I = 0)
V
V
50
50
80
−
−
−
−
−
Vdc
Vdc
C
E
(BR)CBO
Collector-Emitter Breakdown Voltage (I = 2.0 mA, I = 0)
C
B
(BR)CEO
DC Current Gain
(V = 10 V, I = 5.0 mA)
CE
h
FE
140
−
−
C
Collector−Emitter Saturation Voltage (I = 10 mA, I = 0.3 mA)
V
0.25
0.2
−
Vdc
Vdc
Vdc
kW
C
B
CE(SAT)
Output Voltage (on) (V = 5.0 V, V = 2.5 V, R = 1.0 kW)
V
OL
−
−
CC
B
L
Output Voltage (off) (V = 5.0 V, V = 0.5 V, R = 1.0 kW)
V
OH
4.9
33
0.8
−
CC
B
L
Input Resistor
Resistor Ratio
R1
R1/R2
47
1.0
61
1.2
250
200
150
100
50
R
q
= 833°C/W
JA
0
−ꢀ50
0
50
100
150
T , AMBIENT TEMPERATURE (°C)
A
Figure 1. Derating Curve
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2
NSTB1005DXV5T1, NSTB1005DXV5T5
TYPICAL ELECTRICAL CHARACTERISTICS − PNP TRANSISTOR
1000
1
V
CE
= 10 V
I /I = 10
C B
T ꢁ=ꢁ75°C
A
T ꢁ=ꢁ−25°C
A
25°C
−25°C
ꢀ0.1
100
25°C
75°C
ꢀ0.01
10
ꢀ20
I , COLLECTOR CURRENT (mA)
1
10
100
0
ꢀ40
50
I , COLLECTOR CURRENT (mA)
C
C
Figure 2. VCE(sat) versus IC
Figure 3. DC Current Gain
4
3
100
10
1
25°C
75°C
f = 1 MHz
l = 0 V
E
T ꢁ=ꢁ−25°C
A
T = 25°C
A
2
1
0
ꢀ0.1
ꢀ0.01
V
O
= 5 V
ꢀ0.001
0
10
20
30
40
50
0
1
ꢀ2
3
ꢀ4
ꢀ5
ꢀ6
ꢀ7
ꢀ8
ꢀ9
10
V , REVERSE BIAS VOLTAGE (VOLTS)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
100
V
O
= 0.2 V
T ꢁ=ꢁ−25°C
A
10
25°C
75°C
1
ꢀ0.1
0
10
ꢀ20
ꢀ30
ꢀ40
ꢀ50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage versus Output Current
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3
NSTB1005DXV5T1, NSTB1005DXV5T5
TYPICAL ELECTRICAL CHARACTERISTICS — NPN TRANSISTOR
10
1
1000
V
= 10 V
CE
I /I = 10
C B
T ꢁ=ꢁ75°C
A
25°C
−25°C
25°C
75°C
100
T ꢁ=ꢁ−25°C
A
0.1
0.01
10
0
20
40
50
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. VCE(sat) versus IC
Figure 8. DC Current Gain
1
100
10
1
25°C
f = 1 MHz
I = 0 mA
75°C
E
T ꢁ=ꢁ−25°C
A
0.8
T = 25°C
A
0.6
0.4
0.1
0.01
0.2
0
V
O
= 5 V
0.001
0
10
20
30
40
50
0
2
4
6
8
10
V , REVERSE BIAS VOLTAGE (VOLTS)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 9. Output Capacitance
Figure 10. Output Current versus Input Voltage
100
V
O
= 0.2 V
T ꢁ=ꢁ−25°C
A
25°C
75°C
10
1
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage versus Output Current
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4
NSTB1005DXV5T1, NSTB1005DXV5T5
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
5−LEAD PACKAGE
CASE 463B−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
A
C
−X−
K
5
4
3
MILLIMETERS
INCHES
B
−Y−
DIM MIN
MAX
1.70
1.30
0.60
0.27
MIN
MAX
0.067
0.051
0.024
0.011
S
A
B
C
D
G
J
1.50
1.10
0.50
0.17
0.059
0.043
0.020
0.007
1
2
0.50 BSC
0.020 BSC
D 5 PL
J
0.08
0.10
1.50
0.18
0.30
1.70
0.003
0.004
0.059
0.007
0.012
0.067
G
M
0.08 (0.003)
X
Y
K
S
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
NSTB1005DXV5T1, NSTB1005DXV5T5
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NSTB1005DXV5/D
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