NSVT65011MW6T1G [ONSEMI]
双匹配 NPN XSTR 65V;型号: | NSVT65011MW6T1G |
厂家: | ONSEMI |
描述: | 双匹配 NPN XSTR 65V 放大器 光电二极管 晶体管 |
文件: | 总5页 (文件大小:73K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NST65011MW6
Dual Matched General
Purpose Transistor
NPN Matched Pair
These transistors are housed in an ultra−small SOT−363 package
ideally suited for portable products. They are assembled to create a
pair of devices highly matched in all parameters, eliminating the need
for costly trimming. Applications are Current Mirrors; Differential,
Sense and Balanced Amplifiers; Mixers; Detectors and Limiters.
Complementary PNP equivalent NST65010MW6T1G is available.
www.onsemi.com
SOT−363
CASE 419B
STYLE 1
Features
• Current Gain Matching to 10%
• Base−Emitter Voltage Matched to 2 mV
• Drop−In Replacement for Standard Device
(3)
(2)
(1)
Q
• NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
Q
1
2
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
(4)
(5)
(6)
MAXIMUM RATINGS
MARKING DIAGRAMS
Rating
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Symbol
Value
65
Unit
V
V
CEO
V
CBO
V
EBO
2G MG
80
V
G
6.0
V
Collector Current − Continuous
I
C
100
mAdc
2G = Device Code
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
ORDERING INFORMATION
Total Device Dissipation
Per Device
P
D
380
250
mW
†
Device
Package
Shipping
NST65011MW6T1G
SOT−363
3,000 /
FR−5 Board (Note 1)
(Pb−Free) Tape & Reel
T = 25°C
A
Derate Above 25°C
3.0
mW/°C
°C/W
NSVT65011MW6T1G SOT−363 3,000 /
(Pb−Free) Tape & Reel
Thermal Resistance,
Junction to Ambient
R
328
q
JA
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Junction and Storage
Temperature Range
T , T
J
−55 to +150
°C
stg
1. FR−5 = 1.0 x 0.75 x 0.062 in
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
July, 2015 − Rev. 0
NST65011MW6/D
NST65011MW6
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Breakdown Voltage, (I = 10 mA)
V
65
80
80
6.0
−
−
−
−
−
−
−
−
V
V
V
V
C
(BR)CEO
Collector−Emitter Breakdown Voltage, (I = 10 mA, V = 0)
V
C
EB
(BR)CES
(BR)CBO
(BR)EBO
Collector−Base Breakdown Voltage, (I = 10 mA)
V
V
C
Emitter−Base Breakdown Voltage, (I = 1.0 mA)
E
Collector Cutoff Current
I
CBO
(V = 30 V)
−
−
−
−
15
5.0
nA
mA
CB
(V = 30 V, T = 150°C)
CB
A
ON CHARACTERISTICS
DC Current Gain
h
−
FE
(I = 10 mA, V = 5.0 V)
150
200
0.9
−
300
1.0
−
500
1.1
C
CE
(I = 2.0 mA, V = 5.0 V)
C
CE
(I = 2.0 mA, V = 5.0 V) (Note 2)
C
h h
FE(1)/ FE(2)
CE
Collector−Emitter Saturation Voltage
(I = 10 mA, I = 0.5 mA)
V
mV
mV
mV
CE(sat)
−
−
−
−
250
600
C
B
(I = 100 mA, I = 5.0 mA)
C
B
Base−Emitter Saturation Voltage
(I = 10 mA, I = 0.5 mA)
V
BE(sat)
700
850
750
890
800
950
C
B
(I = 100 mA, I = 5.0 mA)
C
B
Base−Emitter On Voltage
(I = 2.0 mA, V = 5.0 V)
V
BE(on)
580
−
−
660
−
1.0
700
770
2.0
C
CE
(I = 10 mA, V = 5.0 V)
C
CE
(I = 2.0 mA, V = 5.0 V) (Note 3)
V V
BE(1) − BE(2)
C
CE
SMALL−SIGNAL CHARACTERISTICS
Current−Gain − Bandwidth Product, (I = 10 mA, V = 5 Vdc, f = 100 MHz)
f
100
−
−
−
−
−
MHz
pF
C
CE
T
Output Capacitance, (V = 10 V, f = 1.0 MHz)
C
4.5
10
CB
ob
Noise Figure, (I = 0.2 mA, V = 5 Vdc, R = 2 kW, f = 1 kHz, BW = 200Hz)
NF
−
dB
C
CE
S
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. h
/h
is the ratio of one transistor compared to the other transistor within the same package. The smaller h is used as numerator.
FE(1) FE(2) FE
3. V
− V
is the absolute difference of one transistor compared to the other transistor within the same package.
BE(1)
BE(2)
www.onsemi.com
2
NST65011MW6
TYPICAL CHARACTERISTICS
2.0
1.5
1.0
V
= 10 V
T = 25°C
A
0.9
0.8
0.7
CE
T = 25°C
A
V
@ I /I = 10
C B
BE(sat)
1.0
0.8
V
BE(on)
@ V = 10 V
CE
0.6
0.5
0.4
0.3
0.6
0.4
0.3
0.2
0.1
V
@ I /I = 10
C B
CE(sat)
0.2
0
0.1
0.2
0.5 1.0
2.0
5.0 10
20
50 100 200
0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100
I , COLLECTOR CURRENT (mAdc)
C
I , COLLECTOR CURRENT (mAdc)
C
Figure 1. Normalized DC Current Gain
Figure 2. “Saturation” and “On” Voltages
2.0
1.6
1.2
0.8
0.4
0
1.0
1.2
1.6
2.0
2.4
2.8
T = 25°C
-55°C to +125°C
A
I = 200 mA
C
I =
I = I = 50 mA
C
I = 100 mA
C
C
C
10 mA 20 mA
0.02
0.1
1.0
10 20
0.2
1.0
10
100
I , BASE CURRENT (mA)
B
I , COLLECTOR CURRENT (mA)
C
Figure 3. Collector Saturation Region
Figure 4. Base−Emitter Temperature Coefficient
10
7.0
5.0
400
300
T = 25°C
A
200
C
ib
V
= 10 V
CE
100
80
T = 25°C
A
3.0
2.0
C
ob
60
40
30
1.0
20
0.4 0.6 0.8 1.0
2.0
4.0 6.0 8.0 10
20
40
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
20 30
50
V , REVERSE VOLTAGE (VOLTS)
R
I , COLLECTOR CURRENT (mAdc)
C
Figure 5. Capacitances
Figure 6. Current−Gain − Bandwidth Product
www.onsemi.com
3
NST65011MW6
TYPICAL CHARACTERISTICS
200
100
50
The safe operating area curves indicate I −V limits
C
CE
1 s
3 ms
of the transistor that must be observed for reliable
operation. Collector load lines for specific circuits must
fall below the limits indicated by the applicable curve.
T = 25°C
T = 25°C
A
J
The data of Figure 7 is based upon T
= 150°C; T
J(pk)
C
or T is variable depending upon conditions.
A
10
5.0
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
2.0
1.0
5.0
10
30 45 65 100
V
CE
, COLLECTOR-EMITTER VOLTAGE (V)
Figure 7. Active Region Safe Operating Area
www.onsemi.com
4
NST65011MW6
PACKAGE DIMENSIONS
SC−88 (SOT−363)
CASE 419B−02
ISSUE Y
2X
aaa H D
NOTES:
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa C
2X
2X 3 TIPS
bbb H D
e
MILLIMETERS
DIM MIN NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−− 0.043
−−− 0.004
6X b
B
TOP VIEW
A
−−−
−−−
1.10
A1 0.00
A2 0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1 1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
RECOMMENDED
SOLDERING FOOTPRINT*
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
6X
6X
0.30
0.66
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NST65011MW6/D
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