NTD2955D [ONSEMI]

Power MOSFET; 功率MOSFET
NTD2955D
型号: NTD2955D
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET
功率MOSFET

文件: 总8页 (文件大小:68K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NTD2955  
Power MOSFET  
−60 V, 12 A, P−Channel DPAK  
This Power MOSFET is designed to withstand high energy in the  
avalanche and commutation modes. Designed for low−voltage, high−  
speed switching applications in power supplies, converters, and power  
motor controls, these devices are particularly well suited for bridge  
circuits where diode speed and commutating safe operating areas are  
critical and offer an additional safety margin against unexpected  
voltage transients.  
http://onsemi.com  
V
R
TYP  
I MAX  
D
(BR)DSS  
DS(on)  
−60 V  
155 mW @ −10 V, 6 A  
−12 A  
Features  
Avalanche Energy Specified  
P−Channel  
I  
and V  
Specified at Elevated Temperature  
DSS  
DS(on)  
D
Designed for Low−Voltage, High−Speed Switching Applications and  
to Withstand High Energy in the Avalanche and Commutation Modes  
Pb−Free Packages are Available  
G
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
S
Rating  
Symbol  
Value  
Unit  
Drain−to−Source Voltage  
V
DSS  
−60  
Vdc  
MARKING  
DIAGRAMS  
Gate−to−Source Voltage  
− Continuous  
V
± 20  
± 25  
Vdc  
Vpk  
GS  
V
GSM  
− Non−repetitive (t 10 ms)  
p
4
Drain Current  
Drain Current − Continuous @ T = 25°C  
Drain Current − Single Pulse (t 10 ms)  
Drain  
I
−12  
−36  
Adc  
Apk  
D
a
4
I
DM  
p
DPAK  
CASE 369C  
STYLE 2  
Total Power Dissipation @ T = 25°C  
P
55  
W
a
D
2
3
1
Operating and Storage Temperature  
Range  
T , T  
J
55 to  
175  
°C  
stg  
2
1
Gate  
3
Single Pulse Drain−to−Source Avalanche  
E
AS  
216  
mJ  
Drain  
Source  
Energy − Starting T = 25°C  
J
(V = 25 Vdc, V = 10 Vdc, Peak  
DD  
GS  
4
I = 12 Apk, L = 3.0 mH, R = 25 W)  
L
G
Drain  
Thermal Resistance  
− Junction−to−Case  
− Junction−to−Ambient (Note 1)  
− Junction−to−Ambient (Note 2)  
4
R
R
R
2.73  
71.4  
100  
°C/W  
°C  
DPAK−3  
CASE 369D  
STYLE 2  
q
JC  
JA  
JA  
q
q
Maximum Lead Temperature for Soldering  
Purposes, 1/8 in. from case for  
10 seconds  
T
260  
L
1
2
3
1
2
3
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits  
are exceeded, device functional operation is not implied, damage may occur  
and reliability may be affected.  
Gate Drain Source  
NT2955  
A
Y
W
Device Code  
= Assembly Location  
= Year  
1. When surface mounted to an FR4 board using 1 in pad size  
2
(Cu area = 1.127 in ).  
= Work Week  
2. When surface mounted to an FR4 board using the minimum recommended  
2
pad size (Cu area = 0.412 in ).  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
October, 2004 − Rev. 7  
NTD2955/D  
 
NTD2955  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
Characteristic  
OFF CHARACTERISTICS  
Symbol  
Min  
Typ  
Max  
Unit  
Drain−to−Source Breakdown Voltage (Note 3)  
V
Vdc  
mV/°C  
mAdc  
(BR)DSS  
−60  
67  
(V = 0 Vdc, I = −0.25 mA)  
GS  
D
(Positive Temperature Coefficient)  
Zero Gate Voltage Drain Current  
I
DSS  
−10  
−100  
(V = 0 Vdc, V = −60 Vdc, T = 25°C)  
GS  
DS  
J
(V = 0 Vdc, V = −60 Vdc, T = 150°C)  
GS  
DS  
J
Gate−Body Leakage Current (V = ± 20 Vdc, V = 0 Vdc)  
I
−100  
nAdc  
GS  
DS  
GSS  
ON CHARACTERISTICS (Note 3)  
Gate Threshold Voltage  
V
Vdc  
mV/°C  
W
GS(th)  
−2.0  
−2.8  
4.5  
−4.0  
(V = V , I = −250 mAdc)  
DS  
GS  
D
(Negative Temperature Coefficient)  
Static Drain−Source On−State Resistance  
R
V
DS(on)  
0.155  
0.180  
(V = −10 Vdc, I = −6.0 Adc)  
GS  
D
Drain−to−Source On−Voltage  
(V = −10 Vdc, I = −12 Adc)  
Vdc  
DS(on)  
−1.86  
−2.6  
−2.0  
GS  
D
(V = −10 Vdc, I = −6.0 Adc, T = 150°C)  
GS  
D
J
Forward Transconductance (V = 10 Vdc, I = 6.0 Adc)  
8.0  
Mhos  
pF  
DS  
D
gFS  
DYNAMIC CHARACTERISTICS  
Input Capacitance  
C
500  
150  
50  
750  
250  
100  
iss  
(V = −25 Vdc, V = 0 Vdc,  
DS  
GS  
Output Capacitance  
C
oss  
F = 1.0 MHz)  
Reverse Transfer Capacitance  
C
rss  
SWITCHING CHARACTERISTICS (Notes 3 and 4)  
Turn−On Delay Time  
t
10  
45  
26  
48  
15  
4.0  
7.0  
20  
85  
40  
90  
30  
ns  
d(on)  
Rise Time  
t
r
(V = −30 Vdc, I = −12 A,  
DD  
D
G
V
GS  
= −10 V, R = 9.1 W)  
Turn−Off Delay Time  
Fall Time  
t
d(off)  
t
f
Gate Charge  
Q
nC  
T
(V = −48 Vdc, V = −10 Vdc,  
DS  
GS  
= −12 A)  
Q
GS  
GD  
I
D
Q
DRAIN−SOURCE DIODE CHARACTERISTICS (Note 3)  
Diode Forward On−Voltage  
V
Vdc  
ns  
SD  
−1.6  
−1.3  
−2.5  
(I = 12 Adc, V = 0 V)  
S
GS  
(I = 12 Adc, V = 0 V, T = 150°C)  
S
GS  
J
Reverse Recovery Time  
(I = 12 A, dI /dt = 100 A/ms ,V = 0 V)  
t
50  
40  
rr  
S
S
GS  
t
a
t
10  
b
Reverse Recovery Stored Charge  
Q
0.10  
mC  
RR  
3. Indicates Pulse Test: Pulse Width 300 ms, Duty Cycle 2%.  
4. Switching characteristics are independent of operating junction temperature.  
http://onsemi.com  
2
 
NTD2955  
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)  
25  
20  
15  
10  
5
24  
V
= −10 V  
T = 25°C  
J
T = −ꢀ55°C  
GS  
−9 V  
J
V
DS  
−10 V  
22  
20  
18  
16  
14  
12  
10  
8
−8 V  
−9.5 V  
25°C  
125°C  
−7 V  
−6.5 V  
−6 V  
−5.5 V  
−5 V  
6
4
2
0
0
0
1
2
3
4
5
6
7
8
9
10  
2
3
4
5
6
7
8
9
10  
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
DS  
−V , GATE−TO−SOURCE VOLTAGE (VOLTS)  
GS  
Figure 1. On−Region Characteristics  
Figure 2. Transfer Characteristics  
0.50  
0.45  
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0
0.250  
0.225  
0.200  
0.175  
0.150  
T = 25°C  
V
GS  
= −10 V  
J
T = 125°C  
J
V
= −10 V  
GS  
15 V  
25°C  
0.125  
0.100  
0.075  
0.050  
−ꢀ55°C  
0
3
6
9
12  
15  
18  
21  
24  
0
3
6
9
12  
15  
18  
21  
24  
−I , DRAIN CURRENT (AMPS)  
D
I , DRAIN CURRENT (AMPS)  
D
Figure 3. On−Resistance versus Drain Current  
and Temperature  
Figure 4. On−Resistance versus Drain Current  
and Gate Voltage  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
1000  
100  
10  
V
GS  
= 0 V  
V
= −10 V  
= −6 A  
GS  
I
D
T = 125°C  
J
100°C  
1
−ꢀ50 −ꢀ25  
0
25  
50  
75  
100 125  
150 175  
5
10 15 20 25 30 35 40 45 50 55  
60  
T , JUNCTION TEMPERATURE (°C)  
J
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
DS  
Figure 5. On−Resistance Variation with  
Temperature  
Figure 6. Drain−To−Source Leakage  
Current versus Voltage  
http://onsemi.com  
3
NTD2955  
1200  
1000  
800  
15  
60  
50  
40  
30  
20  
V
DS  
= 0 V  
V
GS  
= 0 V  
I
= 12 A  
T = 25°C  
D
J
T = 25°C  
J
V
C
DS  
iss  
12.5  
C
rss  
Q
10  
7.5  
5
T
V
GS  
600  
Q
Q
GD  
C
iss  
GS  
400  
C
oss  
200  
0
10  
0
2.5  
0
C
rss  
0
2
4
6
8
10  
12  
14  
16  
10  
5
0
5
10  
15  
20  
25  
Q , TOTAL GATE CHARGE (nC)  
T
−V  
−V  
DS  
GS  
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)  
Figure 8. Gate−To−Source and Drain−To−Source  
Voltage versus Total Charge  
Figure 7. Capacitance Variation  
1000  
100  
15  
V
= −30 V  
= −12 A  
= −10 V  
DD  
V
= 0 V  
GS  
I
D
T = 25°C  
J
V
GS  
T = 25°C  
J
10  
5
t
f
t
r
t
d(off)  
t
10  
1
d(on)  
0
1
10  
R , GATE RESISTANCE (W)  
100  
0
0.25  
0.5  
0.75  
1
1.25  
1.5  
1.75  
G
−V , SOURCE−TO−DRAIN VOLTAGE (V)  
SD  
Figure 9. Resistive Switching Time  
Variation versus Gate Resistance  
Figure 10. Diode Forward Voltage versus Current  
100  
10  
1
V
= −15 V  
GS  
SINGLE PULSE  
= 25°C  
T
C
di/dt  
100 ms  
1 ms  
I
S
t
rr  
10 ms  
dc  
t
a
t
b
R
LIMIT  
TIME  
DS(on)  
THERMAL LIMIT  
PACKAGE LIMIT  
0.25 I  
t
p
S
0.1  
0.1  
1
10  
100  
I
S
−V , DRAIN−TO−SOURCE VOLTAGE (V)  
DS  
Figure 12. Diode Reverse Recovery Waveform  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
http://onsemi.com  
4
NTD2955  
1.0  
D = 0.5  
0.2  
0.1  
P
(pk)  
0.05  
0.1  
R
q
(t) = r(t) R  
q
JC  
JC  
D CURVES APPLY FOR POWER  
PULSE TRAIN SHOWN  
0.02  
0.01  
SINGLE PULSE  
t
READ TIME AT t  
1
1
t
2
T
− T = P  
C
R (t)  
q
JC  
J(pk)  
(pk)  
DUTY CYCLE, D = t /t  
1 2  
0.01  
1.0E−05  
1.0E−04  
1.0E−03  
1.0E−02  
t, TIME (s)  
1.0E−01  
1.0E+00  
1.0E+01  
Figure 13. Thermal Response  
http://onsemi.com  
5
NTD2955  
ORDERING INFORMATION  
Device  
NTD2955  
Package  
Shipping  
DPAK  
75 Units / Rail  
75 Units / Rail  
NTD2955G  
DPAK  
(Pb−Free)  
NTD2955−001  
NTD2955−1G  
DPAK−3  
75 Units / Rail  
75 Units / Rail  
DPAK−3  
(Pb−Free)  
NTD2955T4  
DPAK  
2500 / Tape & Reel  
2500 / Tape & Reel  
NTD2955T4G  
DPAK  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
http://onsemi.com  
6
NTD2955  
PACKAGE DIMENSIONS  
DPAK  
CASE 369C−01  
ISSUE O  
SEATING  
PLANE  
−T−  
C
B
R
INCHES  
DIM MIN MAX  
MILLIMETERS  
E
V
MIN  
5.97  
6.35  
2.19  
0.69  
0.46  
0.94  
MAX  
6.22  
6.73  
2.38  
0.88  
0.58  
1.14  
A
B
C
D
E
F
G
H
J
0.235 0.245  
0.250 0.265  
0.086 0.094  
0.027 0.035  
0.018 0.023  
0.037 0.045  
0.180 BSC  
0.034 0.040  
0.018 0.023  
0.102 0.114  
0.090 BSC  
4
2
Z
A
K
S
1
3
4.58 BSC  
U
0.87  
0.46  
2.60  
1.01  
0.58  
2.89  
K
L
2.29 BSC  
F
J
R
S
U
V
Z
0.180 0.215  
0.025 0.040  
4.57  
0.63  
0.51  
0.89  
3.93  
5.45  
1.01  
−−−  
1.27  
−−−  
L
H
0.020  
0.035 0.050  
0.155 −−−  
−−−  
D 2 PL  
M
STYLE 2:  
PIN 1. GATE  
2. DRAIN  
G
0.13 (0.005)  
T
3. SOURCE  
4. DRAIN  
SOLDERING FOOTPRINT*  
6.20  
3.0  
0.244  
0.118  
2.58  
0.101  
5.80  
0.228  
1.6  
0.063  
6.172  
0.243  
mm  
inches  
ǒ
Ǔ
SCALE 3:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
http://onsemi.com  
7
NTD2955  
PACKAGE DIMENSIONS  
DPAK−3  
CASE 369D−01  
ISSUE B  
NOTES:  
C
B
R
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
V
S
E
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
5.97  
6.35  
2.19  
0.69  
0.46  
0.94  
MAX  
6.35  
6.73  
2.38  
0.88  
0.58  
1.14  
4
2
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245  
0.250 0.265  
0.086 0.094  
0.027 0.035  
0.018 0.023  
0.037 0.045  
0.090 BSC  
0.034 0.040  
0.018 0.023  
0.350 0.380  
0.180 0.215  
0.025 0.040  
0.035 0.050  
A
K
1
3
−T−  
SEATING  
PLANE  
2.29 BSC  
0.87  
0.46  
8.89  
4.45  
0.63  
0.89  
3.93  
1.01  
0.58  
9.65  
5.45  
1.01  
1.27  
−−−  
J
F
H
0.155  
−−−  
D 3 PL  
STYLE 2:  
PIN 1. GATE  
G
M
T
0.13 (0.005)  
2. DRAIN  
3. SOURCE  
4. DRAIN  
SOLDERING FOOTPRINT*  
6.20  
3.0  
0.244  
0.118  
2.58  
0.101  
5.80  
0.228  
1.6  
0.063  
6.172  
0.243  
mm  
inches  
ǒ
Ǔ
SCALE 3:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
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PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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Order Literature: http://www.onsemi.com/litorder  
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For additional information, please contact your  
local Sales Representative.  
NTD2955/D  

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