NTD78N03R-035 [ONSEMI]
Power MOSFET 25V 78A 6 mOhm Single N-Channel DPAK;
| 型号： | NTD78N03R-035 |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET 25V 78A 6 mOhm Single N-Channel DPAK 开关 脉冲 晶体管 功率场效应晶体管 |
| 文件： | 总8页 (文件大小：210K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NTD78N03R
Power MOSFET
25 V, 85 A, Single N−Channel, DPAK
Features
• Low R
to Minimize Conduction Losses
DS(on)
• Optimized Gate Charge to Minimize Switching Losses
• Pb−Free Packages are Available
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Applications
V
R
TYP
I MAX
D
(BR)DSS
DS(on)
• VCORE Applications
• DC−DC Converters
• Optimized for Low Side Switching
5.0 @ 11.5 V
7.5 @ 4.5 V
25 V
85 A
D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Symbol
Value
25
Unit
V
N−Channel
V
DSS
G
V
GS
"20
14.7
11.4
2.3
V
Continuous Drain
I
D
A
T = 25°C
S
A
Current (R ) (Note 1)
q
JA
T = 85°C
A
4
4
Power Dissipation
(R ) (Note 1)
T = 25°C
A
P
W
A
D
D
D
q
JA
4
Continuous Drain
I
D
T = 25°C
A
11.3
8.8
Current (R ) (Note 2)
q
JA
2
1
T = 85°C
A
Steady
State
1
2
3
1
2
3
3
Power Dissipation
(R ) (Note 2)
T = 25°C
A
P
I
1.4
W
A
q
JA
CASE 369AC
3 IPAK
(Straight Lead)
CASE 369C
DPAK
(Bend Lead) (Straight Lead)
CASE 369D
DPAK
Continuous Drain
T
C
T
C
T
C
= 25°C
= 85°C
= 25°C
85
66
D
Current (R
)
q
JC
STYLE 2
STYLE 2
Power Dissipation
(R
P
76.9
W
)
q
JC
MARKING DIAGRAMS
& PIN ASSIGNMENTS
Pulsed Drain Current
t = 10 ms
I
98
32
A
A
p
DM
I
DmaxPkg
4
Current Limited by Package
T = 25°C
A
Drain
Operating Junction and Storage Temperature
T , T
−55 to
175
°C
J
stg
4
Drain
Source Current (Body Diode)
Drain to Source dV/dt
I
S
77
8.0
75
A
dV/dt
V/ns
mJ
Single Pulse Drain−to−Source Avalanche
E
AS
Energy (V = 24 V, V = 10 V,
DD
GS
L = 5.0 mH, I (pk) = 5.5 A, R = 25 W)
L
G
1
3
3
2
Gate
Source
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Source
1
Gate
2
Drain
Drain
Y
WW
= Year
= Work Week
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
78N03R= Device Code
= Pb−Free Package
G
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
August, 2006 − Rev. 4
NTD78N03R/D
NTD78N03R
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Case (Drain)
R
1.95
65
°C/W
q
JC
Junction−to−Ambient − Steady State (Note 3)
Junction−to−Ambient − Steady State (Note 4)
R
q
JA
R
110
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
25
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
V
/T
J
10
mV/°C
(BR)DSS
Temperature Coefficient
Zero Gate Voltage Drain Current
I
T = 25°C
1.5
10
mA
DSS
J
V
V
= 0 V,
= 20 V
GS
DS
T = 125°C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
I
V
= 0 V, V = "20 V
"100
nA
GSS
DS
GS
V
V
= V , I = 250 mA
1.0
1.7
−5.3
5.0
4.9
7.5
7.2
23
3.0
V
GS(TH)
GS
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
J
mV/°C
mW
GS(TH)
R
V
=
I
D
I
D
I
D
I
D
= 30 A
= 15 A
= 30 A
= 15 A
5.8
5.7
9.0
8.5
DS(on)
GS
10V to 11.5 V
V
GS
= 4.5 V
Forward Transconductance
gFS
V
= 15 V, I = 10 A
S
DS
D
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
C
1794
882
373
19.4
0.8
pF
iss
V
= 0 V, f = 1.0 MHz,
GS
Output Capacitance
C
oss
V
DS
= 12 V
Reverse Transfer Capacitance
Total Gate Charge
C
rss
Q
24
nC
ns
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Q
G(TH)
V
GS
= 4.5 V, V = 20 V,
DS
I
D
= 20 A
Q
2.9
GS
GD
Q
12.4
t
11
75
18
17
d(on)
Rise Time
t
r
V
GS
= 4.5 V, V = 20 V,
DS
I
= 20 A, R = 2.5 W
D
G
Turn−Off Delay Time
t
d(off)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
GS
= 0 V,
T = 25°C
J
0.8
1.0
V
I
S
= 30 A
Reverse Recovery Time
Charge Time
t
38
16.5
22
ns
RR
ta
V
GS
= 0 V, dIs/d = 100 A/ms,
t
I
S
= 20 A
Discharge Time
tb
Reverse Recovery Time
Q
31
nC
RR
3. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NTD78N03R
120
120
10 V
V
DS
≥ 10 V
V
GS
= 4 V
100
T = 25°C
J
100
80
6 V
4.5 V
80
3.5 V
60
60
40
40
T = 25°C
J
3 V
T = 125°C
J
20
20
0
2.6 V
2.4 V
T = −55°C
J
0
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 2. Transfer Characteristics
Figure 1. On−Region Characteristics
11.50
10.25
9.00
0.01
0.008
0.006
I
= 30 A
T = 25°C
J
D
T = 25°C
J
V
= 4.5 V
= 10 V
GS
7.75
V
GS
6.50
0.004
0.002
5.25
4.00
3
4
5
6
7
8
9
10
10
15
20
25
30
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
2
100000
10000
1000
V
GS
= 0 V
I
V
= 30 A
D
1.8
1.6
1.4
1.2
1
= 10 V
GS
T = 175°C
J
to 11.5V
T = 100°C
0.8
0.6
J
100
−50 −25
0
25
50
75 100 125 150 175
2
4
6
8
10
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
12
14
16
18
20
T , JUNCTION TEMPERATURE (°C)
J
V
Figure 5. On−Resistance Variation with
Figure 6. Drain−To−Source Leakage
Temperature
Current versus Voltage
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3
NTD78N03R
3500
3000
2500
2000
1500
1000
5
20
16
12
8
Q
V
DS
= 0 V
V
GS
= 0 V
T
T = 25°C
J
C
iss
4
3
2
V
DS
V
GS
Q
Q
2
1
C
iss
C
rss
C
oss
1
0
4
0
500
0
I
= 20 A
D
T = 25°C
J
C
rss
20
15
10
5
0
5
10
15
20
25
0
4
8
12
16
20
V
GS
V
DS
Q , TOTAL GATE CHARGE (nC)
g
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
Figure 7. Capacitance Variation
40
1000
100
10
V
= 15 V
= 20 A
= 4.5 V
DS
V
GS
= 0 V
35
30
25
20
15
10
I
D
T = 25°C
J
V
GS
t
t
r
f
t
d(off)
5
0
t
d(on)
1
10
R , GATE RESISTANCE (OHMS)
100
0.3
0.6
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
0.9
1.2
V
G
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
Figure 10. Diode Forward Voltage versus Current
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4
NTD78N03R
ORDERING INFORMATION
Order Number
†
Package
Shipping
NTD78N03R
DPAK
75 Units/Rail
NTD78N03RG
DPAK
(Pb−Free)
NTD78N03RT4
DPAK
2500 Tape & Reel
NTD78N03RT4G
DPAK
(Pb−Free)
NTD78N03R−1
DPAK Straight Lead
NTD78N03R−1G
DPAK Straight Lead
(Pb−Free)
NTD78N03R−35
DPAK Straight Lead
(3.5 " 0.15 mm)
75 Units/Rail
NTD78N03R−35G
DPAK Straight Lead
(3.5 " 0.15 mm)
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NTD78N03R
PACKAGE DIMENSIONS
DPAK
CASE 369C−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
SEATING
PLANE
−T−
2. CONTROLLING DIMENSION: INCH.
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
E
V
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.22
6.73
2.38
0.88
0.58
1.14
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
4
2
Z
A
K
S
1
3
4.58 BSC
U
0.87
0.46
2.60
1.01
0.58
2.89
K
L
2.29 BSC
F
J
R
S
U
V
Z
0.180 0.215
0.025 0.040
4.57
0.63
0.51
0.89
3.93
5.45
1.01
−−−
1.27
−−−
L
H
0.020
0.035 0.050
0.155 −−−
−−−
D 2 PL
M
G
0.13 (0.005)
T
SOLDERING FOOTPRINT*
6.20
3.0
0.244
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
NTD78N03R
PACKAGE DIMENSIONS
DPAK
CASE 369D−01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
C
B
R
2. CONTROLLING DIMENSION: INCH.
V
S
E
INCHES
DIM MIN MAX
MILLIMETERS
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
4
2
Z
A
K
1
3
2.29 BSC
−T−
SEATING
PLANE
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
K
R
S
V
Z
J
0.155
−−−
F
H
STYLE 2:
PIN 1. GATE
2. DRAIN
D 3 PL
G
M
T
0.13 (0.005)
3. SOURCE
4. DRAIN
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7
NTD78N03R
PACKAGE DIMENSIONS
3 IPAK, STRAIGHT LEAD
CASE 369AC−01
ISSUE O
NOTES:
1.. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2.. CONTROLLING DIMENSION: INCH.
3. SEATING PLANE IS ON TOP OF
DAMBAR POSITION.
4. DIMENSION A DOES NOT INCLUDE
DAMBAR POSITION OR MOLD GATE.
B
R
C
V
E
INCHES
DIM MIN MAX
MILLIMETERS
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.22
6.73
2.38
0.88
0.58
1.09
A
B
C
D
E
F
G
H
J
K
R
V
W
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.043
0.090 BSC
0.034 0.040
0.018 0.023
0.134 0.142
0.180 0.215
0.035 0.050
A
K
SEATING PLANE
W
2.29 BSC
F
0.87
0.46
3.40
4.57
0.89
1.01
0.58
3.60
5.46
1.27
0.25
J
G
H
D 3 PL
0.000 0.010 0.000
0.13 (0.005) W
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NTD78N03R/D
相关型号：
NTD78N03T4G
11.4A, 25V, 0.006ohm, N-CHANNEL, Si, POWER, MOSFET, LEAD FREE, CASE 369AA-01, DPAK-3
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