概述
数据手册NTHD3101F 概述
Power MOSFET and Schottky Diode 功率MOSFET和肖特基二极管
NTHD3101F 数据手册
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PDF下载NTHD3101F
Power MOSFET and
Schottky Diode
−20 V, FETKYt, P−Channel, −4.4 A, with
4.1 A Schottky Barrier Diode, ChipFETt
http://onsemi.com
MOSFET
Features
• Leadless SMD Package Featuring a MOSFET and Schottky Diode
• 40% Smaller than TSOP−6 Package
V
R
DS(on)
TYP
I MAX
D
(BR)DSS
• Leadless SMD Package Provides Great Thermal Characteristics
• Independent Pinout to each Device to Ease Circuit Design
• Trench P−Channel for Low On Resistance
64 mW @ −4.5 V
85 mW @ −2.5 V
−20 V
−4.4 A
SCHOTTKY DIODE
• Ultra Low V Schottky
F
V
MAX
V
TYP
I MAX
F
R
F
• Pb−Free Packages are Available
Applications
20 V
0.510 V
4.1 A
• Li−Ion Battery Charging
A
C
S
• High Side DC−DC Conversion Circuits
• High Side Drive for Small Brushless DC Motors
• Power Management in Portable, Battery Powered Products
G
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
−20
8.0
Units
D
V
V
V
A
DSS
P−Channel MOSFET
Schottky Diode
Gate−to−Source Voltage
V
GS
Continuous Drain
Current (Note 1)
I
D
T = 25°C
−3.2
−2.3
−4.4
1.1
J
Steady
State
8
ChipFET
CASE 1206A
STYLE 3
T = 85°C
J
t ≤ 5 s T = 25°C
J
1
Power Dissipation
(Note 1)
P
W
Steady
State
D
T = 25°C
J
t ≤ 5 s
2.1
Pulsed Drain Current
t = 10 ms
I
−13
A
p
DM
PIN
MARKING
DIAGRAM
Operating Junction and Storage Temperature T , T
−55 to
150
°C
CONNECTIONS
J
STG
1
8
Source Current (Body Diode)
I
2.5
A
A
A
S
G
C
C
D
D
1
2
3
4
8
7
6
5
S
2
7
6
Lead Temperature for Soldering Purposes
T
260
°C
L
(1/8″ from case for 10 s)
SCHOTTKY DIODE MAXIMUM RATINGS
3
4
(T = 25°C unless otherwise noted)
J
Parameter
Peak Repetitive Reverse Voltage
DC Blocking Voltage
Symbol
Value
20
Units
5
V
V
V
V
RRM
D1 = Specific Device Code
V
I
20
R
M
G
= Month Code
= Pb−Free Package
Average Rectified
Forward Current
Steady
State
2.2
F
T = 25°C
J
t ≤ 5 s
4.1
A
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 3
NTHD3101F/D
NTHD3101F
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
113
60
Units
°C/W
°C/W
Junction−to−Ambient – Steady State (Note 2)
Junction−to−Ambient – t ≤ 10 s (Note 2)
R
q
JA
R
q
JA
2. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces).
MOSFET ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
= 0 V, I = −250 mA
−20
V
(BR)DSS
GS
D
Drain−to−Source Breakdown Voltage
V
/T
(BR)DSS
−15
mV/°C
J
Temperature Coefficient
Zero Gate Voltage Drain Current
I
mA
T = 25°C
−1.0
−5.0
100
DSS
J
V
= −16 V, V = 0 V
GS
DS
T = 125°C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
I
V
= 0 V, V =
GS
8.0 V
nA
GSS
DS
V
V
= V , I = −250 mA
−0.45
−1.5
V
GS(TH)
GS
DS
D
Gate Threshold
Temperature Coefficient
V
/T
GS(TH)
2.7
mV/°C
J
Drain−to−Source On−Resistance
R
mW
V
= −4.5, I = −3.2 A
64
85
80
DS(on)
GS
GS
GS
D
V
= −2.5, I = −2.2 A
110
170
D
V
= −1.8, I = −1.0 A
120
8.0
D
Forward Transconductance
g
FS
V
= −10 V, I = −2.9 A
S
DS
D
CHARGES AND CAPACITANCES
pF
Input Capacitance
C
680
100
70
ISS
V
= 0 V, f = 1.0 MHz,
DS
GS
Output Capacitance
C
OSS
C
RSS
V
= −10 V
Reverse Transfer Capacitance
Total Gate Charge
nC
ns
Q
7.4
0.6
1.4
2.5
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Q
G(TH)
V
V
= −4.5 V, V = −10 V,
DS
GS
I
= −3.2 A
D
Q
GS
GD
Q
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
t
5.8
11.7
16
d(ON)
Rise Time
t
r
= −4.5 V, V = −10 V,
GS
DD
I
= −3.2 A, R = 2.4 W
D
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
12.4
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
V
V
= 0 V, I = −2.5 A
T = 25°C
−0.8
13.5
9.5
−1.2
V
SD
GS
S
J
ns
t
RR
t
t
a
V
= 0 V, I = −1.0 A ,
S
GS
dI /dt = 100 A/ms
S
Discharge Time
4.0
b
Reverse Recovery Charge
Q
6.5
nC
RR
SCHOTTKY DIODE ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Maximum Instantaneous
Forward Voltage
V
V
I = 0.1 A
0.425
0.510
F
F
I = 1.0 A
F
0.575
1.0
Maximum Instantaneous
Reverse Current
I
mA
V
V
= 10 V
= 20 V
R
R
R
5.0
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NTHD3101F
TYPICAL P−CHANNEL PERFORMANCE CURVES
(T = 25°C unless otherwise noted)
J
9
8
7
6
5
4
9
V
V
−2.6 V
= −5 V to −3.6 V
= −3 V
GS
T = 25°C
J
V
≥ −10 V
DS
8
7
6
5
4
3
GS
−2.4 V
−2.2 V
−2 V
3
2
−1.8 V
T
= −55°C
C
2
1
0
−1.6 V
−1.4 V
1
0
25°C
100°C
0
1
2
3
4
5
6
7
8
9
10
0
0.5
1
1.5
2
2.5
3
3.5
−V , GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.2
0.175
0.15
0.2
0.175
0.15
I
= −3.2 A
D
T = 25°C
J
T = 25°C
J
V
= −2.5 V
GS
0.125
0.1
0.125
0.1
V
= −4.5 V
GS
0.075
0.05
0.075
0.05
1
2
3
4
5
6
2
3
4
5
6
7
8
−V , GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
−I DRAIN CURRENT (AMPS)
D,
Figure 4. On−Resistance vs. Drain Current and
Figure 3. On−Resistance vs. Gate−to−Source
Gate Voltage
Voltage
1000
100
10
1.4
I
V
= −3.2 A
V
= 0 V
GS
D
= −4.5 V
1.3
1.2
1.1
1
GS
T = 100°C
J
0.9
0.8
0.7
−50 −25
0
25
50
75
100
125 150
2
4
6
8
10
12
14
16
18
20
−T , JUNCTION TEMPERATURE (°C)
J
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NTHD3101F
TYPICAL P−CHANNEL PERFORMANCE CURVES
(T = 25°C unless otherwise noted)
J
5
10
8
1500
1200
900
V
= 0 V
T = 25°C
GS
J
Q
T
C
ISS
4
3
2
1
0
−V
DS
−V
GS
6
V
= 0 V
DS
Q
Q
GS
GD
4
600
C
RSS
2
300
0
I
= −3.2 A
T = 25°C
C
OSS
D
J
0
0
2
4
6
8
5
0
5
10
15
20
−V
GS
−V
DS
Q , TOTAL GATE CHARGE (nC)
g
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 7. Capacitance Variation
1000
5
4
3
2
V
= −10 V
= −3.2 A
= −4.5 V
DS
V
= 0 V
GS
I
D
T = 25°C
J
V
GS
t
100
10
1
d(off)
t
f
t
r
t
d(on)
1
0
1
10
R , GATE RESISTANCE (OHMS)
100
0.3
0.6
0.9
1.2
−V , SOURCE−TO−DRAIN VOLTAGE (VOLTS)
SD
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
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4
NTHD3101F
TYPICAL SCHOTTKY PERFORMANCE CURVES (T = 25°C unless otherwise noted)
J
10
10
T = 150°C
J
T = 150°C
J
1
1
T = 25°C
J
T = 25°C
J
T = −55°C
J
0.1
0.1
0.20
0.40
0.60
0.80
0.20
0.40
0.60
0.80
V , INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
F
V , MAXIMUM INSTANTANEOUS FORWARD
F
VOLTAGE (VOLTS)
Figure 11. Typical Forward Voltage
Figure 12. Maximum Forward Voltage
1E−3
10E+0
1E+0
T = 150°C
T = 150°C
J
J
100E−6
10E−6
1E−6
T = 100°C
J
T = 100°C
J
100E−3
10E−3
100E−9
10E−9
1E−3
T = 25°C
J
T = 25°C
J
100E−6
0
10
20
0
10
20
V , REVERSE VOLTAGE (VOLTS)
R
V , REVERSE VOLTAGE (VOLTS)
R
Figure 14. Maximum Reverse Current
Figure 13. Typical Reverse Current
3.5
3
1.8
1.6
1.4
1.2
1
freq = 20 kHz
dc
square wave
Ipk/Io = p
dc
2.5
2
square wave
Ipk/Io = 5
Ipk/Io = 10
Ipk/Io = 20
Ipk/Io = p
0.8
0.6
0.4
1.5
1
Ipk/Io = 5
Ipk/Io = 10
Ipk/Io = 20
0.5
0
0.2
0
25
45
65
85
105
125
145
165
0
0.5
1
1.5
2
2.5
3
3.5
T , LEAD TEMPERATURE (°C)
L
I , AVERAGE FORWARD CURRENT (AMPS)
O
Figure 15. Current Derating
Figure 16. Forward Power Dissipation
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5
NTHD3101F
DEVICE ORDERING INFORMATION
Device
†
Package
Shipping
NTHD3101FT1
ChipFET
3000 / Tape & Reel
3000 / Tape & Reel
NTHD3101FT1G
ChipFET
(Pb−Free)
NTHD3101FT3
ChipFET
10000 / Tape & Reel
10000 / Tape & Reel
NTHD3101FT3G
ChipFET
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
NTHD3101F
PACKAGE DIMENSIONS
ChipFET
CASE 1206A−03
ISSUE G
NOTES:
D
q
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
L
8
1
7
2
6
3
5
4
5
4
6
3
7
2
8
1
H
E
E
MILLIMETERS
INCHES
NOM
0.041
0.012
0.006
DIM
A
b
c
D
E
e
e1
L
MIN
1.00
0.25
0.10
2.95
1.55
NOM
1.05
MAX
MIN
MAX
0.043
0.014
0.008
0.122
0.067
e1
b
1.10
0.35
0.20
3.10
1.70
0.039
0.010
0.004
0.116
0.061
c
0.30
e
STYLE 3:
PIN 1. A
0.15
3.05
0.120
0.065
2. A
3. S
4. G
5. D
6. D
7. C
8. C
1.65
0.65 BSC
0.55 BSC
0.35
1.90
5° NOM
0.025 BSC
0.022 BSC
0.014
0.075
5° NOM
0.28
1.80
0.42
2.00
0.011
0.071
0.017
0.079
A
H
E
q
0.05 (0.002)
SOLDERING FOOTPRINT*
2.032
0.08
0.711
0.028
1.092
0.043
0.178
0.007
0.457
0.018
0.254
0.010
0.66
mm
inches
ǒ
Ǔ
SCALE 20:1
0.026
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ChipFET is a trademark of Vishay Siliconix.
FETKY is a registered trademark of International Rectifier Corporation.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
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Order Literature: http://www.onsemi.com/litorder
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Email: orderlit@onsemi.com
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Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
NTDH3101F/D
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