NTLJS4159NT1G [ONSEMI]
Power MOSFET 30V 7.8 A 35 mOhm Single N-Channel WDFN6;
| 型号： | NTLJS4159NT1G |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET 30V 7.8 A 35 mOhm Single N-Channel WDFN6 开关 脉冲 晶体管 |
| 文件： | 总7页 (文件大小：206K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NTLJS4159N
Power MOSFET
30 V, 7.8 A, Single N−Channel, 2x2 mm
WDFN Package
Features
• WDFN Package Provides Exposed Drain Pad for Excellent Thermal
Conduction
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• 2x2 mm Footprint Same as SC−88
V
R
MAX
I MAX (Note 1)
D
(BR)DSS
DS(on)
• Lowest R
• 1.8 V R
in 2x2 mm Package
DS(on)
35 mW @ 4.5 V
45 mW @ 2.5 V
55 mW @ 1.8 V
Rating for Operation at Low Voltage Logic Level Gate
DS(on)
30 V
7.8 A
Drive
• Low Profile (< 0.8 mm) for Easy Fit in Thin Environments
• This is a Pb−Free Device
S
Applications
• DC−DC Conversion
G
• Boost Circuits for LED Backlights
• Optimized for Battery and Load Management Applications in
Portable Equipment such as, Cell Phones, PDA’s, Media Players, etc.
• Low Side Load Switch
D
N−CHANNEL MOSFET
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
30
Unit
V
MARKING
DIAGRAM
S
D
V
DSS
Gate−to−Source Voltage
V
8.0
V
1
2
3
6
5
4
GS
WDFN6
CASE 506AP
JBMG
Continuous Drain
Current (Note 1)
I
A
T = 25°C
6.0
D
G
A
Steady
State
Pin 1
T = 85°C
A
4.4
JB = Specific Device Code
t ≤ 5 s
T = 25°C
A
7.8
M
G
= Date Code
= Pb−Free Package
Power Dissipation
(Note 1)
P
W
Steady
State
1.92
D
T = 25°C
A
(Note: Microdot may be in either location)
t ≤ 5 s
3.3
3.6
PIN CONNECTIONS
Continuous Drain
Current (Note 2)
I
D
A
T = 25°C
A
T = 85°C
2.6
Steady
State
A
D
D
G
D
1
2
3
6
5
4
Power Dissipation
(Note 2)
P
D
0.70
W
T = 25°C
A
D
S
Pulsed Drain Current
t = 10 ms
I
28
A
p
DM
D
Operating Junction and Storage Temperature T , T
−55 to
150
°C
J
STG
S
Source Current (Body Diode) (Note 2)
I
S
3.0
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
(Top View)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
†
Device
Package
Shipping
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
NTLJS4159NT1G
WDFN6
3000/Tape & Reel
2. Surface Mounted on FR4 Board using the minimum recommended pad size
of 30 mm2, 2 oz Cu.
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
August, 2016 − Rev. 5
NTLJS4159N/D
NTLJS4159N
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
65
Unit
Junction−to−Ambient – Steady State (Note 3)
Junction−to−Ambient – t ≤ 5 s (Note 3)
R
q
JA
R
38
°C/W
q
JA
Junction−to−Ambient – Steady State Min Pad (Note 4)
R
180
q
JA
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
2
4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm , 2 oz Cu).
MOSFET ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
30
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/T
J
I
D
= 250 mA, Ref to 25°C
20
mV/°C
(BR)DSS
Zero Gate Voltage Drain Current
I
T = 25°C
1.0
1.0
5.0
100
mA
DSS
J
T = 65°C
J
V
DS
= 24 V, V = 0 V
GS
T = 85°C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
I
V
DS
= 0 V, V
=
8.0 V
nA
GSS
GS
V
V
GS
= V , I = 250 mA
0.4
0.7
1.0
V
GS(TH)
DS
D
Negative Gate Threshold
Temperature Coefficient
V
/T
3.18
mV/°C
GS(TH)
J
Drain−to−Source On−Resistance
R
V
V
V
= 4.5, I = 2.0 A
20.3
25.8
35.2
5.3
35
45
55
mW
DS(on)
GS
GS
GS
D
= 2.5, I = 2.0 A
D
= 1.8, I = 1.8 A
D
Forward Transconductance
g
FS
V
DS
= 16 V, I = 2.0 A
S
D
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
C
1045
115.5
45.3
12.1
1.2
pF
ISS
V
= 0 V, f = 1.0 MHz,
GS
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
C
OSS
C
RSS
V
= 15 V
DS
Q
13
nC
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Gate Resistance
Q
G(TH)
V
GS
= 4.5 V, V = 15 V,
DS
I
D
= 2.0 A
Q
1.9
GS
GD
Q
2.7
R
3.65
W
G
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
t
6.8
12.4
26
ns
d(ON)
Rise Time
t
r
V
= 4.5 V, V = 15 V,
GS
D
DD
I
= 2.0 A, R = 3.0 W
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
5.1
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Recovery Voltage
V
T = 25°C
0.71
0.58
15
1.2
35
SD
J
V
= 0 V, IS = 2.0 A
V
GS
T = 125°C
J
Reverse Recovery Time
Charge Time
t
RR
t
9.0
6.0
7.0
ns
a
V
= 0 V, d /d = 100 A/ms,
ISD t
GS
I = 1.0 A
S
Discharge Time
t
b
Reverse Recovery Time
Q
nC
RR
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NTLJS4159N
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted)
J
7
8
V
GS
= 1.6 V to 8 V
V
DS
≥ 10 V
T = 25°C
J
6
5
4
3
1.5 V
6
4
1.4 V
1.3 V
1.2 V
T = 25°C
J
2
1
0
2
0
T = 100°C
J
T = −55°C
J
0
0.5
V
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
0
0.5
1
1.5
2
2.5
3
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
, GATE−TO−SOURCE VOLTAGE (VOLTS)
DS
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.03
0.025
0.02
0.05
0.04
0.03
0.02
T = 25°C
J
V
GS
= 4.5 V
T = 100°C
J
V
= 1.8 V
= 2.5 V
GS
T = 25°C
J
V
GS
T = −55°C
J
0.015
V
GS
= 4.5 V
0.01
0.01
0
0.005
1.0
1.5
2.0
2.5
3.0
1
2
3
4
5
6
I , DRAIN CURRENT (AMPS)
D
I , DRAIN CURRENT (AMPS)
D
Figure 3. On−Resistance versus Drain Current
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
100000
10000
1.6
1.4
1.2
1.0
V
= 0 V
I
V
= 2 A
GS
D
= 4.5 V
GS
T = 125°C
J
T = 85°C
J
1000
100
0.8
0.6
−50
−25
0
25
50
75
100 125
150
2
4
6
8
10
12
14
16
18 20
T , JUNCTION TEMPERATURE (°C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
versus Voltage
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3
NTLJS4159N
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted)
J
3000
2400
1800
1200
5
20
16
12
8
V
DS
= 0 V V = 0 V
GS
QT
T = 25°C
J
4
3
2
V
GS
V
DS
C
iss
Q
GS
Q
GD
C
rss
600
0
1
0
4
0
C
oss
I
= 3.0 A
D
T = 25°C
J
5
0
5
10
15
20
25
30
0
4
8
12
16
V
GS
V
DS
Q , TOTAL GATE CHARGE (nC)
G
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
Figure 7. Capacitance Variation
1000
100
4
V
= 0 V
V
I
= 15 V
= 3.0 A
= 4.5 V
GS
DD
T = 25°C
J
D
V
GS
t
d(off)
3
2
1
t
f
t
r
t
d(on)
10
1
0
0.3
1
10
R , GATE RESISTANCE (OHMS)
100
0.4
0.5
0.6
0.7
0.8
V
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
G
SD
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
Figure 10. Diode Forward Voltage versus Current
100
See Note 2 on Page 1
10 ms
10
1
100 ms
1 ms
10 ms
SINGLE PULSE
= 25°C
T
C
T = 150°C
J
0.1
0.01
R
LIMIT
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
dc
0.1
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NTLJS4159N
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted)
J
1000
100
D = 0.5
0.2
0.1
0.05
10
P
(pk)
See Note 2 on Page 1
0.02
0.01
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
1
READ TIME AT t
1
t
1
T
− T = P
R
q
(t)
JA
t
2
J(pk)
A
(pk)
SINGLE PULSE
0.0001
DUTY CYCLE, D = t /t
1
2
0.1
0.000001
0.00001
0.001
0.01
t, TIME (s)
0.1
1
10
100
1000
Figure 12. Thermal Response
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN6 2x2
CASE 506AP−01
ISSUE B
DATE 26 APR 2006
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND
IS MEASURED BETWEEN 0.15 AND 0.20mm FROM
TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
WELL AS THE TERMINALS.
1. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL
LEAD IS CONNECTED TO TERMINAL LEAD # 4.
2. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG.
SCALE 4:1
D
A
B
E
MILLIMETERS
PIN ONE
REFERENCE
DIM
A
MIN
0.70
0.00
MAX
0.80
0.05
A1
A3
b
0.20 REF
2X
0.10 C
0.25
0.51
0.35
0.61
b1
D
2.00 BSC
2X
0.10
C
1.00
1.20
1.30
D2
E
2.00 BSC
1.10
E2
e
A3
0.65 BSC
0.15 REF
0.10
C
K
L
0.20
0.20
0.30
0.30
L2
J
A
0.27 REF
0.65 REF
J1
7X
0.08
C
A1
GENERIC
MARKING DIAGRAM*
SEATING
PLANE
C
4X
D2
1
2
3
6
5
4
e
L2
XX M
6X
L
1
3
XX = Specific Device Code
= Date Code
b1 6X
M
0.10
0.05
C
C
A
B
E2
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
NOTE 5
6
4
K
b
6X
SOLDERMASK DEFINED
MOUNTING FOOTPRINT
0.10
0.05
C
C
A
B
J
J1
NOTE 3
2.30
BOTTOM VIEW
1.10
6X
6X
STYLE 1:
PIN 1. DRAIN
2. DRAIN
STYLE 2:
0.35
0.43
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
3. GATE
1
4. SOURCE
5. DRAIN
6. DRAIN
4. EMITTER
5. COLLECTOR
6. COLLECTOR
0.60
1.25
0.34
0.35
0.66
0.65
PITCH
DIMENSIONS: MILLIMETERS
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON20860D
6 PIN WDFN 2X2, 0.65P
PAGE 1 OF 1
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