NTQD6968NR2G [ONSEMI]
功率 MOSFET 20V 7A 22 mΩ 双 N 沟道，TSSOP8;
| 型号： | NTQD6968NR2G |
| 厂家： | 
ONSEMI |
| 描述： | 功率 MOSFET 20V 7A 22 mΩ 双 N 沟道，TSSOP8 开关 脉冲 光电二极管 晶体管 |
| 文件： | 总8页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NTQD6968N
Power MOSFET
7.0 A, 20 V, Common Drain,
Dual N−Channel, TSSOP−8
Features
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• Low R
DS(on)
• Higher Efficiency Extending Battery Life
• Logic Level Gate Drive
V
R
TYP
I MAX
D
(BR)DSS
DS(on)
20 V
17 mW @ 4.5 V
7.0 A
• 3 mm Wide TSSOP−8 Surface Mount Package
• High Speed, Soft Recovery Diode
• TSSOP−8 Mounting Information Provided
• Pb−Free Package is Available
N−Channel
N−Channel
D
D
Applications
• Battery Protection Circuits
G1
G2
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
Rating
Drain−to−Source Voltage
Symbol Value
Unit
Vdc
Vdc
Adc
S1
S2
V
DSS
20
MARKING DIAGRAM &
PIN ASSIGNMENT
Gate−to−Source Voltage − Continuous
Drain Current
V
GS
"12
D S2 S2 G2
− Continuous @ T 25°C (Note 1)
I
7.0
5.6
20
A
D
8
− Continuous @ T 70°C (Note 1)
I
D
A
− Pulsed (Note 3)
I
DM
E68
YWW
A G
1
Total Power Dissipation @ T 25°C (Note 1)
P
I
1.81
W
A
D
TSSOP−8
CASE 948S
PLASTIC
Drain Current
Adc
− Continuous @ T 25°C (Note 2)
6.2
4.9
18
A
D
− Continuous @ T 70°C (Note 2)
I
D
A
1
− Pulsed (Note 3)
I
DM
D
S1 S1 G1
Total Power Dissipation @ T 25°C (Note 2)
P
D
1.39
W
A
E68 = Specific Device Code
Operating and Storage Temperature Range
T , T
−55 to
+150
°C
A
Y
= Assembly Location
= Year
J
stg
WW = Work Week
Thermal Resistance −
R
°C/W
°C
q
JA
G
= Pb−Free Package
Junction−to−Ambient (Note 1)
Junction−to−Ambient (Note 2)
69
90
Maximum Lead Temperature for Soldering Pur-
poses for 10 seconds
TL
260
ORDERING INFORMATION
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Mounted onto a 2″ square FR−4 Board
†
Device
Package
Shipping
NTQD6968N
TSSOP−8
100 Units / Rail
NTQD6968NR2
TSSOP−8 4000/Tape & Reel
(1 in sq, 2 oz. Cu 0.06″ thick single sided), t ≤ 10 sec.
2. Mounted onto a 2″ square FR−4 Board
(1 in sq, 2 oz. Cu 0.06″ thick single sided), Steady State.
3. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
NTQD6968NR2G TSSOP−8 4000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
May, 2006 − Rev. 3
NTQD6968N/D
NTQD6968N
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Characteristic
OFF CHARACTERISTICS
Symbol
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage
V
Vdc
mV/°C
mAdc
(BR)DSS
(V = 0 Vdc, I = 250 mAdc)
20
−
−
16
−
−
GS
D
Temperature Coefficient (Positive)
Zero Gate Voltage Collector Current
I
DSS
(V = 16 Vdc, V = 0 Vdc, T = 25°C)
−
−
−
−
1.0
10
DS
GS
J
(V = 16 Vdc, V = 0 Vdc, T = 125°C)
DS
GS
J
Gate−Body Leakage Current
(V 12 Vdc, V = 0 Vdc)
I
nAdc
GSS
=
−
−
100
GS
DS
ON CHARACTERISTICS
Gate Threshold Voltage
V
Vdc
mV/°C
W
GS(th)
(V = V , I = 250 mAdc)
0.6
−
0.75
3.0
1.2
−
DS
GS
D
Temperature Coefficient (Negative)
Static Drain−to−Source On−State Resistance
R
DS(on)
(V = 4.5 Vdc, I = 7.0 Adc)
−
−
−
0.017
0.022
0.022
0.022
0.030
0.030
GS
D
(V = 2.5 Vdc, I = 7.0 Adc)
GS
D
(V = 2.5 Vdc, I = 3.5 Adc)
GS
D
Forward Transconductance (V = 10 Vdc, I = 7.0 Adc)
g
FS
−
19.2
−
Mhos
pF
DS
D
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
C
−
−
−
630
260
95
−
−
−
iss
(V = 16 Vdc, V = 0 Vdc,
DS
GS
C
oss
f = 1.0 MHz)
C
rss
SWITCHING CHARACTERISTICS (Notes 4 and 5)
Turn−On Delay Time
t
−
−
−
−
−
−
−
8.0
25
−
−
ns
d(on)
Rise Time
t
r
(V = 16 Vdc, I = 7.0 Adc,
DD
GS
D
V
= 4.5 Vdc, R = 6.0 W)
G
Turn−Off Delay Time
Fall Time
t
60
−
d(off)
t
f
65
−
Gate Charge
Q
12.5
1.0
5.0
17
−
nC
tot
gs
gd
(V = 16 Vdc,
DS
GS
V
= 4.5 Vdc,
= 7.0 Adc)
Q
Q
I
D
−
BODY−DRAIN DIODE RATINGS (Note 4)
Forward On−Voltage
(I = 7.0 Adc, V = 0 Vdc)
V
−
−
−
−
−
0.82
35
1.2
−
Vdc
ns
S
GS
SD
Reverse Recovery Time
t
rr
(I = 7.0 Adc, V = 0 Vdc,
S
GS
t
15
−
a
dI /dt = 100 A/ms)
S
t
20
−
b
Reverse Recovery Stored Charge
Q
0.02
−
mC
RR
4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
5. Switching characteristics are independent of operating junction temperature.
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2
NTQD6968N
14
12
10
8
14
V
DS
≥ 10 V
V
= 10, 5, 3 and 2.2 V resp. T = 25°C
J
GS
12
10
8
1.8 V
1.6 V
6
6
1.4 V
1.2 V
T = 125°C
J
4
4
T = 25°C
J
2
2
0
T = −55°C
J
0
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
0
0.5
1
1.5
2
2.5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.03
0.02
0.04
0.035
0.03
T = 25°C
J
I
= 7.0 A
D
T = 25°C
J
0.025
0.02
V
= 2.5 V
GS
0.01
0
0.015
0.01
V
= 4.5 V
8
GS
0
2
4
6
8
10
2
4
6
10
12
14
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
I , DRAIN CURRENT (AMPS)
D
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
100000
10000
2
1.5
1
V
GS
= 0 V
I
V
= 3.5 A
D
= 4.5 V
GS
T = 150°C
J
1000
100
T = 125°C
J
0.5
0
−50 −25
0
25
50
75
100
125
150
0
4
8
12
16
20
T , JUNCTION TEMPERATURE (°C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
NTQD6968N
5
3000
2500
2000
V
= 0 V
V
= 0 V
T = 25°C
DS
GS
J
Q
T
C
C
4
3
2
1
iss
rss
V
GS
1500
1000
500
0
Q
Q
2
1
C
iss
C
I
D
= 7.0 A
oss
C
rss
T = 25°C
J
0
0
10
5
0
5
10
15
20
2.5
5
7.5
10
12.5
V
GS
V
DS
Q , TOTAL GATE CHARGE (nC)
g
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage
versus Total Charge
1.4
1.2
1
1000
V
I
= 16 V
= 7.0 A
= 4.5 V
V
= 0 V
DD
GS
T = 25°C
J
D
V
GS
100
10
1
t
f
0.8
0.6
0.4
0.2
0
t
d(off)
t
r
t
d(on)
1
10
R , GATE RESISTANCE (W)
100
0.5
0.525
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
SD
0.55
0.575
0.6
V
G
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
100
V
GS
= 20 V
T = 25°C
C
SINGLE PULSE
100 ms
10
1
1 ms
di/dt
I
S
10 ms
t
rr
t
a
t
b
TIME
dc
0.1
R
Limit
DS(on)
0.25 I
t
p
S
Thermal Limit
Package Limit
I
S
0.01
0.1
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Diode Reverse Recovery Waveform
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4
NTQD6968N
10
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.001
Single Pulse
0.0001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
t, TIME (s)
Figure 13. Thermal Response
http://onsemi.com
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−8
CASE 948S−01
ISSUE C
DATE 20 JUN 2008
SCALE 2:1
8x K REF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
V
0.10 (0.004)
T
U
S
0.20 (0.008) T
U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
8
5
4
2X L/2
B
−U−
J
J1
L
1
PIN 1
IDENT
K1
K
S
U
0.20 (0.008) T
A
SECTION N−N
−V−
MILLIMETERS
INCHES
MIN
0.114
DIM MIN
MAX
MAX
0.122
0.177
0.043
0.006
0.028
A
B
2.90
4.30
---
3.10
−W−
4.50 0.169
1.10 ---
C
C
0.076 (0.003)
D
0.05
0.50
0.15 0.002
0.70 0.020
F
DETAIL E
SEATING
PLANE
D
−T−
G
G
J
0.65 BSC
0.026 BSC
0.09
0.09
0.19
0.19
0.20 0.004
0.16 0.004
0.30 0.007
0.25 0.007
0.008
0.006
0.012
0.010
J1
K
0.25 (0.010)
N
K1
L
6.40 BSC
0.252 BSC
0
M
M
0
8
8
_
_
_
_
N
GENERIC
MARKING DIAGRAM*
F
XXX
YWW
A G
DETAIL E
G
XXX = Specific Device Code
A
Y
= Assembly Location
= Year
WW = Work Week
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
98AON00697D
ON SEMICONDUCTOR STANDARD
DOCUMENT NUMBER:
STATUS:
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
NEW STANDARD:
DESCRIPTION: TSSOP−8
PAGE 1 OF2
DOCUMENT NUMBER:
98AON00697D
PAGE 2 OF 2
ISSUE
REVISION
DATE
O
A
B
RELEASED FOR PRODUCTION.
18 APR 2000
13 JAN 2006
13 MAR 2006
ADDED MARKING DIAGRAM INFORMATION. REQ. BY V. BASS.
CORRECTED MARKING DIAGRAM PIN 1 LOCATION AND MARKING. REQ. BY C.
REBELLO.
C
REMOVED EXPOSED PAD VIEW AND DIMENSIONS P AND P1. CORRECTED
MARKING INFORMATION. REQ. BY C. REBELLO.
20 JUN 2008
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
© Semiconductor Components Industries, LLC, 2008
Case Outline Number:
June, 2008 − Rev. 01C
948S
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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