NTR4518NT1G [ONSEMI]
TRANSISTOR SMALL SIGNAL, FET, FET General Purpose Small Signal;
| 型号： | NTR4518NT1G |
| 厂家： | 
ONSEMI |
| 描述： | TRANSISTOR SMALL SIGNAL, FET, FET General Purpose Small Signal |
| 文件： | 总6页 (文件大小：68K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NTR4518N
Power MOSFET
30 V, 2.5 A, Single N−Channel, SOT−23
Features
• Leading Planar Technology for Low Gate Charge / Fast Switching
• 4.5 V Rated for Low Voltage Gate Drive
• SOT−23 Surface Mount for Small Footprint (3 x 3 mm)
• This is a Pb−Free Device
http://onsemi.com
V
R
TYP
I MAX
D
(BR)DSS
DS(on)
Applications
85 mW @ 10 V
• DC−DC Conversion
• Load/Power Switch for Portables
• Load/Power Switch for Computing
30 V
2.5 A
105 mW @ 4.5 V
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
N−Channel
Parameter
Drain−to−Source Voltage
Symbol Value
Unit
V
D
V
DSS
30
20
Gate−to−Source Voltage
V
GS
V
Continuous Drain
Current (Note 1)
Steady T = 25°C
I
2.0
1.5
2.5
0.73
A
A
D
State
G
T = 85°C
A
t ≤ 10 s T = 25°C
A
S
Power Dissipation
(Note 1)
Steady T = 25°C
P
W
A
A
D
State
Continuous Drain
Current (Note 2)
Steady T = 25°C
I
D
1.5
1.1
A
MARKING DIAGRAM/
PIN ASSIGNMENT
3
State
T = 85°C
A
Drain
3
Power Dissipation
(Note 2)
T = 25°C
A
P
D
0.42
W
1
2
TR3 M G
Pulsed Drain Current
t = 10 ms
I
6.0
A
V
p
DM
SOT−23
CASE 318
STYLE 21
G
ESD Capability (Note 3)
C = 100 pF,
RS = 1500 W
ESD
125
2
1
Gate
Source
Operating Junction and Storage Temperature
T ,
−55 to
150
°C
J
T
stg
TR3
M
= Device Code
= Date Code*
Source Current (Body Diode)
I
S
2.0
A
G
= Pb−Free Package
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
T
L
260
°C
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
This document contains information on a product under development.
ON Semiconductor reserves the right to change or discontinue this
product without notice.
†
Device
NTR4518NT1G
Package
Shipping
SOT−23
3000/Tape & Reel
This document, and the information contained herein, is CONFIDENTIAL AND
PROPRIETARY and the property of Semiconductor Components Industries,
LLC., dba ON Semiconductor. It shall not be used, published, disclosed or
disseminated outside of the Company, in whole or in part, without the written
permission of ON Semiconductor. Reverse engineering of any or all of the
information contained herein is strictly prohibited.
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
E 2006, SCILLC. All Rights Reserved.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
November, 2006 − Rev. 0
NTR4518N/D
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
NTR4518N
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
170
100
300
Unit
Junction−to−Ambient − Steady State (Note 1)
Junction−to−Ambient − t < 10 s (Note 1)
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
q
q
JA
JA
JA
R
R
1. Surface−mounted on FR4 board using 1 in sq pad size.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
3. ESD Rating Information: HBM Class 0.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
V
= 0 V, I = 250 mA
30
36
V
(BR)DSS
GS
D
I
V
= 0 V, V = 24 V
1.0
10
mA
DSS
GS
DS
V
GS
= 0 V, V = 24 V, T = 125°C
DS J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = "20 V
"100
nA
GSS
DS
GS
V
V
= V , I = 250 mA
1.0
1.75
85
3.0
110
140
V
GS(TH)
GS
DS
D
Drain−to−Source On−Resistance
R
V
= 10 V, I = 2.5 A
mW
DS(on)
GS
GS
DS
D
V
V
= 4.5 V, I = 2.0 A
105
5.3
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
= 4.5 V, I = 2.5 A
S
FS
D
C
135
52
pF
iss
V
= 0 V, f = 1.0 MHz,
GS
Output Capacitance
C
oss
V
DS
= 15 V
Reverse Transfer Capacitance
Input Capacitance
C
15
rss
C
130
42
250
75
pF
nC
iss
V
= 0 V, f = 1.0 MHz,
= 24 V
GS
Output Capacitance
C
oss
V
DS
Reverse Transfer Capacitance
Total Gate Charge
C
13
25
rss
Q
Q
3.6
0.3
0.6
0.7
1.9
0.3
0.6
0.9
7.0
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
Q
G(TH)
V
GS
= 10 V, V = 15 V,
DS
I
D
= 2.5 A
Q
GS
GD
Q
nC
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Q
G(TH)
V
GS
= 4.5 V, V = 24 V,
DS
I
D
= 2.5 A
Q
GS
GD
Q
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
t
5.8
5.8
14
12
10
25
5.0
ns
ns
d(on)
t
r
V
V
= 10 V, V = 15 V,
DD
GS
I
= 1 A, R = 6 W
D
G
Turn−Off Delay Time
Fall Time
t
t
t
d(off)
t
f
1.6
4.8
6.7
13.6
1.8
Turn−On Delay Time
Rise Time
d(on)
t
r
= 10 V, V = 24 V,
GS
DD
I
= 2.5 A, R = 2.5 W
D
G
Turn−Off Delay Time
Fall Time
d(off)
t
f
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2
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
NTR4518N
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
DRAIN−SOURCE DIODE CHARACTERISTICS
Symbol
Test Conditions
Min
Typ
Max
Units
Forward Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
V
= 0 V, I = 2.0 A
0.85
9.2
1.2
V
SD
RR
GS
S
t
ns
nC
V
GS
= 0 V, I = 2.0 A,
S
dI /dt = 100 A/ms
S
Q
4.0
RR
4. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
3
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
NTR4518N
TYPICAL PERFORMANCE CURVES
10
10 V
6 V
4 V
3.8 V
3.6 V
V
≥ 10 V
DS
T = 25°C
J
5 V
4.5 V
4.2 V
8
6
4
8
4
0
3.4 V
3.2 V
100°C
3 V
2.8 V
2.6 V
25°C
2
0
T = −55°C
J
0
1
2
3
4
2
3
4
5
6
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.12
0.3
0.25
0.2
I
= 2.5 A
D
T = 25°C
J
T = 25°C
J
0.11
0.10
0.09
V
GS
= 4.5 V
0.15
0.1
0.08
0.07
0.05
0
V
GS
= 10 V
4
2
3
5
6
2
3
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
I
D,
DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1000
100
10
1.8
V
GS
= 0 V
I
V
= 2.5 A
D
= 10 V
GS
1.6
T = 150°C
J
1.4
1.2
1.0
0.8
0.6
T = 100°C
J
1
−50 −25
0
25
50
75
100
125 150
5
10
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
15
20
25
30
T , JUNCTION TEMPERATURE (°C)
V
J
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
NTR4518N
TYPICAL PERFORMANCE CURVES
300
200
15
15
V
GS
= 0 V
V
= 0 V
T = 25°C
J
DS
V
DS
C
iss
Q
G
10
10
C
rss
V
I
GS
5
0
100
0
5
0
Q
Q
GD
GS
= 2.5 A
D
C
oss
T = 25°C
J
10
5
0
5
10
15
20
25
30
0
1
2
3
4
V
GS
V
DS
Q , TOTAL GATE CHARGE (nC)
G
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 7. Capacitance Variation
100
3
2
V
I
= 24 V
= 2.5 A
= 10 V
V
GS
= 0 V
DD
T = 25°C
J
D
V
GS
t
d(off)
t
f
10
t
d(on)
t
r
1
0
1
1
10
R , GATE RESISTANCE (OHMS)
100
0.3
0.5
0.6
0.7
0.8
0.9
1
0.4
V
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
G
SD
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
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5
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
NTR4518N
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AN
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
D
SEE VIEW C
3
4. 318−01 THRU −07 AND −09 OBSOLETE, NEW
STANDARD 318−08.
H
E
E
MILLIMETERS
INCHES
DIM
A
A1
b
c
D
E
e
L
L1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
NOM
1.00
0.06
0.44
0.13
2.90
1.30
1.90
0.20
0.54
2.40
MAX
MIN
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
c
1.11
0.10
0.50
0.18
3.04
1.40
2.04
0.30
0.69
2.64
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
1
2
b
0.25
e
q
A
H
E
L
STYLE 21:
A1
L1
VIEW C
PIN 1. GATE
2. SOURCE
3. DRAIN
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
mm
inches
ǒ
Ǔ
SCALE 10:1
0.8
0.031
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
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NTR4518N/D
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