NUP2201MR6 [ONSEMI]
Low Capacitance TSOP-6 Diode-TVS Array for High Speed Data Lines Protection; 低电容TSOP - 6二极管TVS阵列的高速数据线路保护
| 型号： | NUP2201MR6 |
| 厂家： | 
ONSEMI |
| 描述： | Low Capacitance TSOP-6 Diode-TVS Array for High Speed Data Lines Protection |
| 文件： | 总4页 (文件大小：42K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NUP2201MR6
Low Capacitance TSOP−6
Diode−TVS Array for High
Speed Data Lines
Protection
The NUP2201MR6 transient voltage suppressor is designed to
protect high speed data lines from ESD, EFT, and lighting.
http://onsemi.com
TSOP−6 LOW CAPACITANCE
DIODE TVS ARRAY
500 WATTS PEAK POWER
6 VOLTS
Features:
• Low Capacitance (3 pF Maximum Between I/O Lines)
• ESD Rating of Class 3B (Exceeding 8 kV) per Human Body model
and Class C (Exceeding 400 V) per Machine Model
• Protection for the Following IEC Standards:
IEC 61000−4−2 (ESD) 15 kV (air) 8 kV (contact)
IEC 61000−4−4 (EFT) 40 A (5/50 ns)
PIN CONFIGURATION
AND SCHEMATIC
IEC 61000−4−5 (lighting) 23 A (8/20 ms)
I/O 1
6 I/O
5 V
• UL Flammability Rating of 94 V−0
V
N
2
P
Typical Applications:
• High Speed Communication Line Protection
• USB 1.1 and 2.0 Power and Data Line Protection
• Digital Video Interface (DVI)
N/C 3
4 N/C
• Monitors and Flat Panel Displays
• Pb−Free Package May be Available. The G−Suffix Denotes a
Pb−Free Lead Finish
6
1
TSOP−6
CASE 318G
PLASTIC
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Rating
Symbol
Value
Unit
Peak Power Dissipation
P
pk
500
W
8 x 20 mS @ T = 25°C (Note 1)
A
MARKING DIAGRAM
Operating Junction Temperature Range
Storage Temperature Range
T
−40 to +125
−55 to +150
235
°C
°C
°C
J
T
stg
M
62
Lead Solder Temperature −
Maximum (10 Seconds)
T
L
Human Body Model (HBM)
Machine Model (MM)
IEC 61000−4−2 Air (ESD)
IEC 61000−4−2 Contact (ESD)
ESD
16000
400
20000
20000
V
62 = Specific Device Code
M
= Date Code
1. Non−repetitive current pulse per Figure 1 (Pin 5 to Pin 2)
ORDERING INFORMATION
†
Device
NUP2201MR6T1
Package
Shipping
TSOP−6 3000/Tape & Reel
NUP2201MR6T1G TSOP−6 3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2003
1
Publication Order Number:
November, 2003 − Rev. 1
NUP2201MR6/D
NUP2201MR6
ELECTRICAL CHARACTERISTICS (T =25°C unless otherwise specified)
J
Parameter
Reverse Working Voltage
Breakdown Voltage
Symbol
Conditions
Min
Typ
Max
Unit
V
V
RWM
(Note 2)
I =1 mA, (Note 3)
5.0
V
BR
6.0
V
T
Reverse Leakage Current
Clamping Voltage
I
V
= 5 V
5.0
12.5
20
mA
V
R
RWM
V
I
PP
I
PP
= 5 A (Note 4)
= 8 A (Note 4)
C
C
Clamping Voltage
V
V
Maximum Peak Pulse Current
Junction Capacitance
Junction Capacitance
I
8x20 ms Waveform
25
A
PP
C
C
V
= 0 V, f=1 MHz between I/O Pins and GND
= 0 V, f=1 MHz between I/O Pins
3.0
1.5
5.0
3.0
pF
pF
J
J
R
R
V
2. TVS devices are normally selected according to the working peak reverse voltage (V
or continuous peak operating voltage level.
), which should be equal or greater than the DC
RWM
3. V is measured at pulse test current I .
BR
T
4. Non−repetitive current pulse per Figure 1 (Pin 5 to Pin 2)
TYPICAL PERFORMANCE CURVES
(T = 25°C unless otherwise noted)
J
100
90
80
70
60
50
40
30
20
10
0
100
t
r
PEAK VALUE I
@ 8 ms
RSM
90
80
70
60
50
40
30
PULSE WIDTH (t ) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
P
HALF VALUE I
/2 @ 20 ms
RSM
t
P
20
10
0
0
25
50
75
100
125
150
175
200
0
20
40
t, TIME (ms)
60
80
T , AMBIENT TEMPERATURE (°C)
A
Figure 1. Pulse Derating Curve
Figure 2. 8 × 20 ms Pulse Waveform
5.0
4.5
4.0
3.5
3.0
20
18
16
14
12
I/O−Ground
I/O lines
2.5
2.0
1.5
1.0
0.5
0.0
10
8
6
4
2
0
0
1
2
3
4
5
0
10
20
30
40
50
V
BR
, REVERSE VOLTAGE (V)
PEAK PULSE CURRENT (A)
Figure 3. Junction Capacitance vs Reverse Voltage
Figure 4. Clamping Voltage vs. Peak Pulse Current
(8 x 20 ms Waveform)
http://onsemi.com
2
NUP2201MR6
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
A
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
L
6
5
2
4
B
S
1
3
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
D
G
A
B
C
D
G
H
J
K
L
M
S
2.90
1.30
0.90
0.25
0.85
3.10 0.1142 0.1220
1.70 0.0512 0.0669
1.10 0.0354 0.0433
0.50 0.0098 0.0197
1.05 0.0335 0.0413
M
J
0.013 0.100 0.0005 0.0040
C
0.05 (0.002)
0.10
0.20
1.25
0
0.26 0.0040 0.0102
0.60 0.0079 0.0236
1.55 0.0493 0.0610
K
H
10
0
10
_
_
_
_
2.50
3.00 0.0985 0.1181
SOLDERING FOOTPRINT*
2.4
0.094
0.95
0.037
1.9
0.075
0.95
0.037
0.7
0.028
1.0
0.039
Figure 5. TSOP−6
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
3
NUP2201MR6
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
NUP2201MR6/D
相关型号：
©2020 ICPDF网 联系我们和版权申明