NVMFS3D6N10MCLT1G [ONSEMI]
Single N-Channel Power MOSFET 100 V, 131 A, 3.6mΩ;
| 型号： | NVMFS3D6N10MCLT1G |
| 厂家： | 
ONSEMI |
| 描述： | Single N-Channel Power MOSFET 100 V, 131 A, 3.6mΩ |
| 文件： | 总8页 (文件大小：403K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET - Power, Single
N-Channel
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
3.6 mW @ 10 V
5.8 mW @ 4.5 V
100 V
132 A
100 V, 3.6 mW, 132 A
NVMFS3D6N10MCL
D (5,6)
Features
• Small Footprint (5x6 mm) for Compact Design
G (4)
• Low R
to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
G
S (1,2,3)
• NVMFWS3D6N10MCL − Wettable Flank Option for Enhanced
Optical Inspection
N−CHANNEL MOSFET
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
1
Parameter
Drain−to−Source Voltage
Symbol
Value
100
20
Unit
V
DFN5 5x6, 1.27P (SO−8FL)
V
DSS
CASE 488AA
Gate−to−Source Voltage
V
GS
V
Continuous Drain
Current R
T
= 25°C
I
D
132
A
C
Steady
State
q
JC
T
C
= 100°C
84
(Notes 1, 3)
Power Dissipation
T
= 25°C
P
139
56
W
A
C
D
D
Steady
State
R
(Note 1)
q
JC
T
C
= 100°C
DFNW5 5x6 (FULL−CUT SO8FL WF)
Continuous Drain
Current R
T = 25°C
A
I
D
20
Steady
State
CASE 507BA
q
JA
T = 100°C
A
13
(Notes 1, 2, 3)
Power Dissipation
T = 25°C
A
P
3.2
1.3
888
W
Steady
State
R
(Notes 1, 2)
q
JA
T = 100°C
A
MARKING DIAGRAM
Pulsed Drain Current
T = 25°C, t = 10 ms
I
A
A
p
DM
D
Operating Junction and Storage Temperature
Range
T , T
−55 to
°C
S
S
S
G
D
D
J
stg
+175
XXXXXX
AYWZZ
Source Current (Body Diode)
IS
116
739
A
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
D
Energy (I = 9.2 A)
AS
XXXXXX = Specific Device Code
Lead Temperature for Soldering Purposes
T
260
°C
L
A
Y
= Assembly Location
= Year
(1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
W
ZZ
= Work Week
= Lot Traceability
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
0.9
Unit
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
R
39
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
April, 2022 − Rev. 4
NVMFS3D6N10MCL/D
NVMFS3D6N10MCL
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
100
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
60
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
DS
= 0 V,
T = 25 °C
1.0
250
100
DSS
GS
J
V
= 100 V
mA
T = 125°C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
nA
GSS
DS
GS
GS
V
V
= V , I = 270 mA
1
1.5
−5.0
3.0
3
V
GS(TH)
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
J
mV/°C
GS(TH)
R
V
GS
= 10 V
I
I
= 48 A
= 39 A
3.6
5.8
DS(on)
D
mW
V
GS
= 4.5 V
4.4
D
Forward Transconductance
g
FS
V
DS
=5 V, I = 48 A
163
S
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
4411
1808
29
29
60
6
ISS
Output Capacitance
C
OSS
C
RSS
V
= 0 V, f = 1 MHz, V = 50 V
pF
GS
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
Q
V
GS
= 4.5 V, V = 50 V; I = 48 A
nC
nC
G(TOT)
G(TOT)
DS
D
Total Gate Charge
V
GS
= 10 V, V = 50 V; I = 48 A
DS D
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
G(TH)
Q
10
7
nC
V
GS
GD
GP
V
GS
= 10 V, V = 50 V; I = 48 A
DS
D
Q
V
3
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
14.6
7
d(ON)
Rise Time
t
r
V
= 10 V, V = 50 V,
DS
GS
D
ns
V
I
= 48 A, R = 6.0 W
G
Turn−Off Delay Time
t
62.3
20.2
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Source to Drain Diode Forward Voltage
V
SD
V
= 0 V, I = 2 A
0.65
0.83
1.2
1.3
GS
S
V
GS
= 0 V, I = 48 A
S
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
t
34
73
ns
nC
ns
rr
I = 24 A, di/dt = 300 A/ms
F
Q
rr
t
rr
28
I = 24 A, di/dt = 1000 A/ms
F
Q
183
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS3D6N10MCL
TYPICAL CHARACTERISTICS
300
250
200
150
100
300
6.0 V
10 V
V
GS
= 4.5 V
T = 25°C
J
250
200
150
100
3.5 V
8.0 V
3.0 V
T = 175°C
J
50
0
50
0
V
DS
= 5 V
6
T = −55°C
J
0
1
2
3
4
5
1
0
5
2
3
4
5
7
V
, DRAIN−TO−SOURCE VOLTAGE (V)
V
, GATE−TO−SOURCE VOLTAGE (V)
DS
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
8
20
16
12
8
I
D
= 48 A
V
GS
= 4.5 V
6
4
V
GS
= 10 V
T = 25°C
J
2
0
4
0
0
1
2
3
4
5
6
7
8
9
10
50
100
150
200
150
300
V
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
GS
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current
Voltage
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
1E−03
1E−04
1E−05
1E−06
1E−07
1E−08
I
V
= 48 A
= 10 V
D
T = 175°C
J
GS
T = 150°C
J
T = 125°C
J
T = 100°C
J
T = 85°C
J
T = 55°C
J
T = 25°C
J
1E−09
1E−10
0.8
0.6
−75 −50 −25
0
25 50 75 100 125 150 175
25
45
65
85
T , JUNCTION TEMPERATURE (°C)
J
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NVMFS3D6N10MCL
TYPICAL CHARACTERISTICS
10K
1K
10
C
ISS
Q
G(tot)
8
C
OSS
6
4
100
C
RSS
Q
Q
GD
GS
10
1
V
I
= 50 V
= 48 A
2
0
V
= 0 V
DS
GS
f = 1 MHz
D
T = 25°C
J
V
DS
= 50 V
0.1
1
10
100
0
10
20
30
40
50
60
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
1000
V
V
= 10 V
= 50 V
= 48 A
V
GS
= 0 V
GS
t
t
d(off)
100
10
1
DS
I
D
t
f
100
t
r
d(on)
T = 175°C
J
0.1
10
1
0.01
T = 25°C
J
T = −55°C
J
0.001
0
10
20
30
40
50
0
0.2
0.4
0.6
0.8
1.0
1.2
R , GATE RESISTANCE (W)
G
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
100
T
= 25°C
J(initial)
10
T
C
= 25°C
Single Pulse
≤ 10 V
T
= 100°C
J(initial)
V
GS
10 ms
1
0.5 ms
1 ms
10 ms
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
1
0.1
1
10
100
1000
0.00001
0.0001
0.001
0.01
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
NVMFS3D6N10MCL
TYPICAL CHARACTERISTICS
100
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
0.1
Single Pulse
0.000001 0.00001 0.0001
0.01
0.001
0.01
0.1
1
10
100
1000
t, PULSE TIME (s)
Figure 13. Junction−to−Ambient Transient Thermal Response
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NVMFS3D6N10MCLT1G
3D6L10
DFN5 5x6, 1.27P
1500 / Tape & Reel
1500 / Tape & Reel
(Pb−Free)
NVMFWS3D6N10MCLT1G
3D6W10
DFNW5, 5x6
(FULL−CUT SO8FL WF)
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX = Specific Device Code
A
Y
= Assembly Location
= Year
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1. ANODE
2. ANODE
2X
0.905
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
DIMENSIONS: MILLIMETERS
4X
0.750
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFNW5 5x6 (FULL−CUT SO8FL WF)
CASE 507BA
ISSUE A
DATE 03 FEB 2021
q
q
GENERIC
MARKING DIAGRAM*
1
XXXXXX
AYWZZ
XXXXXX = Specific Device Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
A
Y
= Assembly Location
= Year
W
ZZ
= Work Week
= Lot Traceability
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON26450H
DFNW5 5x6 (FULL−CUT SO8FL WF)
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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