NVMFS4C310NT1G [ONSEMI]
Power MOSFET30 V, 51 A, Single N−Channel, SO−8 FL;
| 型号： | NVMFS4C310NT1G |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET30 V, 51 A, Single N−Channel, SO−8 FL |
| 文件： | 总8页 (文件大小：288K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET - Power, Single
N-Channel, DFN5/DFNW5
30 V, 6.0 mW, 51 A
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
6.0 mW @ 10 V
9.0 mW @ 4.5 V
30 V
51 A
D (5−8)
NVMFS4C310N
Features
• Low R
to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
DS(on)
G (4)
• Optimized Gate Charge to Minimize Switching Losses
S (1,2,3)
N−CHANNEL MOSFET
• AEC−Q101 Qualified and PPAP Capable
• NVMFS4C310NWF − Wettable Flanks Option for Enhanced Optical
Inspection
MARKING
DIAGRAM
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
DFN5
D
CASE 488AA
S
S
S
G
D
D
1
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
XXXXXX
AYWZZ
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Symbol
Value
30
Unit
V
DFNW5
CASE 507BA
V
DSS
D
V
GS
20
V
4C10N = Specific Device Code for
NVMFS4C310N
4C10WF= Specific Device Code of
NVMFS4C310NWF
Continuous Drain
Current R
T = 25°C
17
A
A
I
D
q
JA
T = 100°C
A
12
(Notes 1, 2 and 4)
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceabililty
Power Dissipation
T = 25°C
3.5
W
A
R
(Notes 1, 2
P
q
JA
D
and 4)
Steady
State
Continuous Drain
Current R
T
C
= 25°C
51
36
q
JC
I
D
A
(Notes 1, 2, 3
and 4)
T
C
= 100°C
ORDERING INFORMATION
†
Device
Package
Shipping
Power Dissipation
T
C
= 25°C
P
D
32
W
R
(Notes 1, 2, 3
q
JC
NVMFS4C310NT1G
DFN5
1500 /
and 4)
(Pb−Free) Tape & Reel
Pulsed Drain
Current
T = 25°C, t = 10 ms
I
DM
132
A
A
p
NVMFS4C310NWFT1G DFNW5 1500 /
(Pb−Free) Tape & Reel
Operating Junction and Storage
Temperature
T ,
STG
−55 to
°C
J
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
T
+175
Source Current (Body Diode)
I
S
21
31
A
Single Pulse Drain−to−Source Avalanche
Energy (I = 25 A ) (Note 3)
E
AS
mJ
L
pk
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using 650 mm , 2 oz Cu pad.
3. Assumes heat−sink sufficiently large to maintain constant case temperature
independent of device power.
4. Continuous DC current rating. Maximum current for pulses as long as one
second is higher but dependent on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
April, 2023 − Rev. 1
NVMFS4C310N/D
NVMFS4C310N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Case (Drain)
R
4.7
43
q
JC
°C/W
Junction−to−Ambient –
Steady State (Note 5)
R
q
JA
2
5. Surface−mounted on FR4 board using 650 mm , 2 oz Cu pad.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
30
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
14.5
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
= 24 V
T = 25°C
1.0
10
DSS
GS
DS
J
V
mA
T = 125°C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
100
nA
GSS
DS
GS
GS
V
V
= V , I = 250 mA
1.3
2.2
V
GS(TH)
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
4.7
5.0
7.5
43
mV/°C
GS(TH)
J
R
V
= 10 V
I
I
= 30 A
= 30 A
6.0
9.0
DS(on)
GS
D
mW
V
GS
= 4.5 V
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
V
= 1.5 V, I = 15 A
S
DS
D
C
1000
580
160
9.7
ISS
Output Capacitance
C
C
V
= 0 V, f = 1 MHz, V = 15 V
pF
nC
OSS
RSS
GS
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Gate Plateau Voltage
Total Gate Charge
Q
1.5
G(TH)
Q
2.8
V
= 4.5 V, V = 15 V; I = 30 A
DS D
GS
GD
GP
GS
Q
V
4.8
3.2
V
Q
V
= 10 V, V = 15 V; I = 30 A
18.6
nC
G(TOT)
GS
DS
D
SWITCHING CHARACTERISTICS (Note 7)
Turn−On Delay Time
Rise Time
t
9.0
34
d(ON)
t
r
V
= 4.5 V, V = 15 V,
DS
GS
D
ns
ns
V
I
= 15 A, R = 3.0 W
G
Turn−Off Delay Time
Fall Time
t
14
d(OFF)
t
f
7.0
7.0
26
Turn−On Delay Time
Rise Time
t
d(ON)
t
r
V
= 10 V, V = 15 V,
DS
GS
I
D
= 15 A, R = 3.0 W
G
Turn−Off Delay Time
Fall Time
t
18
d(OFF)
t
f
4.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
T = 25°C
0.80
0.67
1.1
J
V
S
= 0 V,
= 10 A
GS
I
T = 125°C
J
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2
NVMFS4C310N
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
DRAIN−SOURCE DIODE CHARACTERISTICS
Reverse Recovery Time
Charge Time
Symbol
Test Condition
Min
Typ
Max
Unit
t
26.7
14.1
12.6
13.7
RR
t
a
ns
V
GS
= 0 V, dI /dt = 100 A/ms,
S
I
S
= 30 A
Discharge Time
t
b
Reverse Recovery Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
7. Switching characteristics are independent of operating junction temperatures.
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3
NVMFS4C310N
TYPICAL CHARACTERISTICS
80
65
60
55
50
45
40
35
30
25
20
15
10
4.0 V
4.2 V to 10 V
3.8 V
3.6 V
T = 25°C
J
V
= 5 V
DS
70
60
50
40
30
20
3.4 V
3.2 V
3.0 V
T = 125°C
J
2.8 V
2.6 V
T = 25°C
J
10
0
5
0
T = −55°C
J
0
1
2
3
4
5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, GATE−TO−SOURCE VOLTAGE (V)
V
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
DS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
I
D
= 30 A
T = 25°C
J
V
= 4.5 V
= 10 V
GS
V
GS
0.004
0.002
0.004
0.002
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
10
20
30
40
50
60
70
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. VGS
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.7
1.6
10000
1000
V
GS
= 0 V
I
V
= 30 A
D
T = 150°C
J
= 10 V
GS
1.5
1.4
T = 125°C
J
1.3
1.2
1.1
1.0
0.9
0.8
0.7
100
10
T = 85°C
J
−50 −25
0
25
50
75
100
125 150
5
10
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
15
20
25
30
T , JUNCTION TEMPERATURE (°C)
V
J
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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4
NVMFS4C310N
TYPICAL CHARACTERISTICS
10
1200
1000
Q
T
V
= 0 V
GS
9
8
C
iss
T = 25°C
J
7
6
800
600
400
C
oss
5
4
Q
gs
Q
gd
3
2
1
0
T = 25°C
J
V
V
= 15 V
= 10 V
C
DD
rss
200
0
GS
I
D
= 30 A
0
5
10
15
20
25
30
0
2
4
6
8
10 12 14 16 18 20
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
V
DD
= 15 V
I
D
= 15 A
V
GS
= 10 V
t
d(on)
100
t
r
t
d(off)
t
f
10
1
1
10
R , GATE RESISTANCE (W)
100
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
10
Duty Cycle = 50%
20%
10%
5%
2%
1%
1
0.1
Single Pulse
0.000001 0.00001
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 10. Thermal Response
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX = Specific Device Code
A
Y
= Assembly Location
= Year
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1. ANODE
2. ANODE
2X
0.905
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
DIMENSIONS: MILLIMETERS
4X
0.750
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFNW5 5x6 (FULL−CUT SO8FL WF)
CASE 507BA
ISSUE A
DATE 03 FEB 2021
q
q
GENERIC
MARKING DIAGRAM*
1
XXXXXX
AYWZZ
XXXXXX = Specific Device Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
A
Y
= Assembly Location
= Year
W
ZZ
= Work Week
= Lot Traceability
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON26450H
DFNW5 5x6 (FULL−CUT SO8FL WF)
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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