NVMFS5C677NLWFT1G [ONSEMI]
功率 MOSFET，单 N 沟道，60 V，36 A，15.0 mΩ;
| 型号： | NVMFS5C677NLWFT1G |
| 厂家： | 
ONSEMI |
| 描述： | 功率 MOSFET，单 N 沟道，60 V，36 A，15.0 mΩ |
| 文件： | 总7页 (文件大小：226K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NVMFS5C677NL
MOSFET – Power, Single
N-Channel
60 V, 15.0 mW, 36 A
Features
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• Small Footprint (5x6 mm) for Compact Design
• Low R
to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
G
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
• NVMFS5C677NLWF − Wettable Flank Option for Enhanced Optical
Inspection
15.0 mW @ 10 V
21.5 mW @ 4.5 V
60 V
36 A
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
D (5)
Parameter
Drain−to−Source Voltage
Symbol
Value
60
Unit
V
V
DSS
Gate−to−Source Voltage
V
GS
20
V
G (4)
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
I
36
A
C
D
q
JC
T
C
25
(Notes 1, 3)
Steady
State
S (1,2,3)
N−CHANNEL MOSFET
Power Dissipation
T
C
P
37
W
A
D
R
(Note 1)
q
JC
T
C
= 100°C
18
Continuous Drain
Current R
T = 25°C
A
I
D
11
q
JA
MARKING
DIAGRAM
T = 100°C
A
7.8
3.5
1.8
166
(Notes 1, 2, 3)
Steady
State
Power Dissipation
T = 25°C
A
P
W
D
D
1
R
(Notes 1 & 2)
q
JA
S
S
S
G
D
D
T = 100°C
A
XXXXXX
AYWZZ
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
A
p
Operating Junction and Storage Temperature
T , T
−55 to
+ 175
°C
J
stg
D
Source Current (Body Diode)
I
31
65
A
XXXXXX = 5C677L
XXXXXX = (NVMFS5C677NL) or
XXXXXX = 677LWF
S
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Energy (I
= 2.87 A)
L(pk)
XXXXXX = (NVMFS5C677NLWF)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
A
Y
= Assembly Location
= Year
W
ZZ
= Work Week
= Lot Traceability
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
Parameter
Symbol
Value
4.1
Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
R
43
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
July, 2019 − Rev. 0
NVMFS5C677NL/D
NVMFS5C677NL
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
60
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
26
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
T = 25 °C
10
DSS
GS
DS
J
V
= 60 V
mA
T = 125°C
J
250
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
nA
GSS
DS
GS
V
V
= V , I = 25 mA
1.2
2.0
V
GS(TH)
GS
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
−5.0
12.5
17.9
27.5
mV/°C
GS(TH)
J
R
V
= 10 V
I
I
= 10 A
= 10 A
15.0
21.5
DS(on)
GS
D
mW
V
GS
= 4.5 V
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
V
=15 V, I = 15 A
S
DS
D
C
620
340
7
ISS
Output Capacitance
C
C
V
= 0 V, f = 1 MHz, V = 25 V
pF
OSS
RSS
GS
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
V
= 4.5 V, V = 48 V; I = 10 A
4.5
9.7
1.3
2.1
1
nC
nC
G(TOT)
G(TOT)
GS
DS
D
Total Gate Charge
Q
V
= 10 V, V = 48 V; I = 10 A
DS D
GS
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
G(TH)
Q
nC
V
GS
GD
GP
V
= 10 V, V = 48 V; I = 10 A
GS
DS
D
Q
V
3.0
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
7
13
25
6
d(ON)
Rise Time
t
r
V
= 10 V, V = 48 V,
DS
GS
D
ns
V
I
= 10 A, R = 1 W
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.85
0.72
23.8
11.9
11.8
11.6
1.2
SD
J
V
S
= 0 V,
GS
I
= 10 A
T = 125°C
J
Reverse Recovery Time
Charge Time
t
RR
t
ns
a
V
GS
= 0 V, dIs/dt = 100 A/ms,
I
S
= 10 A
Discharge Time
t
b
Reverse Recovery Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS5C677NL
TYPICAL CHARACTERISTICS
40
35
30
25
20
15
10
5
30
V
GS
= 4.5 V to 10 V
V
DS
= 10 V
25
20
15
10
5
3.6 V
3.4 V
3.2 V
3.0 V
T = 25°C
J
2.8 V
2.6 V
T = 125°C
J
T = −55°C
J
0
0
0.0
0.5
1.0
1.5
2.0
2.5
0
1
2
3
4
5
6
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
40
35
30
25
20
15
10
26
T = 25°C
J
T = 25°C
D
J
24
22
20
18
16
14
I
= 10 A
V
= 4.5 V
GS
V
= 10 V
GS
12
10
3
4
5
6
7
8
9
10
10 12 14 16 18 20 22 24 26 28 30
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
10000
1000
2.1
1.9
1.7
1.5
1.3
1.1
V
I
= 10 V
= 10 A
T = 150°C
GS
J
D
T = 125°C
J
T = 85°C
J
100
10
0.9
0.7
5
15
25
35
45
55
−50 −25
0
25
50
75
100 125 150 175
T , JUNCTION TEMPERATURE (°C)
J
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NVMFS5C677NL
TYPICAL CHARACTERISTICS
1,000
100
10
V
= 48 V
DS
9
8
7
6
5
4
3
2
C
ISS
T = 25°C
J
I
D
= 10 A
C
OSS
Q
Q
GD
GS
10
1
C
V
= 0 V
RSS
GS
T = 25°C
J
1
0
f = 1 MHz
0
10
20
30
40
50
60
0
1
2
3
4
5
6
7
8
9
10
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
10
8
100
V
GS
= 0 V
t
t
d(off)
T = −55°C
J
T = 25°C
J
t
f
T = 125°C
J
t
r
6
10
d(on)
4
2
0
V
V
= 10 V
= 48 V
GS
DS
1
0
10
20
30
40
50
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
R , GATE RESISTANCE (W)
G
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
10
1000
100
10
T
V
= 25°C
C
≤ 10 V
GS
Single Pulse
1 ms
T (initial) = 25°C
J
10 ms
10 ms
T (initial) = 100°C
J
1
1
R
Limit
DS(on)
0.5 ms
100
Thermal Limit
Package Limit
0.1
0.1
0.00001
0.0001
0.001
0.01
0.1
1
10
1000
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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4
NVMFS5C677NL
TYPICAL CHARACTERISTICS
100
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NVMFS5C677NLT1G
5C677L
DFN5
1500 / Tape & Reel
1500 / Tape & Reel
(Pb−Free)
NVMFS5C677NLWFT1G
677LWF
DFN5
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX = Specific Device Code
A
Y
= Assembly Location
= Year
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1. ANODE
2. ANODE
2X
0.905
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
DIMENSIONS: MILLIMETERS
4X
0.750
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
PAGE 1 OF 1
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© Semiconductor Components Industries, LLC, 2018
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