NVTFS4C02N [ONSEMI]
MOSFET - Power, Single N-Channel, 8FL;
| 型号： | NVTFS4C02N |
| 厂家： | 
ONSEMI |
| 描述： | MOSFET - Power, Single N-Channel, 8FL |
| 文件： | 总7页 (文件大小：146K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET - Power, Single
N-Channel, m8FL
30 V, 2.25 mW, 162 A
NVTFS4C02N
Features
www.onsemi.com
• Low R
to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
DS(on)
• Optimized Gate Charge to Minimize Switching Losses
• NVTFS4C02NWF − Wettable Flanks Option for Enhanced Optical
Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
2.25 mW @ 10 V
3.1 mW @ 4.5 V
30 V
162 A
N−Channel MOSFET
D (5−8)
Applications
• Reverse Battery Protection
• DC−DC Converter Output Driver
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
G (4)
Parameter
Drain−to−Source Voltage
Symbol Value Unit
V
DSS
30
20
V
V
A
S (1,2,3)
Gate−to−Source Voltage
V
GS
Continuous Drain
T = 25°C
I
D
28.3
20
A
MARKING DIAGRAM
Current R
(Note 1)
q
JA
T = 100°C
A
1
1
S
S
S
G
D
D
D
D
Power Dissipation
(Note 2)
T = 25°C
P
3.2
W
W
A
A
D
4C02
AYWWG
G
WDFN8
(m8FL)
CASE 511AB
R
q
JA
T = 100°C
A
1.6
Steady
State
Continuous Drain
Current R (Note 1)
T
= 25°C
= 100°C
= 25°C
I
D
162
115
107
53.5
500
C
q
JC
T
C
4C02
= Specific Device Code
Power Dissipation
(Note 1)
T
C
P
D
W
W
A
02WF = Specific Device Code
of NVTFS4C02NWF
A
R
q
JC
T
C
= 100°C
= Assembly Location
= Year
= Work Week
Y
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
p
WW
G
Operating Junction and Storage Temperature
Range
T , T
−55 to
+175
°C
J
stg
= Pb−Free Package
(Note: Microdot may be in either location)
Source Current (Body Diode)
Drain to Source dV/dt
I
100
6.0
A
S
dV/dt
V/ns
mJ
ORDERING INFORMATION
Single Pulse Drain−to−Source Avalanche Energy
E
AS
162
†
(I = 37 A ) (Note 3)
Device
Package
Shipping
L
pk
Lead Temperature for Soldering Purposes
T
260
°C
NVTFS4C02NTAG
L
WDFN8 1500 / Tape &
(Pb−Free) Reel
(1/8″ from case for 10 s)
NVTFS4C02NWFTAG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
3. This is the absolute maximum ratings. Parts are 100% tested at T = 25°C,
J
V
GS
= 10 V, I = 36 A, E = 65 mJ.
L AS
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
September, 2020 − Rev. 0
NVTFS4C02N/D
NVTFS4C02N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
1.4
Unit
Junction−to−Case (Drain)
R
q
JC
°C/W
Junction−to−Ambient – Steady State
R
46
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
30
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
13.8
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
Zero Gate Voltage Drain Current
I
V
= 0 V,
T = 25°C
1.0
10
10
DSS
GS
DS
J
V
= 24 V
mA
T = 125°C
J
I
V
= 0 V,
= 30 V
T = 25°C
J
DSS
GSS
GS
DS
mA
V
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
100
2.2
nA
DS
GS
V
V
= V , I = 250 mA
1.3
1.6
5.0
1.9
2.7
140
0.9
V
GS(TH)
GS
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
J
mV/°C
GS(TH)
R
V
GS
= 10 V
I
I
= 20 A
= 20 A
2.25
3.1
DS(on)
D
mW
V
GS
= 4.5 V
D
Forward Transconductance
Gate Resistance
g
FS
V
= 1.5 V, I = 50 A
S
DS
D
R
W
G
CHARGES AND CAPACITANCES
Input Capacitance
C
2980
1200
55
ISS
Output Capacitance
Reverse Transfer Capacitance
Output Charge
C
V
GS
= 0 V, f = 1 MHz, V = 15 V
pF
nC
OSS
RSS
OSS
DS
C
Q
V
GS
= 0 V, V = 15 V
25
DD
Capacitance Ratio
C
/C
V
GS
= 0 V, V = 15 V, f = 1 MHz
0.018
20
RSS ISS
DS
Total Gate Charge
Q
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Gate Plateau Voltage
Total Gate Charge
Q
4.7
8.5
4
G(TH)
nC
Q
V
= 4.5 V, V = 15 V; I = 50 A
GS
GD
GP
GS
DS
D
Q
V
2.8
45
V
Q
V
= 10 V, V = 15 V; I = 50 A
nC
G(TOT)
GS
DS
D
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
t
12
116
25
d(ON)
t
r
V
= 4.5 V, V = 15 V,
DS
GS
D
ns
I
= 50 A, R = 3.0 W
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
10
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVTFS4C02N
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Symbol
Test Condition
Min
Typ
Max
Unit
t
9
102
33
6
d(ON)
Rise Time
t
r
V
= 10 V, V = 15 V,
DS
GS
D
ns
I
= 50 A, R = 3.0 W
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.8
0.6
42
21
21
28
1.1
SD
J
V
S
= 0 V,
GS
V
I
= 20 A
T = 125°C
J
Reverse Recovery Time
Charge Time
t
RR
t
ns
a
V
= 0 V, dI /dt = 100 A/ms,
S
GS
I
S
= 50 A
Discharge Time
t
b
Reverse Recovery Charge
Q
nC
RR
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
NVTFS4C02N
TYPICAL CHARACTERISTICS
160
160
140
120
100
80
3.4 V to 10 V
3.2 V
140
120
100
80
V
DS
= 10 V
3.0 V
2.8 V
60
60
T = 25°C
J
40
40
2.6 V
20
0
20
0
V
= 2.4 V
GS
T = 125°C
J
T = −55°C
J
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, DRAIN−TO−SOURCE VOLTAGE (V)
1.0
1.5
2.0
2.5
3.0
3.5
V
DS
V
, GATE−TO−SOURCE VOLTAGE (V)
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
3.5
3.0
2.5
2.0
6
5
4
3
2
T = 25°C
J
T = 25°C
D
J
V
= 4.5 V
GS
I
= 20 A
V
= 10 V
GS
1.5
1.0
1
0
3
4
5
6
7
8
9
10
20
40
60
80
100
120
140
160
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
2
100K
10K
1K
V
= 10 V
= 20 A
GS
1.8
1.6
1.4
1.2
1
I
D
T = 150°C
J
T = 125°C
J
T = 85°C
J
0.8
0.6
0.4
100
10
5
10
15
20
25
30
−50 −25
0
25
50
75
100 125 150 175
T , JUNCTION TEMPERATURE (°C)
J
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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4
NVTFS4C02N
TYPICAL CHARACTERISTICS
10K
1K
6
C
ISS
5
4
3
C
OSS
RSS
Q
Q
GS
GD
100
C
2
1
0
10
1
V
DS
= 15 V
V
= 0 V
GS
T = 25°C
J
T = 25°C
J
I
D
= 50 A
f = 1 MHz
0
5
10
15
20
25
30
0
2
4
6
8
10
12 14 16 18 20
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
1K
100
V
GS
= 0 V
t
r
100
10
t
d(off)
t
d(on)
10
1
V
V
= 4.5 V
= 15 V
= 50 A
GS
t
f
DS
I
D
T = 125°C
T = 25°C
T = −55°C
J
J
J
1
1
10
R , GATE RESISTANCE (W)
100
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1K
100
10
1K
T
V
= 25°C
C
≤ 10 V
GS
T (initial) = 25°C
J
100 Single Pulse
100 ms
10
1
DC
1 ms
10 ms
T (initial) = 100°C
J
1
R
Limit
0.1
DS(on)
Thermal Limit
Package Limit
0.1
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.01
0.1
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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5
NVTFS4C02N
TYPICAL CHARACTERISTICS
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
PULSE TIME (sec)
Figure 13. Thermal Characteristics
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6
NVTFS4C02N
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511AB
ISSUE D
2X
NOTES:
0.20
C
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
D
A
B
E
2X
D1
MILLIMETERS
INCHES
NOM
0.030
−−−
0.012
0.20
C
8
1
7
6
5
4
DIM
A
A1
b
MIN
0.70
0.00
0.23
0.15
NOM
0.75
−−−
0.30
0.20
MAX
MIN
MAX
0.031
0.002
0.016
0.010
0.028
0.000
0.009
0.006
0.80
0.05
0.40
0.25
4X
q
E1
c
0.008
D
3.30 BSC
3.05
2.11
3.30 BSC
3.05
1.60
0.30
0.65 BSC
0.41
0.80
0.43
0.130 BSC
0.120
0.083
0.130 BSC
0.120
0.063
0.012
0.026 BSC
0.016
0.032
0.017
D1
D2
E
E1
E2
E3
e
G
K
L
L1
M
2.95
1.98
3.15
2.24
0.116
0.078
0.124
0.088
c
2
3
A1
TOP VIEW
2.95
1.47
0.23
3.15
1.73
0.40
0.116
0.058
0.009
0.124
0.068
0.016
0.10
0.10
C
C
A
C
6X
e
0.30
0.65
0.30
0.06
1.40
0
0.51
0.95
0.56
0.20
1.60
0.012
0.026
0.012
0.002
0.055
0
0.020
0.037
0.022
0.008
0.063
SEATING
PLANE
0.13
1.50
−−−
0.005
0.059
−−−
DETAIL A
SIDE VIEW
DETAIL A
q
12
12
_
_
_
_
8X
b
0.10
0.05
C
C
A B
SOLDERING FOOTPRINT*
8X
e/2
0.42
0.65
4X
L
4X
0.66
PITCH
1
8
4
5
PACKAGE
OUTLINE
K
E2
M
E3
3.60
L1
D2
BOTTOM VIEW
G
2.30
0.57
0.47
0.75
2.37
3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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