NVTFS5C466NL [ONSEMI]
Power MOSFET;型号: | NVTFS5C466NL |
厂家: | ONSEMI |
描述: | Power MOSFET |
文件: | 总7页 (文件大小:91K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NVTFS5C466NL
Power MOSFET
40 V, 7.3 mW, 51 A, Single N−Channel
Features
• Small Footprint (3.3 x 3.3 mm) for Compact Design
• Low R
to Minimize Conduction Losses
DS(on)
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• Low Capacitance to Minimize Driver Losses
• NVTFS5C466NLWF − Wettable Flanks Product
• AEC−Q101 Qualified and PPAP Capable
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
7.3 mꢃ @ 10 V
12 mꢃ @ 4.5 V
• These Devices are Pb−Free and are RoHS Compliant
40 V
51 A
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
N−Channel
Parameter
Drain−to−Source Voltage
Symbol
Value
40
Unit
V
D (5 − 8)
V
DSS
Gate−to−Source Voltage
Continuous Drain Cur-
V
20
V
GS
T
= 25°C
= 100°C
= 25°C
I
51
A
C
D
rent R
3, 4)
(Notes 1, 2,
ꢀ
JC
T
C
36
G (4)
Steady
State
Power Dissipation
(Notes 1, 2, 3)
T
C
P
38
W
A
D
R
ꢀ
S (1, 2, 3)
JC
T
C
= 100°C
19
Continuous Drain Cur-
T = 25°C
A
I
14
D
MARKING DIAGRAM
rent R
3, 4)
(Notes 1 &
ꢀ
JA
T = 100°C
A
12
1
Steady
State
1
S
S
S
G
D
D
D
D
Power Dissipation
(Notes 1, 3)
T = 25°C
A
P
3.1
2.1
200
W
D
XXXX
AYWWG
G
WDFN8
(m8FL)
CASE 511AB
R
ꢀ
JA
T = 100°C
A
Pulsed Drain Current
T = 25°C, t = 10 ꢁ s
I
DM
A
A
p
Operating Junction and Storage Temperature
T , T
−55 to
+175
°C
J
stg
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
Source Current (Body Diode)
I
S
10
72
A
WW
= Work Week
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
G
= Pb−Free Package
Energy (I
= 3 A)
L(pk)
(Note: Microdot may be in either location)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol
Value
3.5
Unit
Junction−to−Case − Steady State (Note 3)
Junction−to−Ambient − Steady State (Note 3)
R
°C/W
ꢀ
JC
JA
R
48
ꢀ
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (ꢂ ) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
2
3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
4. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
January, 2017 − Rev. 0
NVTFS5C466NL/D
NVTFS5C466NL
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 ꢁ A
40
V
(BR)DSS
D
Drain−to−Source Breakdown
Voltage Temperature Coefficient
V
/
29
mV/°C
(BR)DSS
T
J
Zero Gate Voltage Drain Current
I
T = 25°C
10
ꢁ A
nA
V
DSS
J
V
V
= 0 V,
= 40 V
GS
DS
T = 125°C
J
250
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
GSS
DS GS
V
V
= V , I = 250 ꢁ A
1.2
2.2
7.3
12
GS(TH)
GS
DS
D
Drain−to−Source On Resistance
R
V
= 10 V, I = 10 A
6.1
9.7
33
mꢃ
DS(on)
GS
GS
D
V
= 4.5 V, I = 10 A
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
V
= 15 V, I = 25 A
S
FS
DS
D
C
V
= 0 V, f = 1.0 MHz,
880
340
16
pF
iss
GS
V
= 25 V
DS
Output Capacitance
C
oss
Reverse Transfer Capacitance
Total Gate Charge
C
rss
Q
Q
7.0
1.8
3.3
2.5
16
nC
nC
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
Q
G(TH)
V
= 4.5 V, V = 32 V, I = 25 A
DS D
GS
Q
GS
Q
GD
V
= 10 V, V = 32 V, I = 25 A
nC
ns
G(TOT)
GS
DS
D
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
t
10
67
26
32
d(on)
t
r
V
= 4.5 V, V = 32 V,
DS
GS
I
D
= 25 A
Turn−Off Delay Time
Fall Time
t
d(off)
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
V
I
= 0 V,
= 20 A
T = 25°C
0.9
0.8
22
1.2
V
SD
GS
S
J
T = 125°C
J
Reverse Recovery Time
Charge Time
t
ns
RR
t
t
10
a
V
GS
= 0 V, dl /dt = 100 A/ꢁ s,
S
I
S
= 25 A
Discharge Time
12
b
Reverse Recovery Charge
Q
6.0
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: Pulse Width ≤ 300 ꢁ s, Duty Cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NVTFS5C466NL
TYPICAL CHARACTERISTICS
70
60
50
40
30
20
100
V
GS
= 10 to 5 V
90
80
70
60
50
40
30
20
V
DS
= 10 V
4.5 V
3.8 V
3.6 V
3.4 V
3.2 V
T = 25°C
J
10
0
10
0
T = 125°C
J
T = −55°C
J
0
0.5
1.0
1.5
2.0
2.5
3.0
0
1
2
3
4
5
6
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
12
11
10
9
T = 25°C
J
V
= 4.5 V
GS
I
= 25 A
D
25
20
15
10
T = 25°C
J
8
7
V
= 10 V
GS
6
5
0
5
4
3
4
5
6
7
8
9
10
10
15
20
25
30
35
40
45
50
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
100K
10K
1K
T = 150°C
J
I
= 25 A
= 10 V
D
V
GS
T = 125°C
J
T = 85°C
J
100
10
T = 25°C
J
0.7
0.6
0.5
1
−50 −25
0
25
50
75 100 125 150 175
5
10
V
15
20
25
30
35
40
T , JUNCTION TEMPERATURE (°C)
J
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVTFS5C466NL
TYPICAL CHARACTERISTICS
10K
1K
10
9
QT
8
C
iss
7
T = 25°C
J
C
oss
6
5
4
3
100
Q
Q
gd
gs
C
rss
10
1
T = 25°C
GS
f = 1 MHz
J
V
2
1
0
= 0 V
V
DS
= 32 V
I
D
= 25 A
0
5
10
15
20
25
30
35
40
0
1
2
3
4
5
6
7
8
9
10
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
10
1000
100
V
GS
= 0 V
t
r
T = 125°C
J
1
t
d(off)
10
1
t
d(on)
V
V
I
= 4.5 V
= 32 V
= 25 A
GS
t
f
DS
D
T = 25°C
T = −55°C
J
J
0.1
1
10
R , GATE RESISTANCE (ꢃ)
100
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
10
1000
100
Single Pulse
V
GS
≤ 10 V
T
C
= 25°C
T
= 25°C
J(initial)
10
T
= 100°C
J(initial)
1
1
10 ꢁ s
0.5 ms
1 ms
R
Limit
DS(on)
Thermal Limit
Package Limit
10 ms
0.1
0.00001
0.1
0.0001
0.001
0.01
0.1
1
10
100
1000
TIME IN AVALANCHE (s)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
NVTFS5C466NL
TYPICAL CHARACTERISTICS
100
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response
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5
NVTFS5C466NL
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NVTFS5C466NLTAG
466L
WDFN8
(Pb−Free)
1500 / Tape & Reel
1500 / Tape & Reel
NVTFS5C466NLWFTAG
66LW
WDFN8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
NVTFS5C466NL
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511AB
ISSUE D
2X
NOTES:
0.20
C
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
D
A
B
E
2X
D1
MILLIMETERS
INCHES
NOM
0.030
−−−
0.012
0.20
C
8
1
7
6
5
4
DIM
A
A1
b
MIN
0.70
0.00
0.23
0.15
NOM
0.75
−−−
0.30
0.20
MAX
MIN
MAX
0.031
0.002
0.016
0.010
0.80
0.05
0.40
0.25
0.028
0.000
0.009
0.006
4X
q
E1
c
0.008
D
3.30 BSC
3.05
2.11
3.30 BSC
3.05
1.60
0.30
0.65 BSC
0.41
0.80
0.43
0.130 BSC
0.120
0.083
0.130 BSC
0.120
0.063
0.012
0.026 BSC
0.016
0.032
0.017
D1
D2
E
E1
E2
E3
e
G
K
L
L1
M
2.95
1.98
3.15
2.24
0.116
0.078
0.124
0.088
c
2
3
A1
TOP VIEW
0.116
0.058
0.009
0.124
0.068
0.016
2.95
1.47
0.23
3.15
1.73
0.40
0.10
0.10
C
C
A
C
6X
e
0.30
0.65
0.30
0.06
1.40
0
0.51
0.95
0.56
0.20
1.60
0.012
0.026
0.012
0.002
0.055
0
0.020
0.037
0.022
0.008
0.063
SEATING
PLANE
0.13
1.50
−−−
0.005
0.059
−−−
DETAIL A
SIDE VIEW
DETAIL A
q
12
12
_
_
_
_
8X b
0.10
0.05
C
C
A
B
SOLDERING FOOTPRINT*
8X
e/2
0.42
0.65
PITCH
4X
L
4X
0.66
1
8
4
5
PACKAGE
OUTLINE
K
E2
M
E3
3.60
L1
D2
BOTTOM VIEW
G
2.30
0.57
0.47
0.75
2.37
3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NVTFS5C466NL/D
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