P1819BF-08SR [ONSEMI]

Notebook LCD Panel EMI Reduction IC; 笔记本电脑液晶面板降低EMI IC
P1819BF-08SR
型号: P1819BF-08SR
厂家: ONSEMI    ONSEMI
描述:

Notebook LCD Panel EMI Reduction IC
笔记本电脑液晶面板降低EMI IC

时钟发生器 微控制器和处理器 电脑 CD
文件: 总6页 (文件大小:168K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
P1819  
Notebook LCD Panel EMI  
Reduction IC  
Features  
FCC approved method of EMI attenuation.  
clock and data dependent signals. The P1819 allows  
significant system cost savings by reducing the number of  
circuit board layers, ferrite beads, shielding, and other  
passive components that are traditionally required to pass  
EMI regulations.  
Provides up to 15dB EMI reduction.  
Generates a low EMI Spread Spectrum clock and a  
non-spread reference clock of the input frequency.  
Optimized for Frequency range from 20 to 40MHz.  
Internal loop filter minimizes external components  
and board space.  
The P1819 modulates the output of a single PLL in order  
to “spread” the bandwidth of a synthesized clock, and  
more importantly, decreases the peak amplitudes of its  
harmonics. This result in significantly lower system EMI  
compared to the typical narrow band signal produced by  
oscillators and most frequency generators. Lowering EMI  
by increasing a signal’s bandwidth is called ‘Spread  
Spectrum Clock Generation’.  
Selectable spread options: Down and Center.  
Low Inherent Cycle-to-Cycle jitter.  
Two different deviation selections.  
ModRate is compliant with ATI M7x VGA spec.  
3.3V ± 0.3V Operating Voltage range.  
Low power CMOS design.  
The P1819 is available in different spread deviation, refer  
to Spread Deviation Selection Table.  
Supports notebook VGA and other LCD timing  
controller applications.  
The P1819 uses the most efficient and optimized  
modulation profile approved by the FCC and is  
implemented in a proprietary all digital method.  
Power Down function for mobile application.  
Available in 8-pin SOIC Package.  
Product Description  
Applications  
The P1819 is a Versatile Spread Spectrum Frequency  
Modulator designed specifically for input clock  
frequencies from 20 to 40MHz. (Refer to Input Frequency  
and Modulation Rate Table). The P1819 reduces  
electromagnetic interference (EMI) at the clock source,  
allowing system wide reduction of EMI of down stream  
The P1819 is targeted towards EMI management for  
memory and LVDS interfaces in mobile graphic chipsets  
and high-speed digital applications such as PC peripheral  
devices, consumer electronics, and embedded controller  
systems.  
Block Diagram  
VDD  
SRS  
D_C/NC PD#  
PLL  
Modulation  
XIN / CLKIN  
Frequency  
Divider  
Crystal  
Oscillator  
Output  
Divider  
Phase  
Detector  
Loop  
Filter  
VCO  
XOUT  
REF  
Feedback  
Divider  
ModOUT  
VSS  
©2010 SCILLC. All rights reserved.  
NOVEMBER 2010 – Rev. 3.1  
Publication Order Number:  
P1819/D  
P1819  
Pin Configuration  
XOUT  
XOUT  
1
2
3
4
8
XIN / CLKIN  
8
7
6
5
XIN / CLKIN  
VSS  
1
2
3
4
VSS  
SRS  
VDD  
PD#  
REF  
VDD  
PD#  
REF  
7
6
5
P1819 B  
P1819 G  
D_C / NC  
ModOUT  
ModOUT  
Pin Description  
Pin#  
Pin Name  
Type  
Description  
P1819B  
P1819G  
Crystal Connection or external frequency input. This pin  
has dual functions. It can be connected to either an  
external crystal or an external reference clock.  
1
2
3
1
2
XIN / CLKIN  
VSS  
I
P
I
Ground Connection. Connect to system ground.  
Spread range select. Digital logic input used to select  
frequency deviation (Refer to Spread Deviation Selection  
Table). This pin has an internal pull-up resistor.  
Digital logic input used to select Down (LOW) or Center  
(HIGH) spread options (Refer to Spread Deviation  
Selection Table). This pin has an internal pull-up  
resistor.  
SRS  
3
3
D_C / NC  
I
Spread spectrum clock output. (Refer to Input Frequency  
and Modulation Rate Table and Spread Deviation  
Selection Table).  
Non-modulated Reference clock output of the input  
frequency.  
4
5
4
5
ModOUT  
REF  
O
O
Power down control pin. Pull XIN/CLKIN and PD# LOW  
to enable Power-Down mode. This pin has an internal  
pull-up resistor.  
6
7
6
7
8
PD#  
VDD  
I
P
O
Power Supply for the entire chip.  
Crystal Connection. Input connection for an external  
crystal. If using an external reference, this pin must be  
left unconnected.  
8
XOUT  
Note: Pin 3 is NC in P1819Q.  
Input Frequency and Modulation Rate  
Part Number  
Input Frequency Range  
Output Frequency range  
Modulation rate  
P1819  
20MHz to 40MHz  
20MHz to 40MHz  
Input Frequency / 896  
Rev.3 | Page 2 of 6 | www.onsemi.com  
P1819  
Spread Deviation Selection  
Part Number  
SRS  
D_C  
Spread Deviation  
0
1
-1.25% (DOWN)  
-1.75% (DOWN)  
-1.75% (DOWN)  
±0.875% (CENTER)  
P1819B  
P1819G  
NA  
0
1
NA  
Absolute Maximum Ratings  
Symbol  
Parameter  
Rating  
-0.5 to +4.6  
-65 to +125  
260  
Unit  
VDD, VIN  
TSTG  
Ts  
Voltage on any pin with respect to Ground  
Storage temperature  
V
°C  
°C  
°C  
Max. Soldering Temperature (10 sec)  
Junction Temperature  
TJ  
150  
Static Discharge Voltage  
TDV  
2
KV  
(As per JEDEC STD22- A114-B)  
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect  
device reliability.  
Operating Conditions  
Symbol  
VDD  
TA  
Parameter  
Min  
3.0  
Max  
3.6  
+85  
15  
Unit  
V
Supply Voltage  
Operating temperature  
Load Capacitance  
Input Capacitance  
-40  
°C  
CL  
pF  
pF  
CIN  
7
Rev.3 | Page 3 of 6 | www.onsemi.com  
P1819  
DC Electrical Characteristics  
Symbol  
Parameter  
Min  
VSS–0.3  
2.0  
Typ  
Max  
Unit  
V
VIL  
VIH  
IIL  
Input Low voltage  
Input High voltage  
0.8  
VDD+0.3  
-20.0  
1.0  
V
Input Low current (inputs D_C, PD#, SRS)  
Input High current  
-60.0  
µA  
µA  
mA  
mA  
V
IIH  
IXOL  
IXOH  
VOL  
VOH  
XOUT Output low current @ 0.4V, VDD = 3.3V  
XOUT Output high current @ 2.5V, VDD = 3.3V  
Output Low voltage VDD = 3.3V, IOL = 20mA  
Output High voltage VDD = 3.3V, IOH = 20mA  
2.0  
12.0  
12.0  
0.4  
2.5  
-
V
Dynamic supply current normal mode  
3.3V and 25pF probe loading  
7.1  
fIN - min  
26.9  
fIN - max  
ICC  
IDD  
mA  
mA  
V
Static supply current standby mode  
Operating Voltage  
4.5  
3.3  
VDD  
tON  
3.0  
3.6  
Power up time (first locked clock cycle after power up)  
Clock Output impedance  
0.18  
50  
mS  
ZOUT  
AC Electrical Characteristics  
Symbol  
Parameter  
Min  
20  
Typ  
Max  
40  
Unit  
MHz  
MHz  
nS  
fIN  
Input Frequency  
Output Frequency  
fOUT  
20  
40  
1
tLH  
Output Rise time(Measured from 0.8V to 2.0V)  
Output Fall time (Measured from 2.0V to 0.8V)  
Jitter (cycle-to-cycle)  
0.66  
0.65  
1
tHL  
nS  
tJC  
tLTJ  
tD  
-200  
45  
200  
55  
pS  
Long Term Jitter,(1000 cycle) on Refout @ 27MHz  
Output Duty cycle  
475  
50  
pS  
%
Note: 1. tLH and tHL are measured into a capacitive load of 15pF.  
Rev.3 | Page 4 of 6 | www.onsemi.com  
P1819  
Package Information  
8-Pin SOIC Package  
H
E
D
A2  
A
C
θ
e
A1  
L
B
Dimensions  
Symbol  
Inches  
Millimeters  
Min  
Max  
0.010  
0.069  
0.059  
0.020  
0.010  
Min  
0.10  
1.35  
1.25  
0.31  
0.18  
Max  
0.25  
1.75  
1.50  
0.51  
0.25  
A1  
A
0.004  
0.053  
0.049  
0.012  
0.007  
A2  
B
C
D
E
0.193 BSC  
0.154 BSC  
0.050 BSC  
0.236 BSC  
4.90 BSC  
3.91 BSC  
1.27 BSC  
6.00 BSC  
e
H
L
0.016  
0°  
0.050  
8°  
0.41  
0°  
1.27  
8°  
θ
Note: Controlling dimensions are millimeters  
SOIC – 0.074 grams unit weight  
Rev.3 | Page 5 of 6 | www.onsemi.com  
P1819  
Ordering Code  
Part Number  
P1819BF-08SR  
P1819GF-08SR  
Marking  
ABY  
Package Type  
8-pin SOIC, tape & reel, Pb Free  
8-pin SOIC, tape & reel, Pb Free  
Temperature  
0°C to +70°C  
0°C to +70°C  
ACA  
A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free  
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
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Rev.3 | Page 6 of 6 | www.onsemi.com  

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