P6SMB75CAT3G [ONSEMI]

600 Watt Peak Power Zener Transient Voltage Suppressors; 600瓦峰值功率齐纳瞬态电压抑制器
P6SMB75CAT3G
型号: P6SMB75CAT3G
厂家: ONSEMI    ONSEMI
描述:

600 Watt Peak Power Zener Transient Voltage Suppressors
600瓦峰值功率齐纳瞬态电压抑制器

瞬态抑制器 二极管 光电二极管
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中文:  中文翻译
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P6SMB11CAT3 Series  
600 Watt Peak Power Zener  
Transient Voltage Suppressors  
Bidirectional*  
The SMB series is designed to protect voltage sensitive  
components from high voltage, high energy transients. They have  
excellent clamping capability, high surge capability, low zener  
impedance and fast response time. The SMB series is supplied in  
ON Semiconductor’s exclusive, cost-effective, highly reliable  
Surmetict package and is ideally suited for use in communication  
systems, automotive, numerical controls, process controls, medical  
equipment, business machines, power supplies and many other  
industrial/consumer applications.  
http://onsemi.com  
PLASTIC SURFACE MOUNT  
ZENER OVERVOLTAGE  
TRANSIENT SUPPRESSORS  
9.4−78 VOLTS  
Features  
600 WATT PEAK POWER  
Working Peak Reverse Voltage Range − 9.4 to 77.8 V  
Standard Zener Breakdown Voltage Range − 11 to 91 V  
Peak Power − 600 W @ 1 ms  
ESD Rating of Class 3 (>16 KV) per Human Body Model  
Maximum Clamp Voltage @ Peak Pulse Current  
Low Leakage < 5 mA Above 10 V  
UL 497B for Isolated Loop Circuit Protection  
Response Time is Typically < 1 ns  
Pb−Free Packages are Available  
SMB  
CASE 403A  
PLASTIC  
Mechanical Characteristics:  
CASE: Void-Free, Transfer-Molded, Thermosetting Plastic  
FINISH: All External Surfaces are Corrosion Resistant and Leads are  
Readily Solderable  
MARKING DIAGRAM  
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:  
260°C for 10 Seconds  
LEADS: Modified L−Bend Providing More Contact Area to Bond Pads  
POLARITY: Polarity Band Will Not be Indicated  
MOUNTING POSITION: Any  
AYWW  
xxC G  
G
xxC = Device Code  
MAXIMUM RATINGS  
A
Y
= Assembly Location  
= Year  
Rating  
Symbol Value  
Unit  
WW = Work Week  
Peak Power Dissipation (Note 1) @ T = 25°C,  
Pulse Width = 1 ms  
P
PK  
600  
W
L
G
= Pb−Free Package  
(Note: Microdot may be in either location)  
DC Power Dissipation @ T = 75°C  
P
3.0  
W
L
D
Measured Zero Lead Length (Note 2)  
Derate Above 75°C  
ORDERING INFORMATION  
40  
25  
mW/°C  
°C/W  
Thermal Resistance, Junction−to−Lead  
R
q
JL  
Device  
Package  
Shipping  
DC Power Dissipation (Note 3) @ T = 25°C  
P
0.55  
4.4  
226  
W
mW/°C  
°C/W  
A
D
P6SMBxxCAT3  
P6SMBxxCAT3G  
SMB  
2500/Tape & Reel  
2500/Tape & Reel  
Derate Above 25°C  
Thermal Resistance, Junction−to−Ambient  
R
q
JA  
SMB  
Operating and Storage Temperature Range  
T , T  
−65 to  
+150  
°C  
(Pb−Free)  
J
stg  
The “T3” suffix refers to a 13 inch reel.  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. 10 X 1000 ms, non−repetitive  
2. 1square copper pad, FR−4 board  
Devices listed in bold, italic are ON Semiconductor  
Preferred devices. Preferred devices are recommended  
choices for future use and best overall value.  
3. FR−4 board, using ON Semiconductor minimum recommended footprint, as  
shown in 403A case outline dimensions spec.  
*Please see P6SMB6.8AT3 to P6SMB200AT3 for Unidirectional devices.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
July, 2006 − Rev. 8  
P6SMB11CAT3/D  
 
P6SMB11CAT3 Series  
ELECTRICAL CHARACTERISTICS  
(T = 25°C unless otherwise noted)  
A
I
I
PP  
Symbol  
Parameter  
I
Maximum Reverse Peak Pulse Current  
PP  
I
T
I
V
R
BR RWM  
V
C
V
V
Clamping Voltage @ I  
PP  
C
V
I
R
T
V
V
V
RWM BR C  
I
V
RWM  
Working Peak Reverse Voltage  
I
R
Maximum Reverse Leakage Current @ V  
RWM  
V
Breakdown Voltage @ I  
BR  
T
I
PP  
I
Test Current  
T
Bi−Directional TVS  
QV  
Maximum Temperature Coefficient of V  
BR  
BR  
ELECTRICAL CHARACTERISTICS (Devices listed in bold, italic are ON Semiconductor Preferred devices.)  
Breakdown Voltage  
V @ I (Note 6)  
C PP  
V
RWM  
I
R
@
C
typ  
V
BR  
Volts (Note 5)  
@ I  
V
C
I
PP  
(Note 4)  
V
RWM  
(Note 7)  
QV  
T
BR  
Device  
Min  
Nom  
Max  
mA  
Volts  
mA  
Volts  
Amps  
%/°C  
pF  
Marking  
Device*  
P6SMB11CAT3, G  
P6SMB12CAT3, G  
P6SMB13CAT3, G  
11C  
12C  
13C  
9.4  
10.2  
11.1  
5
5
5
10.5  
11.4  
12.4  
11.05  
12  
13.05  
11.6  
12.6  
13.7  
1
1
1
15.6  
16.7  
18.2  
38  
36  
33  
0.075  
0.078  
0.081  
865  
800  
740  
P6SMB15CAT3, G  
P6SMB16CAT3, G  
P6SMB18CAT3, G  
P6SMB20CAT3, G  
15C  
16C  
18C  
20C  
12.8  
13.6  
15.3  
17.1  
5
5
5
5
14.3  
15.2  
17.1  
19  
15.05  
16  
18  
15.8  
16.8  
18.9  
21  
1
1
1
1
21.2  
22.5  
25.2  
27.7  
28  
27  
24  
22  
0.084  
0.086  
0.088  
0.09  
645  
610  
545  
490  
20  
P6SMB22CAT3, G  
P6SMB24CAT3, G  
P6SMB27CAT3, G  
P6SMB30CAT3, G  
22C  
24C  
27C  
30C  
18.8  
20.5  
23.1  
25.6  
5
5
5
5
20.9  
22.8  
25.7  
28.5  
22  
24  
27.05  
30  
23.1  
25.2  
28.4  
31.5  
1
1
1
1
30.6  
33.2  
37.5  
41.4  
20  
18  
16  
0.09  
0.094  
0.096  
0.097  
450  
415  
370  
335  
14.4  
P6SMB33CAT3, G  
P6SMB36CAT3, G  
P6SMB39CAT3, G  
P6SMB43CAT3, G  
33C  
36C  
39C  
43C  
28.2  
30.8  
33.3  
36.8  
5
5
5
5
31.4  
34.2  
37.1  
40.9  
33.05  
36  
39.05  
43.05  
34.7  
37.8  
41  
1
1
1
1
45.7  
49.9  
53.9  
59.3  
13.2  
12  
11.2  
10.1  
0.098  
0.099  
0.1  
305  
280  
260  
240  
45.2  
0.101  
P6SMB47CAT3, G  
P6SMB51CAT3, G  
P6SMB56CAT3, G  
P6SMB62CAT3, G  
47C  
51C  
56C  
62C  
40.2  
43.6  
47.8  
53  
5
5
5
5
44.7  
48.5  
53.2  
58.9  
47.05  
51.05  
56  
49.4  
53.6  
58.8  
65.1  
1
1
1
1
64.8  
70.1  
77  
9.3  
8.6  
7.8  
7.1  
0.101  
0.102  
0.103  
0.104  
220  
205  
185  
170  
62  
85  
P6SMB68CAT3, G  
P6SMB75CAT3, G  
P6SMB82CAT3, G  
P6SMB91CAT3, G  
68C  
75C  
82C  
91C  
58.1  
64.1  
70.1  
77.8  
5
5
5
5
64.6  
71.3  
77.9  
86.5  
68  
75.05  
82  
71.4  
78.8  
86.1  
95.5  
1
1
1
1
92  
6.5  
5.8  
5.3  
4.8  
0.104  
0.105  
0.105  
0.106  
155  
140  
130  
120  
103  
113  
125  
91  
4. A transient suppressor is normally selected according to the working peak reverse voltage (V  
the DC or continuous peak operating voltage level.  
), which should be equal to or greater than  
RWM  
5. V measured at pulse test current I at an ambient temperature of 25°C.  
BR  
T
6. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data − 600 Watt at the beginning of this group.  
7. Bias Voltage = 0 V, F = 1 MHz, T = 25°C  
J
*The “G’’ suffix indicates Pb−Free package available. Please refer back to Ordering Information on front page.  
http://onsemi.com  
2
 
P6SMB11CAT3 Series  
100  
10  
PULSE WIDTH (t ) IS DEFINED AS  
P
NONREPETITIVE  
THAT POINT WHERE THE PEAK  
CURRENT DECAYS TO 50% OF  
t 10 ms  
rꢀ  
PULSE WAVEFORM  
SHOWN IN FIGURE 2  
I .  
PP  
100  
50  
0
PEAK VALUE − I  
PP  
I
PP  
2
HALF VALUE −  
1
t
P
0.1  
0.1 ms  
1 ms  
10 ms  
100 ms  
1 ms  
10 ms  
0
1
2
3
4
5
t , PULSE WIDTH  
P
t, TIME (ms)  
Figure 1. Pulse Rating Curve  
Figure 2. Pulse Waveform  
1000  
100  
10  
160  
140  
120  
P6SMB11CAT3G  
P6SMB18CAT3G  
P6SMB47CAT3G  
100  
80  
P6SMB91CAT3G  
60  
40  
20  
0
T = 25°C  
f = 1 MHz  
J
1
0
25  
50  
75  
100  
125  
150  
1
10  
100  
T , AMBIENT TEMPERATURE (°C)  
A
BIAS VOLTAGE (VOLTS)  
Figure 3. Pulse Derating Curve  
Figure 4. Typical Junction Capacitance vs. Bias  
Voltage  
TYPICAL PROTECTION CIRCUIT  
Z
in  
LOAD  
V
in  
V
L
http://onsemi.com  
3
P6SMB11CAT3 Series  
APPLICATION NOTES  
RESPONSE TIME  
suppressor device as close as possible to the equipment or  
components to be protected will minimize this overshoot.  
In most applications, the transient suppressor device is  
placed in parallel with the equipment or component to be  
protected. In this situation, there is a time delay associated with  
the capacitance of the device and an overshoot condition  
associated with the inductance of the device and the inductance  
of the connection method. The capacitive effect is of minor  
importance in the parallel protection scheme because it only  
produces a time delay in the transition from the operating  
voltage to the clamp voltage as shown in Figure 4.  
The inductive effects in the device are due to actual turn-on  
time (time required for the device to go from zero current to full  
current) and lead inductance. This inductive effect produces an  
overshoot in the voltage across the equipment or component  
being protected as shown in Figure 5. Minimizing this  
overshoot is very important in the application, since the main  
purpose for adding a transient suppressor is to clamp voltage  
spikes. The SMB series have a very good response time,  
typically < 1 ns and negligible inductance. However, external  
inductive effects could produce unacceptable overshoot.  
Proper circuit layout, minimum lead lengths and placing the  
Some input impedance represented by Z is essential to  
in  
prevent overstress of the protection device. This impedance  
should be as high as possible, without restricting the circuit  
operation.  
DUTY CYCLE DERATING  
The data of Figure 1 applies for non-repetitive conditions  
and at a lead temperature of 25°C. If the duty cycle increases,  
the peak power must be reduced as indicated by the curves of  
Figure 6. Average power must be derated as the lead or ambient  
temperature rises above 25°C. The average power derating  
curve normally given on data sheets may be normalized and  
used for this purpose.  
At first glance the derating curves of Figure 6 appear to be  
in error as the 10 ms pulse has a higher derating factor than  
the 10 ms pulse. However, when the derating factor for a  
given pulse of Figure 6 is multiplied by the peak power value  
of Figure 1 for the same pulse, the results follow the  
expected trend.  
http://onsemi.com  
4
P6SMB11CAT3 Series  
V
in  
(TRANSIENT)  
OVERSHOOT DUE TO  
INDUCTIVE EFFECTS  
V
V
V
in  
(TRANSIENT)  
V
L
V
L
V
in  
t
d
t
D
= TIME DELAY DUE TO CAPACITIVE EFFECT  
t
t
Figure 5.  
Figure 6.  
1
0.7  
0.5  
0.3  
0.2  
PULSE WIDTH  
10 ms  
0.1  
0.07  
0.05  
1 ms  
0.03  
0.02  
100 ms  
10 ms  
10 20  
D, DUTY CYCLE (%)  
0.01  
0.1 0.2  
0.5  
1
2
5
50 100  
Figure 7. Typical Derating Factor for Duty Cycle  
UL RECOGNITION  
The entire series has Underwriters Laboratory  
Recognition for the classification of protectors (QVGV2)  
under the UL standard for safety 497B and File #116110.  
Many competitors only have one or two devices recognized  
or have recognition in a non-protective category. Some  
competitors have no recognition at all. With the UL497B  
recognition, our parts successfully passed several tests  
including Strike Voltage Breakdown test, Endurance  
Conditioning, Temperature test, Dielectric  
Voltage-Withstand test, Discharge test and several more.  
Whereas, some competitors have only passed a  
flammability test for the package material, we have been  
recognized for much more to be included in their Protector  
category.  
http://onsemi.com  
5
P6SMB11CAT3 Series  
PACKAGE DIMENSIONS  
SMB  
DO−214AA  
CASE 403A−03  
ISSUE F  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.  
H
E
2. CONTROLLING DIMENSION: INCH.  
3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P.  
E
MILLIMETERS  
INCHES  
DIM  
A
A1  
b
c
D
MIN  
1.90  
0.05  
1.96  
0.15  
3.30  
4.06  
5.21  
0.76  
NOM  
2.13  
0.10  
2.03  
0.23  
3.56  
4.32  
5.44  
1.02  
MAX  
MIN  
NOM  
0.084  
0.004  
0.080  
0.009  
0.140  
0.170  
0.214  
0.040  
MAX  
0.096  
0.008  
0.087  
0.012  
0.156  
0.181  
0.220  
0.063  
2.45  
0.20  
2.20  
0.31  
3.95  
4.60  
5.60  
1.60  
0.075  
0.002  
0.077  
0.006  
0.130  
0.160  
0.205  
0.030  
b
D
E
H
E
L
0.51 REF  
L1  
0.020 REF  
A
A1  
c
L
L1  
SOLDERING FOOTPRINT*  
2.261  
0.089  
2.743  
0.108  
2.159  
0.085  
mm  
inches  
ǒ
Ǔ
SCALE 8:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
SURMETIC is a trademark of Semiconductor Components Industries, LLC.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81−3−5773−3850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
P6SMB11CAT3/D  

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