RFP50N06 [ONSEMI]

N 沟道,功率 MOSFET,60V,50A,22mΩ;
RFP50N06
型号: RFP50N06
厂家: ONSEMI    ONSEMI
描述:

N 沟道,功率 MOSFET,60V,50A,22mΩ

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中文:  中文翻译
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DATA SHEET  
www.onsemi.com  
MOSFET – Power, N-Channel  
60 V, 50 A, 22 mW  
DRAIN  
(FLANGE)  
RFP50N06  
G
D
S
These NChannel power MOSFETs are manufactured using the  
MegaFET process. This process, which uses feature sizes approaching  
those of LSI integrated circuits gives optimum utilization of silicon,  
resulting in outstanding performance. They were designed for use in  
applications such as switching regulators, switching converters, motor  
drivers, and relay drivers. These transistors can be operated directly  
from integrated circuits.  
TO2203LD  
CASE 340AT  
SYMBOL  
D
Formerly developed type TA49018.  
G
Features  
50 A, 60 V  
S
r  
= 0.022 W  
DS(ON)  
Temperature Compensating PSPICEt Model  
Peak Current vs. Pulse Width Curve  
UIS Rating Curve  
MARKING DIAGRAM  
175°C Operating Temperature  
This Device is PbFree and is RoHS Compliant  
$Y&Z&3&K  
RFP  
Specifications  
50N06  
ABSOLUTE MAXIMUM RATINGS  
C
(T = 25°C, unless otherwise specifieded)  
Symbol  
Parameter  
Rating  
60  
Unit  
V
V
DSS  
DGR  
Drain to Source Voltage (Note 1)  
V
Drain to Gate Voltage (R = 20 kW)  
60  
V
GS  
(Note 1)  
V
Gate to Source Voltage  
20  
50  
V
A
$Y  
&Z  
&3  
&K  
= onsemi Logo  
= Assembly Plant Code  
= Date Code (Year & Week)  
= Lot  
= Specific Device Code  
GS  
I
Drain Current  
Continuous (Figure 2)  
Pulsed  
D
I
(Figure 5)  
(Figure 6)  
DM  
RFP50N06  
E
Pulsed Avalanche Rating  
AS  
P
D
Power Dissipation  
131  
W
Linear Derating Factor  
0.877  
W/°C  
ORDERING INFORMATION  
T , T  
Operating and Storage Temperature  
55 to 175  
°C  
°C  
J
STG  
Device  
Package  
Shipping  
T
L
Maximum Temperature for Soldering  
Leads at 0.063 inch (1.6 mm) from Case  
for 10 s  
300  
RFP50N06  
TO2203LD  
(PbFree)  
800 units /  
Tube  
T
pkg  
Maximum Temperature for Soldering  
Package Body for 10 s, see Techbrief 334  
260  
°C  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
1. T = 25°C to 150°C  
J
© Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
August, 2022 Rev. 2  
RFP50N06/D  
 
RFP50N06  
ELECTRICAL CHARACTERISTICS (T = 25°C, unless otherwise noted)  
C
Parameter  
Symbol  
Test Conditions  
Min  
60  
2
Typ  
Max  
Units  
V
I
= 250 mA, V = 0 V (Figure 11)  
Drain to Source Breakdown Voltage  
Gate to Source Threshold Voltage  
Zero Gate Voltage Drain Current  
BV  
D
GS  
DSS  
V
= V , ID = 250 mA (Figure 10)  
V
4
V
GS  
DS  
GS(TH)  
TC = 25°C  
I
1
mA  
mA  
nA  
W
DSS  
V
V
= 60 V,  
= 0 V  
DS  
GS  
TC = 150°C  
50  
100  
V
= 20 V  
Gate to Source Leakage Current  
Drain to Source On Resistance  
I
GS  
GSS  
r
I
D
= 50 A, V = 10 V (Figure 9)  
0.022  
DS(ON)  
GS  
TurnOn Time  
TurnOn Delay Time  
Rise Time  
t
95  
ns  
ns  
ns  
ns  
ns  
ns  
ON  
V
= 30 V, I = 50 A  
D
DD  
L
GS  
R = 0.6 W, V = 10 V  
GS  
t
12  
55  
37  
13  
d(ON)  
R
= 3.6 W  
t
r
(Figure 13)  
TurnOff Delay Time  
Fall Time  
t
d(OFF)  
t
f
TurnOff Time  
t
75  
OFF  
Total Gate Charge  
Q
V
V
V
V
= 0 to 20 V  
= 0 to 10 V  
= 0 to 2 V  
125  
67  
150  
80  
nC  
nC  
nC  
g(TOT)  
GS  
GS  
GS  
DS  
V
= 48 V, I = 50 A,  
D
DD  
L
R = 0.96 W  
Gate Charge at 10V  
Threshold Gate Charge  
Q
g(10)  
I
= 1.45 mA  
g(REF)  
Q
3.7  
4.5  
(Figure 13)  
g(TH)  
Input Capacitance  
C
= 25 V, V = 0 V  
2020  
600  
pF  
pF  
ISS  
OSS  
RSS  
GS  
f = 1 MHz  
(Figure 12)  
Output Capacitance  
C
C
Reverse Transfer Capacitance  
200  
pF  
°C/W  
Thermal Resistance Junction to Case  
Thermal Resistance Junction to Ambient  
R
R
(Figure 3)  
1.14  
62  
θ
JC  
JA  
°C/W  
TO220  
θ
SOURCE TO DRAIN DIODE CHARACTERISTICS  
Source to Drain Diode Voltage  
Output Capacitance  
V
I
I
= 50 A  
1.5  
V
SD  
SD  
t
= 50 A, dI /dt = 100 A/ms  
125  
ns  
rr  
SD  
SD  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
www.onsemi.com  
2
RFP50N06  
TYPICAL PERFORMANCE CHARACTERISTICS (unless otherwise specified)  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
60  
50  
40  
30  
20  
10  
0
0
25  
50  
75  
100  
125  
150  
175  
25  
50  
75  
100  
125  
150  
175  
o
o
T
, CASE TEMPERATURE ( C)  
C
T
, CASE TEMPERATURE ( C)  
C
Figure 1. Normalized Power Dissipation  
vs. Case Temperature  
Figure 2. Maximum Continuous Drain  
Current vs. Case Temperature  
2
1
0.5  
0.2  
0.1  
0.1  
P
DM  
0.05  
t
1
0.02  
0.01  
t
2
NOTES:  
DUTY FACTOR: D = t /t  
1
2
x R  
SINGLE PULSE  
PEAK T = P  
x Z  
+ T  
qJC  
C
J
DM  
qJC  
0.01  
1
5  
4  
10  
3  
10  
2  
1  
10  
0
10  
10  
10  
t , RECTANGULAR PULSE DURATION (s)  
10  
1
Figure 3. Normalized Maximum Transient Thermal Impedance  
3
400  
100  
10  
o
T
= MAX RATED  
J
FOR TEMPERATURES ABOVE 25 C  
DERATE PEAK CURRENT  
CAPABILITY AS FOLLOWS:  
SINGLE PULSE  
o
T
= 25 C  
C
175 T  
C
V
= 20V  
GS  
I = I  
100ms  
25  
150  
1ms  
V
= 10V  
GS  
10  
1
o
T
= 25 C  
C
OPERATION IN THIS  
AREA MAY BE  
2
10ms  
10  
TRANSCONDUCTANCE  
MAY LIMIT CURRENT  
IN THIS REGION  
LIMITED BY r  
DS(ON)  
100ms  
DC  
V
= 60V  
DSS(MAX)  
40  
3  
10  
2  
10  
1  
10  
0
1
2
3
4
1
10  
, DRAIN TO SOURCE VOLTAGE (V)  
100  
10  
10  
10  
10  
10  
t, PULSE WIDTH (ms)  
V
DS  
Figure 4. Forward Bias Safe  
Operating Area  
Figure 5. Peak Current Capability  
www.onsemi.com  
3
RFP50N06  
TYPICAL PERFORMANCE CHARACTERISTICS (unless otherwise specified) (continued)  
300  
100  
125  
PULSE DURATION = 80ms  
V
= 10V  
DUTY CYCLE = 0.5% MAX  
GS  
o
T
= 25 C  
C
V
= 8V  
100  
75  
50  
25  
0
GS  
o
STARTING T = 25 C  
J
V
= 7V  
GS  
o
STARTING T = 150 C  
10  
J
V
= 6V  
= 5V  
= 4V  
GS  
If R = 0  
V
GS  
t
= (L) (I ) / (1.3 RATED BV  
V )  
DD  
AV  
If R p 0  
AS DSS  
V
GS  
t
= (L/R) ln [(I *R) / (1.3 RATED BV  
V ) + 1]  
DD  
AV  
AS  
DSS  
1
1
0.01  
0
1.5  
3.0  
4.5  
6.0  
7.5  
0.1  
10  
t
TIME IN AVALANCHE (ms)  
AV,  
V
, DRAIN TO SOURCE VOLTAGE (V)  
DS  
Figure 6. Unclamped Inductive Switching  
Capability  
Figure 7. Saturation Characteristics  
2.5  
2.0  
1.5  
1.0  
0.5  
0
125  
PULSE DURATION = 80ms  
PULSE DURATION = 80ms  
o
o
55 C  
25 C  
DUTY CYCLE = 0.5% MAX  
DUTY CYCLE = 0.5% MAX  
V
= 10V, I = 50A  
V
= 15V  
GS  
D
DD  
100  
75  
50  
25  
0
o
175 C  
0
1
2
3
4
5
6
7
8
9
10  
80  
40  
0
40  
80  
120  
160  
200  
o
T , JUNCTION TEMPERATURE ( C)  
V
, GATE TO SOURCE VOLTAGE (V)  
J
GS  
Figure 8. Transfer Characteristics  
Figure 9. Normalized Drain to Source On  
Resistance vs. Junction Temperature  
2.0  
1.5  
1.0  
0.5  
0
2.0  
1.5  
1.0  
I
= 250mA  
V
GS  
= V , I = 250mA  
D
DS  
D
0.5  
0
80  
40  
0
40  
80  
120  
o
160  
200  
80  
40  
0
40  
80  
120  
160  
200  
o
T , JUNCTION TEMPERATURE ( C)  
J
T , JUNCTION TEMPERATURE ( C)  
J
Figure 10. Normalized Gate Threshold  
Voltage vs. Junction Temperature  
Figure 11. Normalized Drain to Source  
Breakdown Voltage vs. Junction Temperature  
www.onsemi.com  
4
RFP50N06  
TYPICAL PERFORMANCE CHARACTERISTICS (unless otherwise specified) (continued)  
10  
7.5  
5.0  
2.5  
0
60  
4000  
3000  
2000  
1000  
0
V
= 0V, f = 1MHz  
GS  
ISS  
C
C
C
= C  
+ C  
GS  
GD  
V
= BV  
V
= BV  
DSS  
DD  
DSS  
DD  
= C  
RSS  
OSS  
GD  
= C  
+ C  
45  
30  
15  
DS  
GD  
C
C
ISS  
0.75 BV  
0.50 BV  
0.25 BV  
0.75 BV  
DSS  
DSS  
DSS  
0.50 BV  
0.25 BV  
DSS  
DSS  
OSS  
DSS  
= 1.2W  
R
I
V
L
= 1.45mA  
C
g(REF)  
RSS  
= 10V  
GS  
0
I
I
I
I
0
5
10  
15  
20  
25  
g(REF)  
g(ACT)  
g(REF)  
g(ACT)  
t, TIME (ms)  
20  
80  
V
, DRAIN TO SOURCE VOLTAGE (V)  
DS  
Figure 12. Capacitance vs. Drain to  
Source Voltage  
Figure 13. Normalized Switching Waveforms for  
Constant Gate Current  
www.onsemi.com  
5
RFP50N06  
TEST CIRCUITS AND WAVEFORMS  
V
DS  
BV  
DSS  
L
t
P
V
DS  
VARY t TO OBTAIN  
P
I
AS  
+
V
DD  
R
REQUIRED PEAK I  
G
AS  
V
DD  
V
GS  
DUT  
t
P
I
AS  
0V  
0
0.01W  
t
AV  
Figure 14. Unclamped Energy Test Circuit  
Figure 15. Unclamped Energy Waveforms  
t
t
ON  
OFF  
t
d(OFF)  
t
d(ON)  
V
DS  
t
t
f
r
V
DS  
90%  
90%  
R
L
V
GS  
+
10%  
10%  
V
DD  
0
DUT  
90%  
50%  
R
GS  
V
GS  
50%  
PULSE WIDTH  
V
GS  
10%  
0
Figure 16. Switching Time Test Circuit  
Figure 17. Switching Waveforms  
V
DS  
V
DD  
Q
R
g(TOT)  
L
V
DS  
V
= 20V  
GS  
V
GS  
Q
+
g(10)  
V
DD  
V
= 10V  
V
GS  
GS  
DUT  
V
= 2V  
GS  
I
0
g(REF)  
Q
g(TH)  
I
g(REF)  
0
Figure 18. Gate Charge Test Circuit  
Figure 19. Gate Charge Waveforms  
www.onsemi.com  
6
RFP50N06  
PSPICE ELECTRICAL MODEL  
.SUBCKT RFP50N06213  
REV 2/22/93  
o
*NOM TEMP = 25  
C
CA 12 8 3.68e9  
CB 15 14 3.625e9  
CIN 6 8 1.98e9  
DRAIN  
2
5
DBODY 7 5 DBDMOD  
DBREAK 5 11DBKMOD  
DPLCAP 10 5 DPLCAPMOD  
10  
LDRAIN  
DPLCAP  
RDRAIN  
DBREAK  
MOS2  
6
ESG  
8
16  
+
VTO  
DBODY  
EBREAK 11 7 17 18 64.59  
EDS 14 8 5 8 1  
EGS 13 8 6 8 1  
ESG 6 10 6 8 1  
EVTO 20 6 18 8 1  
EVTO  
GATE  
1
21  
+
9
20  
6
18  
8
11  
MOS1  
17  
18  
LGATE RGATE  
EBREAK  
RIN  
CIN  
RSOURCE  
LSOURCE  
7
8
IT 8 17 1  
3
SOURCE  
S1A  
S2A  
12  
RBREAK  
LDRAIN 2 5 1e9  
LGATE 1 9 5.65e9  
LSOURCE 3 7 4.13e9  
15  
14  
13  
13  
8
17  
18  
S1B  
S2B  
13  
RVTO  
19  
MOS1 16 6 8 8 MOSMOD M=0.99  
MOS2 16 21 8 8 MOSMOD M=0.01  
CA  
CB  
+
IT  
14  
+
5
8
6
8
VBAT  
EGS  
EDS  
+
RBREAK 17 18 RBKMOD 1  
RDRAIN 5 16 RDSMOD 1e4  
RGATE 9 20 0.690  
RIN 6 8 1e9  
RSOURCE 8 7 RDSMOD 12e3  
RVTO 18 19 RVTOMOD 1  
S1A 6 12 13 8 S1AMOD  
S1B 13 12 13 8 S1BMOD  
S2A 6 15 14 13 S2AMOD  
S2B 13 15 14 13 S2BMOD  
VBAT 8 19 DC 1  
VTO 21 6 0.678  
.MODEL DBDMOD D (IS=9.85e13 RS=4.91e3 TRS1=2.07e3 TRS2=2.51e7 CJO=2.05e9 TT=4.33e8)  
.MODEL DBKMOD D (RS=1.98e1 TRS1=2.35E4 TRS2=3.83e6)  
.MODEL DPLCAPMOD D (CJO=1.42e9 IS=1e30 N=10)  
.MODEL MOSMOD NMOS (VTO=3.65 KP=35 IS=1e30 N=10 TOX=1 L=1u W=1u)  
.MODEL RBKMOD RES (TC1=1.23e3 TC2=2.34e7)  
.MODEL RDSMOD RES (TC1=5.01e3 TC2=1.49e5)  
.MODEL RVTOMOD RES (TC1=5.03e3 TC2=5.16e6)  
.MODEL S1AMOD VSWITCH (RON=1e5 ROFF=0.1 VON=6.75 VOFF=2.5)  
.MODEL S1BMOD VSWITCH (RON=1e5 ROFF=0.1 VON=2.5 VOFF=6.75)  
.MODEL S2AMOD VSWITCH (RON=1e5 ROFF=0.1 VON=2.7 VOFF=2.3)  
.MODEL S2BMOD VSWITCH (RON=1e5 ROFF=0.1 VON=2.3 VOFF=2.7)  
.ENDS  
NOTE: For further discussion of the PSPICE model consult  
A New PSPICE SubCircuit for the Power MOSFET Featuring Global  
Temperature Options; authors, William J. Hepp and C. Frank Wheatley.  
PSPICE is a trademark of MicroSim Corporation.  
www.onsemi.com  
7
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
TO2203LD  
CASE 340AT  
ISSUE A  
DATE 03 OCT 2017  
Scale 1:1  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON13818G  
TO2203LD  
PAGE 1 OF 1  
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