SL24T3 [ONSEMI]

300 Watt, SOT-23 Low Capacitance TVS for High Speed Line Protections; 300瓦，采用SOT -23低电容TVS高速线路保护


型号：	SL24T3
厂家：	ONSEMI
描述：	300 Watt, SOT-23 Low Capacitance TVS for High Speed Line Protections 300瓦，采用SOT -23低电容TVS高速线路保护瞬态抑制器二极管电视光电二极管局域网
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SL05T1 Series

300 Watt, SOT-23 Low

Capacitance TVS for High

Speed Line Protections

This new family of TVS offers transient overvoltage protection with

significantly reduced capacitance. The capacitance is lowered by

integrating a compensating diode in series. This integrated solution

offers ESD protection for high speed interfaces such as communication

systems, computers, and computer peripherals.

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Specification Features:

• TVS Diode in Series with a Compensating Diode Offers <5 pF

Capacitance

(NC)

• ESD Protection Meeting IEC 61000–4–2, 4–4, 4–5

• Peak Power Rating of 300 Watts, 8 × 20 ms

• Bi–Direction Protection Can Be Achieved By Using Two Devices

• Flammability Rating UL 94 V–0

MARKING

DIAGRAM

Mechanical Characteristics:

CASE: Void-free, transfer-molded, thermosetting plastic case

FINISH: Corrosion resistant finish, easily solderable

MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:

260°C for 10 Seconds

xxx

SOT–23

CASE 318

STYLE 26

xxx = Device Code

Package designed for optimal automated board assembly

Small package size for high density applications

Available in 8 mm Tape and Reel

= Date Code

Use the Device Number to order the 7 inch/3,000 unit reel.

Replace the “T1” with “T3” in the Device Number to order the

13 inch/10,000 unit reel.

ORDERING INFORMATION

Device

Package

SOT–23

Shipping

SL05T1

SL15T1

SL24T1

SL05T3

SL15T3

SL24T3

3000/Tape & Reel

10,000/Tape & Reel

DEVICE MARKING INFORMATION

See specific marking information in the device marking

column of the table on page 3 of this data sheet.

Semiconductor Components Industries, LLC, 2002

Publication Order Number:

May, 2002 – Rev. 3

SL05T1/D

SL05T1 Series

MAXIMUM RATINGS

Rating

Symbol

Value

Unit

Peak Power Dissipation @ 8x20 usec (Note 1)

300

@ T ≤ 25°C

IEC 61000–4–2

Contact Discharge

Air Discharge

IEC 61000–4–4

IEC 61000–4–5

Level 4

±8

±16

Amps

EFT

Lightning

Total Power Dissipation on FR–5 Board (Note 2) @ T = 25°C

Derate above 25°C

°P °

225

1.8

°mW°

mW/°C

Thermal Resistance Junction to Ambient

556

°C/W

Total Power Dissipation on Alumina Substrate (Note 3) @ T = 25°C

Derate above 25°C

°P °

300

2.4

°mW

mW/°C

Thermal Resistance Junction to Ambient

Junction and Storage Temperature Range

Lead Solder Temperature – Maximum (10 Second Duration)

417

– 55 to +150

260

°C/W

°C

T , T

stg

°C

1. Non–repetitive current pulse per Figure 2

2. FR–5 = 1.0 x 0.75 x 0.62 in.

3. Alumina = 0.4 x 0.3 x 0.024 in., 99.5% alumina

ELECTRICAL CHARACTERISTICS

(T = 25°C unless otherwise noted)

UNIDIRECTIONAL (Circuit tied to Pins 1 and 3 or 2 and 3)

Symbol

Parameter

Maximum Reverse Peak Pulse Current

Clamping Voltage @ I

BR RWM

RWM

Working Peak Reverse Voltage

Maximum Reverse Leakage Current @ V

RWM

Breakdown Voltage @ I

Test Current

Maximum Temperature Coefficient of V

Forward Current

Uni–Directional TVS

Forward Voltage @ I

Maximum Zener Impedance @ I

Reverse Current

Maximum Zener Impedance @ I

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SL05T1 Series

ELECTRICAL CHARACTERISTICS

Breakdown Voltage

V , Clamping Voltage

(Note 4)

(Note 5)

Capacitance

Max

@ 1 mA (Volts)

@ 1 Amp @ 5 Amp

@ V = 0 V, 1 MHz (pF)

RWM

I @ V

R RWM

Device

(Amps)

(Volts)

5.0

(mA)

Min

Max

8.0

(Volts)

9.8

(Volts)

Typ

3.5

Max

5.0

Marking

Device

SL05

L05

L15

L24

6.0

SL15

1.0

16.7

26.7

18.5

SL24

5.0

4. V measured at pulse test current of 1 mA at an ambient temperature of 25°C

5. Surge current waveform per Figure 2

TYPICAL CHARACTERISTICS

100

PEAK VALUE I

@ 8 ms

RSM

PULSE WIDTH (t ) IS DEFINED

AS THAT POINT WHERE THE

PEAK CURRENT DECAY = 8 ms

HALF VALUE I

/2 @ 20 ms

RSM

0.1

0.01

0.1

100

1000

t, TIME (ms)

PULSE WIDTH (ms)

Figure 1. Maximum Peak Power Rating

Figure 2. 8 × 20 ms Pulse Waveform

3.5

SL05T1

2.5

SL05

SL15

SL24

1.5

0.1

0.5

0.01

@ ZERO BIAS

@ 50% V

@ V

–55

150

RWM

TEMPERATURE (°C)

Figure 3. Typical Junction Capacitance

Figure 4. Typical Leakage Over Temperature

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SL05T1 Series

INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the

total design. The footprint for the semiconductor packages

must be the correct size to insure proper solder connection

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

0.037

0.95

0.037

0.95

0.079

2.0

0.035

0.9

0.031

0.8

inches

SOT–23

SOT–23 POWER DISSIPATION

The power dissipation of the SOT–23 is a function of the

SOLDERING PRECAUTIONS

drain pad size. This can vary from the minimum pad size

for soldering to a pad size given for maximum power

dissipation. Power dissipation for a surface mount device is

The melting temperature of solder is higher than the rated

temperature of the device. When the entire device is heated

to a high temperature, failure to complete soldering within

a short time could result in device failure. Therefore, the

following items should always be observed in order to

minimize the thermal stress to which the devices are

subjected.

• Always preheat the device.

• The delta temperature between the preheat and

soldering should be 100°C or less.*

• When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering

method, the difference shall be a maximum of 10°C.

• The soldering temperature and time shall not exceed

260°C for more than 10 seconds.

• When shifting from preheating to soldering, the

maximum temperature gradient shall be 5°C or less.

• After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and

result in latent failure due to mechanical stress.

• Mechanical stress or shock should not be applied

during cooling.

determined by T

, the maximum rated junction

J(max)

temperature of the die, R , the thermal resistance from

qJA

the device junction to ambient, and the operating

temperature, T . Using the values provided on the data

sheet for the SOT–23 package, P can be calculated as

follows:

T_J(max)– T_A

P_D=

R_q

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values

into the equation for an ambient temperature T of 25°C,

one can calculate the power dissipation of the device which

in this case is 225 milliwatts.

150°C – 25°C

P_D=

= 225 milliwatts

556°C/W

The 556°C/W for the SOT–23 package assumes the use

of the recommended footprint on a glass epoxy printed

circuit board to achieve a power dissipation of 225

milliwatts. There are other alternatives to achieving higher

power dissipation from the SOT–23 package. Another

alternative would be to use a ceramic substrate or an

aluminum core board such as Thermal Clad . Using a

board material such as Thermal Clad, an aluminum core

board, the power dissipation can be doubled using the same

footprint.

* * Soldering a device without preheating can cause

excessive thermal shock and stress which can result in

damage to the device.

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SL05T1 Series

Applications Background

This new family of TVS devices (SL05T1 series) are

designed to protect sensitive electronics such as

communications systems, computers, and computer

peripherals against damage due to ESD conditions or

transient voltage conditions. Because of their low

capacitance value (less than 5 pF), they can be used in high

speed I/O data lines. Low capacitance is achieved by

integrating a compensating diode in series with the TVS

which is basically based in the below theoretical principle:

Figure 6.

An alternative solution to protect unidirectional lines, is to

connect a fast switching steering diode in parallel with the

SL05T1 series device. When the steering diode is

forward–biased, the TVS will avalanche and conduct in

reverse direction. It is important to note that by adding a

steering diode, the effective capacitance in the circuit will be

increased, therefore the impact of adding a steering diode

must be taken in consideration to establish whether the

incremental capacitance will affect the circuit functionality

or not. The Figure 7 shows the connection between the

steering diode and the SL05T1 series device:

• Capacitance in parallel: CT = C1+C2+....+Cn

• Capacitance in series: 1/CT = (1/C1)+(1/C2)+....+(1/Cn)

The Figure 5 shows the integrated solution of the SL05T1

series device:

COMPENSATING

DIODE

TVS

Figure 5.

In the case that an over–voltage condition occurs in the I/O

line protected by the SL05T1 series device, the TVS is

reversed–biased while the compensation diode is

forward–biased so the resulting current due to the transient

voltage is drained to ground.

SL05T1 DEVICE

If protection in both polarities is required, an additional

device is connected in inverse–parallel with reference to the

first one, the Figure 6 illustrates the inverse–parallel

connection for bi–directional or unidirectional lines:

STEERING DIODE

Figure 7.

Another typical application in which the SL05T1 series

device can be utilized, is to protect multiple I/O lines. The

protection in each of the I/O lines is achieved by connecting

two devices in inverse–parallel. The Figure 8 illustrates how

multiple I/O line protection is achieved:

INPUT

OUTPUT

Figure 8.

For optimizing the protection, it is recommended to use ground planes and short path lengths to minimize the PCB’s ground inductance.

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SL05T1 Series

Transient Voltage Suppressors – Surface Mount

300 Watts Peak Power

SOT–23

TO–236AB

CASE 318–09

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

ISSUE AH

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. MAXIUMUM LEAD THICKNESS INCLUDES LEAD

FINISH THICKNESS. MINIMUM LEAD THICKNESS

IS THE MINIMUM THICKNESS OF BASE

MATERIAL.

4. 318-01, -02, AND -06 OBSOLETE, NEW

STANDARD 318-09.

INCHES

DIM MIN MAX

MILLIMETERS

MIN

2.80

1.20

0.99

0.36

1.70

0.10

MAX

3.04

1.40

1.26

0.50

2.10

0.25

0.177

0.60

1.02

2.50

0.60

0.1102 0.1197

0.0472 0.0551

0.0385 0.0498

0.0140 0.0200

0.0670 0.0826

0.0040 0.0098

0.0034 0.0070 0.085

0.0180 0.0236

0.0350 0.0401

0.0830 0.0984

0.0177 0.0236

0.45

0.89

2.10

0.45

STYLE 26:

PIN 1. CATHODE

2. ANODE

3. NO CONNECTION

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SL05T1 Series

Notes

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SL05T1 Series

Thermal Clad is a registered trademark of the Bergquist Company.

ON Semiconductor and

are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make

changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any

particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all

liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be

validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.

SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death

may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC

and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees

arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that

SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION

Literature Fulfillment:

JAPAN: ON Semiconductor, Japan Customer Focus Center

4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031

Phone: 81–3–5740–2700

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada

Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada

Email: ONlit@hibbertco.com

Email: r14525@onsemi.com

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local

Sales Representative.

N. American Technical Support: 800–282–9855 Toll Free USA/Canada

SL05T1/D

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SL24T3 [ONSEMI]

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