SN74LS138D [ONSEMI]
LOW POWER SCHOTTKY; 小功率肖特基
| 型号： | SN74LS138D |
| 厂家： | 
ONSEMI |
| 描述： | LOW POWER SCHOTTKY |
| 文件： | 总8页 (文件大小：128K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
The LSTTL/MSI SN74LS138 is a high speed 1-of-8 Decoder/
Demultiplexer. This device is ideally suited for high speed bipolar
memory chip select address decoding. The multiple input enables
allow parallel expansion to a 1-of-24 decoder using just three LS138
devices or to a 1-of-32 decoder using four LS138s and one inverter.
The LS138 is fabricated with the Schottky barrier diode process for
high speed and is completely compatible with all ON Semiconductor
TTL families.
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LOW
POWER
SCHOTTKY
• Demultiplexing Capability
• Multiple Input Enable for Easy Expansion
• Typical Power Dissipation of 32 mW
• Active Low Mutually Exclusive Outputs
• Input Clamp Diodes Limit High Speed Termination Effects
GUARANTEED OPERATING RANGES
16
Symbol
Parameter
Supply Voltage
Min
4.75
0
Typ
5.0
25
Max
5.25
70
Unit
V
1
V
CC
PLASTIC
N SUFFIX
CASE 648
T
A
Operating Ambient
Temperature Range
°C
I
Output Current – High
Output Current – Low
–0.4
8.0
mA
mA
OH
I
OL
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device
Package
16 Pin DIP
16 Pin
Shipping
SN74LS138N
SN74LS138D
2000 Units/Box
2500/Tape & Reel
Semiconductor Components Industries, LLC, 1999
1
Publication Order Number:
December, 1999 – Rev. 6
SN74LS138/D
SN74LS138
CONNECTION DIAGRAM DIP (TOP VIEW)
V
CC
O
0
O
1
O
2
O
3
O
4
O
5
O
6
16
15
14
13
12
11
10
9
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
1
2
3
4
5
6
8
7
A
0
A
1
A
2
E
1
E
2
E
3
O
7
GND
LOADING (Note a)
HIGH
LOW
PIN NAMES
A – A
Address Inputs
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
0
2
E , E
Enable (Active LOW) Inputs
Enable (Active HIGH) Input
Active LOW Outputs
1
2
E
3
O – O
0
7
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW.
LOGIC SYMBOL
1 2 3
4 5 6
1 23
A
0
A
1
A
2
E
O
0
O O O O O O O
1 2 3 4 5 6 7
15 14 13 12 11 10 9
= PIN 16
7
V
CC
GND = PIN 8
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2
SN74LS138
LOGIC DIAGRAM
A
2
A
1
A
0
E
1
E
2
E
3
3
2
1
4
5
6
V
CC
= PIN 16
GND = PIN 8
= Pin Numbers
7
9
10
11
12
13
14
15
O
O
O
O
O
O
O
O
0
7
6
5
4
3
2
1
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3
SN74LS138
FUNCTIONAL DESCRIPTION
The LS138 is a high speed 1-of-8 Decoder/Demultiplexer
fabricated with the low power Schottky barrier diode
process. The decoder accepts three binary weighted inputs
function allows easy parallel expansion of the device to a
1-of-32 (5 lines to 32 lines) decoder with just four LS138s
and one inverter. (See Figure a.)
(A , A , A ) and when enabled provides eight mutually
The LS138 can be used as an 8-output demultiplexer by
using one of the active LOW Enable inputs as the data input
and the other Enable inputs as strobes. The Enable inputs
which are not used must be permanently tied to their
appropriate active HIGH or active LOW state.
0
1
2
exclusive active LOW Outputs (O –O ). The LS138
0
7
features three Enable inputs, two active LOW (E , E ) and
1
2
one active HIGH (E ). All outputs will be HIGH unless E
3
1
and E are LOW and E is HIGH. This multiple enable
2
3
TRUTH TABLE
INPUTS
OUTPUTS
E
1
E
2
E
3
A
A
A
O
O
O
O
O
O
O
O
7
0
1
2
0
1
2
3
4
5
6
H
X
X
X
X
X
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
H
X
L
L
L
L
L
L
L
L
X
L
X
X
L
H
L
H
L
H
L
X
X
L
X
X
L
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
L
L
H
H
L
H
H
H
H
H
H
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
A
A
A
0
1
2
LS04
A
A
3
4
H
123
123
123
123
A
0
A
1
A
2
E
A
0
A
1
A
2
E
A
0
A
1
A
2
E
A
0
A
1
A
2
E
LS138
O O
LS138
O O O O
LS138
O O O O O O
LS138
O O O O O O O O
3 4 5 6 7
O O O O
O
O
7
O
O O
O
7
O
4
O
7
0
1
2
3
4
5
6
0
1
2
3
4
5
6
0
1
2
3
5
6
0
1
2
O
O
31
0
Figure a
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4
SN74LS138
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
Input HIGH Voltage
Unit
Test Conditions
Min
Typ
Max
Guaranteed Input HIGH Voltage for
All Inputs
V
IH
2.0
V
0.8
Guaranteed Input LOW Voltage for
All Inputs
V
V
V
Input LOW Voltage
V
IL
Input Clamp Diode Voltage
Output HIGH Voltage
–0.65
3.5
–1.5
V
V
V
V
= MIN, I = –18 mA
IN
IK
CC
2.7
= MIN, I = MAX, V = V
OH IN IH
CC
OH
or V per Truth Table
IL
V
V
= V MIN,
CC
0.25
0.35
0.4
0.5
V
V
I
I
= 4.0 mA
= 8.0 mA
CC
OL
= V or V
IH
V
Output LOW Voltage
Input HIGH Current
IN
IL
OL
per Truth Table
OL
20
0.1
µA
mA
mA
mA
mA
V
V
V
V
V
= MAX, V = 2.7 V
IN
CC
CC
CC
CC
CC
I
IH
= MAX, V = 7.0 V
IN
I
I
I
Input LOW Current
–0.4
–100
10
= MAX, V = 0.4 V
IL
IN
Short Circuit Current (Note 1)
Power Supply Current
–20
= MAX
= MAX
OS
CC
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (T = 25°C)
A
Limits
Levels of
Delay
Symbol
Parameter
Propagation Delay
Unit
Test Conditions
Min
Typ
Max
t
t
2
2
13
27
20
41
PLH
ns
Address to Output
PHL
t
t
Propagation Delay
Address to Output
3
3
18
26
27
39
PLH
PHL
ns
ns
ns
V
= 5.0 V
CC
C = 15 pF
L
t
t
Propagation Delay E or E
Enable to Output
2
2
12
21
18
32
PLH
PHL
1
2
t
t
Propagation Delay E
Enable to Output
3
3
17
25
26
38
PLH
PHL
3
AC WAVEFORMS
V
IN
1.3 V
1.3 V
1.3 V
1.3 V
V
V
IN
t
t
PLH
PHL
t
t
PLH
PHL
OUT
V
OUT
1.3 V
1.3 V
1.3 V
1.3 V
Figure 1.
Figure 2.
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5
SN74LS138
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
DIM MIN MAX
0.740 0.770 18.80 19.55
MILLIMETERS
MIN MAX
F
A
B
C
D
F
C
L
0.250 0.270
0.145 0.175
0.015 0.021
6.35
3.69
0.39
1.02
6.85
4.44
0.53
1.77
0.040
0.70
SEATING
–T–
G
H
J
K
L
M
S
0.100 BSC
0.050 BSC
0.008 0.015
2.54 BSC
1.27 BSC
PLANE
K
M
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295 0.305
10
0.020 0.040
0.130
2.80
7.50
0
G
D 16 PL
0
0.51
1.01
M
M
0.25 (0.010)
T A
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6
SN74LS138
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
1
9
8
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
0.25 (0.010)
B
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00 0.386
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
R X 45
K
C
G
J
K
M
P
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
J
M
D
16 PL
7
0
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
M
S
S
0.25 (0.010)
T B
A
R
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7
SN74LS138
ON Semiconductor and
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SN74LS138/D
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