SN74LS138_01 [ONSEMI]
1-of-8 Decoder/ Demultiplexer; 1 - OF- 8解码器/解复用器
| 型号： | SN74LS138_01 |
| 厂家： | 
ONSEMI |
| 描述： | 1-of-8 Decoder/ Demultiplexer |
| 文件： | 总8页 (文件大小：81K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LS138
1-of-8 Decoder/
Demultiplexer
The LSTTL/MSI SN74LS138 is a high speed 1-of-8 Decoder/
Demultiplexer. This device is ideally suited for high speed bipolar
memory chip select address decoding. The multiple input enables
allow parallel expansion to a 1-of-24 decoder using just three LS138
devices or to a 1-of-32 decoder using four LS138s and one inverter.
The LS138 is fabricated with the Schottky barrier diode process for
high speed and is completely compatible with all ON Semiconductor
TTL families.
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LOW
POWER
SCHOTTKY
• Demultiplexing Capability
• Multiple Input Enable for Easy Expansion
• Typical Power Dissipation of 32 mW
• Active Low Mutually Exclusive Outputs
• Input Clamp Diodes Limit High Speed Termination Effects
16
1
PLASTIC
N SUFFIX
CASE 648
GUARANTEED OPERATING RANGES
Symbol
Parameter
Supply Voltage
Min
4.75
0
Typ
5.0
25
Max
5.25
70
Unit
V
V
CC
T
A
Operating Ambient
Temperature Range
°C
16
I
Output Current – High
Output Current – Low
–0.4
8.0
mA
mA
OH
1
I
OL
SOIC
D SUFFIX
CASE 751B
16
1
SOEIAJ
M SUFFIX
CASE 966
ORDERING INFORMATION
Device
Package
16 Pin DIP
SOIC–16
Shipping
SN74LS138N
SN74LS138D
SN74LS138DR2
SN74LS138M
SN74LS138MEL
2000 Units/Box
38 Units/Rail
2500/Tape & Reel
See Note 1
SOIC–16
SOEIAJ–16
SOEIAJ–16
See Note 1
1. For ordering information on the EIAJ version of
the SOIC package, please contact your local
ON Semiconductor representative.
Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
October, 2001 – Rev. 7
SN74LS138/D
SN74LS138
CONNECTION DIAGRAM DIP (TOP VIEW)
V
CC
16
O
O
O
O
O
O
O
6
0
1
2
3
4
5
15
14
13
12
11
10
9
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual InĆLine Package.
1
2
3
4
5
6
8
7
A
0
A
1
A
2
E
1
E
2
E
3
O
7
GND
LOADING (Note a)
HIGH
LOW
PIN NAMES
A
- A
Address Inputs
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
0
2
E , E
1
E
3
O
Enable (Active LOW) Inputs
Enable (Active HIGH) Input
Active LOW Outputs
2
- O
7
0
NOTES:
ąa) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOGIC SYMBOL
1 2 3
4 5 6
1 2 3
A
0
A
1
A
2
E
O
0
O
1
O
2
O
3
O O O O
4 5 6 7
15 14 13 12 11 10
9 7
V
= PIN 16
CC
GND = PIN 8
LOGIC DIAGRAM
A
2
A
1
A
0
E
E E
1 2 3
3
2
1
4
5
6
V
CC
= PIN 16
GND = PIN 8
= Pin Numbers
7
9
10
11
12
13
14
15
O
O
O
O
O
O
2
O
O
0
7
6
5
4
3
1
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2
SN74LS138
FUNCTIONAL DESCRIPTION
The LS138 is a high speed 1-of-8 Decoder/Demultiplexer
fabricated with the low power Schottky barrier diode
process. The decoder accepts three binary weighted inputs
function allows easy parallel expansion of the device to a
1-of-32 (5 lines to 32 lines) decoder with just four LS138s
and one inverter. (See Figure a.)
(A , A , A ) and when enabled provides eight mutually
The LS138 can be used as an 8-output demultiplexer by
using one of the active LOW Enable inputs as the data input
and the other Enable inputs as strobes. The Enable inputs
which are not used must be permanently tied to their
appropriate active HIGH or active LOW state.
0
1
2
exclusive active LOW Outputs (O –O ). The LS138
0
7
features three Enable inputs, two active LOW (E , E ) and
1
2
one active HIGH (E ). All outputs will be HIGH unless E
3
1
and E are LOW and E is HIGH. This multiple enable
2
3
TRUTH TABLE
INPUTS
OUTPUTS
E
1
E
2
E
3
A
A
A
O
O
O
O
O
O
O
O
7
0
1
2
0
1
2
3
4
5
6
H
X
X
X
X
X
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
H
X
L
L
L
L
L
L
L
L
X
L
X
X
L
H
L
H
L
H
L
X
X
L
X
X
L
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
L
L
H
H
L
H
H
H
H
H
H
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
A
0
A
1
A
2
LS04
A
A
3
4
H
1 2 3
1 2 3
1 2 3
1 2 3
A
0
A
1
A
2
E
A
0
A
1
A
2
E
A
0
A
1
A
2
E
A A A
0 1 2
E
LS138
LS138
LS138
LS138
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
O
0
O O O O O O O
1 2 3 4 5 6 7
O
O
31
0
Figure a
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3
SN74LS138
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Min
Typ
Max
Symbol
Parameter
Input HIGH Voltage
Unit
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
V
IH
2.0
V
0.8
Guaranteed Input LOW Voltage for
All Inputs
V
V
V
Input LOW Voltage
V
IL
Input Clamp Diode Voltage
Output HIGH Voltage
–0.65
3.5
–1.5
V
V
V
V
= MIN, I = –18 mA
IN
IK
CC
2.7
= MIN, I
= MAX, V = V
IN
CC
OH
IH
OH
or V per Truth Table
IL
V
V
= V
CC
MIN,
= V or V
IL IH
0.25
0.35
0.4
V
I
I
= 4.0 mA
= 8.0 mA
CC
IN
OL
OL
V
Output LOW Voltage
Input HIGH Current
OL
0.5
20
V
per Truth Table
µA
V
V
V
V
V
= MAX, V = 2.7 V
IN
CC
CC
CC
CC
CC
I
IH
0.1
mA
mA
mA
mA
= MAX, V = 7.0 V
IN
I
I
I
Input LOW Current
–0.4
–100
10
= MAX, V = 0.4 V
IN
IL
Short Circuit Current (Note 2)
Power Supply Current
–20
= MAX
= MAX
OS
CC
2. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (T = 25°C)
A
Limits
Typ
Levels of
Delay
Min
Max
20
Symbol
Parameter
Unit
Test Conditions
t
t
Propagation Delay
Address to Output
2
2
13
27
PLH
PHL
ns
41
t
t
Propagation Delay
Address to Output
3
3
18
26
27
39
PLH
PHL
ns
ns
ns
V
C
= 5.0 V
CC
= 15 pF
L
t
t
Propagation Delay E or E
1
Enable to Output
2
2
12
21
18
32
PLH
PHL
2
t
t
Propagation Delay E
Enable to Output
3
3
17
25
26
38
PLH
PHL
3
AC WAVEFORMS
V
IN
1.3 V
1.3 V
1.3 V
1.3 V
V
IN
t
t
PHL
PLH
t
t
PHL PLH
V
OUT
V
OUT
1.3 V
1.3 V
1.3 V
1.3 V
Figure 1.
Figure 2.
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4
SN74LS138
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–A–
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
A
B
C
D
F
0.740
0.250
0.145
0.015
0.040
0.770
0.270
0.175
0.021
0.70
C
L
SEATING
PLANE
–T–
G
H
J
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
K
L
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
M
S
_
_
_
_
0.020
0.040
0.51
1.01
M
M
0.25 (0.010)
T A
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5
SN74LS138
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
9
8
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
B
0.25 (0.010)
1
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
INCHES
MIN
0.386
DIM MIN
MAX
MAX
0.393
0.157
0.068
0.019
0.049
F
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00
R X 45
K
_
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
C
G
J
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
J
M
K
M
P
R
D
16 PL
7
0
_
_
_
_
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
M
S
S
0.25 (0.010)
T
B
A
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6
SN74LS138
PACKAGE DIMENSIONS
M SUFFIX
SOEIAJ PACKAGE
CASE 966–01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
16
9
L
E
Q
1
H
E
M
_
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
E
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
1
8
L
DETAIL P
Z
D
VIEW P
e
MILLIMETERS
INCHES
MIN
A
DIM MIN
MAX
2.05
0.20
0.50
0.27
10.50
5.45
MAX
0.081
0.008
0.020
0.011
0.413
0.215
c
A
---
0.05
0.35
0.18
9.90
5.10
---
0.002
0.014
0.007
0.390
0.201
A
1
b
c
D
E
e
H
E
L
A
1
b
0.13 (0.005)
1.27 BSC
0.050 BSC
0.10 (0.004)
M
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
L
E
0
0.70
---
10
10
_
0.035
0.031
M
Q
0
_
_
_
0.90
0.78
0.028
---
1
Z
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7
SN74LS138
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
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SN74LS138/D
相关型号：
SN74LS139ADRG4
LS SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, GREEN, PLASTIC, MS-012AC, SOIC-16
TI
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