SN74LS164DR2 [ONSEMI]
LS SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14, PLASTIC, SOIC-14;
| 型号： | SN74LS164DR2 |
| 厂家： | 
ONSEMI |
| 描述： | LS SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14, PLASTIC, SOIC-14 光电二极管 输出元件 逻辑集成电路 触发器 |
| 文件： | 总8页 (文件大小：71K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LS164
Serial-In Parallel-Out
Shift Register
The SN74LS164 is a high speed 8-Bit Serial-In Parallel-Out Shift
Register. Serial data is entered through a 2-Input AND gate
synchronous with the LOW to HIGH transition of the clock. The
device features an asynchronous Master Reset which clears the
register setting all outputs LOW independent of the clock. It utilizes
the Schottky diode clamped process to achieve high speeds and is fully
compatible with all ON Semiconductor TTL products.
http://onsemi.com
LOW
POWER
SCHOTTKY
• Typical Shift Frequency of 35 MHz
• Asynchronous Master Reset
• Gated Serial Data Input
• Fully Synchronous Data Transfers
• Input Clamp Diodes Limit High Speed Termination Effects
• ESD > 3500 Volts
14
1
PLASTIC
N SUFFIX
CASE 646
GUARANTEED OPERATING RANGES
Symbol
Parameter
Supply Voltage
Min
4.75
0
Typ
5.0
25
Max
5.25
70
Unit
V
V
CC
T
A
Operating Ambient
Temperature Range
°C
14
1
I
Output Current – High
Output Current – Low
–0.4
8.0
mA
mA
OH
SOIC
D SUFFIX
CASE 751A
I
OL
14
1
SOEIAJ
M SUFFIX
CASE 965
ORDERING INFORMATION
Device
Package
14 Pin DIP
SOIC–14
Shipping
SN74LS164N
SN74LS164D
SN74LS164DR2
SN74LS164M
SN74LS164MEL
2000 Units/Box
55 Units/Rail
2500/Tape & Reel
See Note 1
SOIC–14
SOEIAJ–14
SOEIAJ–14
See Note 1
1. For ordering information on the EIAJ version of
the SOIC package, please contact your local
ON Semiconductor representative.
Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
October, 2001 – Rev. 7
SN74LS164/D
SN74LS164
CONNECTION DIAGRAM DIP (TOP VIEW)
V
Q
Q
Q
Q
4
MR
9
CP
8
CC
7
6
5
14
13
12
11
10
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual InĆLine Package.
1
2
3
4
5
6
7
A
B
Q
0
Q
1
Q
2
Q
3
GND
LOADING (Note a)
HIGH
LOW
PIN NAMES
A, B
CP
Data Inputs
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Outputs
MR
Q
- Q
7
0
NOTES:
ąa) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOGIC SYMBOL
1
2
8
A
LS164
8ĆBIT SHIFT REGISTER
B
CP
MR
Q
0
Q
4
Q Q Q Q Q Q
2 3 4 5 6 7
1
9
3
5
6 10 11 12 13
V
= PIN 14
CC
GND = PIN 7
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2
SN74LS164
LOGIC DIAGRAM
A
B
1
2
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
C
D
C
D
C
D
C
D
C
D
C
D
C
D
C
D
CP
8
9
MR
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
V
CC
= PIN 14
3
4
5
6
10
11
12
13
GND = PIN 7
= PIN NUMBERS
FUNCTIONAL DESCRIPTION
Each LOW-to-HIGH transition on the Clock (CP) input
The LS164 is an edge-triggered 8-bit shift register with
serial data entry and an output from each of the eight stages.
Data is entered serially through one of two inputs (A or B);
either of these inputs can be used as an active HIGH Enable
for data entry through the other input. An unused input must
be tied HIGH, or both inputs connected together.
shifts data one place to the right and enters into Q the logical
0
AND of the two data inputs (A•B) that existed before the
rising clock edge. A LOW level on the Master Reset (MR)
input overrides all other inputs and clears the register
asynchronously, forcing all Q outputs LOW.
MODE SELECT — TRUTH TABLE
OUTPUTS
INPUTS
OPERATING
MODE
MR
A
B
Q
Q –Q
1 7
0
Reset (Clear)
Shift
L
X
X
L
L – L
H
H
H
H
I
I
h
h
I
h
I
L
L
L
q
0
q
0
q
0
q
0
– q
– q
– q
– q
6
6
6
6
h
H
L (l) = LOW Voltage Levels
H (h) = HIGH Voltage Levels
X = Don’t Care
q
q
= Lower case letters indicate the state of the referenced input or output one
= set-up time prior to the LOW to HIGH clock transition.
n
n
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3
SN74LS164
DC CHARACTERISTICS OVER OPERATING
TEMPERATURE RANGE (unless otherwise specified)
Limits
Min
Typ
Max
Symbol
Parameter
Unit
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
V
IH
Input HIGH Voltage
2.0
V
Guaranteed Input LOW Voltage for
All Inputs
V
V
V
Input LOW Voltage
0.8
V
V
V
V
IL
Input Clamp Diode Voltage
Output HIGH Voltage
–0.65
3.5
–1.5
V
V
= MIN, I = –18 mA
IN
IK
CC
2.7
= MIN, I
= MAX, V = V
IN
CC
OH
IH
OH
or V per Truth Table
IL
V
V
= V
CC
MIN,
= V or V
IH IL
0.25
0.35
0.4
I
I
= 4.0 mA
= 8.0 mA
CC
IN
OL
OL
V
OL
Output LOW Voltage
Input HIGH Current
0.5
20
V
per Truth Table
µA
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX, V = 2.7 V
IN
I
IH
0.1
mA
mA
mA
mA
= MAX, V = 7.0 V
IN
I
I
I
Input LOW Current
–0.4
–100
27
= MAX, V = 0.4 V
IN
IL
Short Circuit Current (Note 2)
Power Supply Current
–20
= MAX
= MAX
OS
CC
2. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (T = 25°C)
A
Limits
Typ
Min
Max
Symbol
Parameter
Unit
Test Conditions
f
Maximum Clock Frequency
25
36
MHz
MAX
PHL
Propagation Delay
MR to Output Q
t
24
36
ns
ns
V
C
= 5.0 V
CC
= 15 pF
L
t
t
Propagation Delay
Clock to Output Q
17
21
27
32
PLH
PHL
AC SETUP REQUIREMENTS (T = 25°C)
A
Limits
Typ
Min
20
Max
Symbol
Parameter
CP, MR Pulse Width
Data Setup Time
Unit
ns
Test Conditions
t
t
t
t
W
15
ns
s
V
CC
= 5.0 V
Data Hold Time
5.0
20
ns
h
MR to Clock Recovery Time
ns
rec
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4
SN74LS164
AC WAVEFORMS
*The shaded areas indicate when the input is permitted to change for predictable output performance.
I
/f
max
MR
1.3 V
1.3 V
t
W
1.3 V
1.3 V
1.3 V
CP
Q
t
t
W
rec
t
t
PLH
PHL
1.3 V
CP
Q
1.3 V
1.3 V
t
PHL
CONDITIONS: MR = H
1.3 V
Figure 1. Clock to Output Delays
and Clock Pulse Width
Figure 2. Master Reset Pulse Width,
Master Reset to Output Delay and
Master Reset to Clock Recovery Time
1/f
max
t
W
1.3 V
t (H)
1.3 V
1.3 V
1.3 V
CP
t (L)
s
s
t (H)
h
t (L)
h
1.3V
1.3 V
1.3 V
D
Q
*
1.3 V
1.3 V
1.3 V
Figure 3. Data Setup and Hold Times
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5
SN74LS164
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
14
1
8
7
B
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
MILLIMETERS
A
F
MIN
18.16
6.10
3.69
0.38
1.02
MAX
18.80
6.60
4.69
0.53
1.78
A
B
C
D
F
0.715
0.240
0.145
0.015
0.040
0.770
0.260
0.185
0.021
0.070
L
N
C
G
H
J
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
---
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
---
2.41
0.38
3.43
7.87
10
–T–
SEATING
PLANE
K
L
J
K
M
N
_
_
0.015
0.039
0.38
1.01
D 14 PL
H
G
M
M
0.13 (0.005)
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6
SN74LS164
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
–A–
14
8
7
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
–B–
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
P 7 PL
M
M
B
0.25 (0.010)
1
MILLIMETERS
DIM MIN MAX
INCHES
MIN
G
MAX
0.344
0.157
0.068
0.019
0.049
F
R X 45
_
C
A
B
C
D
F
8.55
3.80
1.35
0.35
0.40
8.75 0.337
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
–T–
SEATING
PLANE
J
M
G
J
1.27 BSC
0.050 BSC
K
D 14 PL
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
0.244
0.019
M
S
S
0.25 (0.010)
T
B
A
K
M
P
R
7
0
_
_
_
_
5.80
0.25
6.20 0.228
0.50 0.010
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7
SN74LS164
PACKAGE DIMENSIONS
M SUFFIX
SOEIAJ PACKAGE
CASE 965–01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
E
14
8
Q
1
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
_
E
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
7
1
DETAIL P
Z
D
MILLIMETERS
INCHES
MIN
VIEW P
DIM MIN
MAX
2.05
0.20
0.50
0.27
10.50
5.45
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
e
A
---
0.05
0.35
0.18
9.90
5.10
---
0.002
0.014
0.007
0.390
0.201
c
A
1
b
c
D
E
e
b
A
1
1.27 BSC
0.050 BSC
H
M
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
0.13 (0.005)
E
0.50
0.10 (0.004)
L
E
M
0
0.70
---
10
10
_
0.035
0.056
0
_
_
_
Q
1
Z
0.90
1.42
0.028
---
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SN74LS164/D
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