STMFSC3D1N08M7 [ONSEMI]
MOSFET - PowerTrench®, N-Channel, Dual Cool®, Shielded Gate, 80 V, 110 A, 3.1 mΩ;
| 型号： | STMFSC3D1N08M7 |
| 厂家： | 
ONSEMI |
| 描述： | MOSFET - PowerTrench®, N-Channel, Dual Cool®, Shielded Gate, 80 V, 110 A, 3.1 mΩ 栅 |
| 文件： | 总8页 (文件大小：397K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET - PowerTrench),
N-Channel, Dual Cool),
Shielded Gate
ELECTRICAL CONNECTION
S
D
D
D
D
S
S
G
80 V, 3.1 mW, 110 A
N-Channel MOSFET
STMFSC3D1N08M7
General Description
D
This N−Channel MOSFET is produced using onsemi’s advanced
D
D
®
D
POWERTRENCH process that incorporates Shielded Gate
®
Pin 1
technology. Advancements in both silicon and DUAL COOL
package technologies have been combined to offer the lowest r
while maintaining excellent switching performance by extremely low
G
DS(on)
S
S
Pin 1
S
Junction−to−Ambient thermal resistance.
Top
Bottom
Features
DFN8, Dual CoolE
CASE 506EG
• DUAL COOL Top Side Cooling PQFN Package
• Max r
• Max r
= 3.1 mW at V = 10 V, I = 24 A
GS D
DS(on)
= 4.0 mW at V = 8 V, I = 21 A
DS(on)
GS
D
MARKING DIAGRAM
• High Performance Technology for Extremely Low r
• 100% UIL Tested
DS(on)
2KAYWZ
• RoHS Compliant
Typical Applications
• Synchronous Rectifier for DC/DC Converters
• Telecom Secondary Side Rectification
• High End Server/Workstation Vcore Low Side
2K
A
= Device Code
= Plant Code
YW = Date Code
= Lot Code
Z
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
February, 2023 − Rev. 3
STMFSC3D1N08M7/D
STMFSC3D1N08M7
ORDERING INFORMATION AND PACKAGE MARKING
†
Device
Marking
Package
Reel Size
Tape Width
Shipping
STMFSC3D1N08M7
86300
DFN8
13”
12 mm
3000 Units/
Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Ratings
Units
V
V
Drain to Source Voltage
Gate to Source Voltage
80
20
V
V
A
DS
GS
I
D
Drain Current
−Continuous
T
= 25°C
C
110
−Continuous
−Pulsed
T = 25°C
(Note 1a)
(Note 2)
(Note 3)
24
A
260
E
P
Single Pulse Avalanche Energy
Power Dissipation
240
mJ
W
AS
T
= 25°C
125
D
C
Power Dissipation
T = 25°C
A
(Note 1a)
3.2
T , T
Operating and Storage Junction Temperature Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
GS
80
V
DSS
D
Breakdown Voltage Temperature
Coefficient
= 250 mA, referenced to 25°C
45
mV/°C
DBVDSS
DTJ
D
I
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 64 V, V
GS
= 0 V
= 0 V
1
mA
DSS
GSS
DS
=
20 V, V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 250 mA
2.5
3.3
4.5
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage Tempera-
ture Coefficient
= 250 mA, referenced to 25°C
−11
mV/°C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
Forward Transconductance
V
V
V
= 10 V, I = 24 A
2.6
3.1
4.1
79
3.1
4.0
5.0
mW
DS(on)
GS
GS
GS
D
= 8 V, I = 21 A
D
= 10 V, I = 24 A, T = 125°C
D
J
g
FS
V
DD
= 10 V, I = 24 A
S
D
DYNAMIC CHARACTERISTICS
C
C
C
R
Input Capacitance
V
DS
= 40 V, V = 0 V, f = 1 MHz
5265
929
21
7005
1235
50
pF
pF
pF
W
ISS
OSS
RSS
G
GS
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.1
1.2
2.6
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STMFSC3D1N08M7
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
SWITCHING CHARACTERISTICS
td
Turn*On Delay Time
Rise Time
V
DD
V
GS
= 40 V, I = 24 A,
29
25
35
9
47
44
ns
ns
(ON)
D
= 10 V, R
= 6 W
GEN
t
t
t
r
Turn*Off Delay Time
Fall Time
57
ns
D(OFF)
f
18
ns
Q
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain ”Miller” Charge
V
V
= 0 V to 10 V
= 0 V to 8 V
72
59
26
14
101
84
nC
nC
nC
nC
g(TOT)
GS
GS
Q
Q
gs
gd
V
D
= 40 V,
DD
I
= 24 A
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
Source to Drain Diode Forward Voltage
V
= 0 V, I = 2.7 A
(Note 2)
(Note 2)
0.72
0.80
1.2
1.3
75
V
V
SD
GS
S
V
GS
= 0 V, I = 24 A
S
I
S
T = 25°C
C
150
88
t
Reverse Recovery Time
56
42
ns
rr
I = 24 A, di/dt = 100 A/ms
F
Q
Reverse Recovery Charge
67
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
THERMAL CHARACTERISTICS
Symbol
Parameter
Thermal Resistance, Junction to Case
Ratings
2.3
1.0
38
Units
R
(Top Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
(Note 1e)
(Note 1f)
°C/W
q
q
q
q
q
q
q
q
q
q
q
q
q
q
JC
JC
JA
JA
JA
JA
JA
JA
JA
JA
JA
JA
JA
JA
R
R
R
R
R
R
R
R
R
R
R
R
R
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
81
27
34
16
19
(Note 1g)
(Note 1h)
(Note 1i)
26
61
16
(Note 1j)
23
(Note 1k)
(Note 1l)
11
13
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3
STMFSC3D1N08M7
NOTES:
1. R
is determined with the device mounted on a FR−4 board using a specified pad of 2 oz copper as shown below. R
is guaranteed by
q
q
JC
JA
design while R
is determined by the user’s board design.
q
CA
a) 38°C/W when mounted on
b) 81°C/W when mounted on
2
a 1 in pad of 2 oz copper.
a minimum pad of 2 oz copper.
2
c) Still air, 20.9×10.4×12.7 mm Aluminum Heat Sink, 1 in pad of 2 oz copper
d) Still air, 20.9×10.4×12.7 mm Aluminum Heat Sink, minimum pad of 2 oz copper
2
e) Still air, 45.2×41.4×11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, 1 in pad of 2 oz copper
f) Still air, 45.2×41.4×11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, minimum pad of 2 oz copper
2
g) .200FPM Airflow, No Heat Sink, 1 in pad of 2 oz copper
h) .200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper
2
i) .200FPM Airflow, 20.9×10.4×12.7 mm Aluminum Heat Sink, 1 in pad of 2 oz copper
j) .200FPM Airflow, 20.9×10.4×12.7 mm Aluminum Heat Sink, minimum pad of 2 oz copper
2
k) .200FPM Airflow, 45.2×41.4×11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, 1 in pad of 2 oz copper
l) .200FPM Airflow, 45.2×41.4×11.7 mm Aavid Thermalloy Part # 10−L41B−11 Heat Sink, minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. Starting T = 25_C; N−ch: L = 0.3 mH, I = 40 A, V = 72 V, V = 10 V.
J
AS
DD
GS
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
6
260
208
156
104
52
V
= 10 V
= 8 V
VGS = 5.5 V
GS
V
= 7 V
GS
V
5
4
3
2
1
0
GS
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
VGS= 6 V
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
VGS = 6.5 V
V
V
= 6.5 V
GS
VGS = 7 V
V
= 6 V
GS
VGS= 10 V
208 260
= 5.5 V
VGS= 8 V
GS
4
0
0
1
2
3
5
0
52
104
156
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance
vs. Drain Current and Gate Voltage
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STMFSC3D1N08M7
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
25
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
I
D = 24 A
ID = 24 A
VGS = 10 V
20
15
10
TJ = 125 o
C
5
0
TJ = 25 o
C
−75 −50 −25
0
25 50 75 100 125 150
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATUREoC( )
VGS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure 4. On-Resistance
vs. Gate to Source Voltage
300
100
260
208
156
104
52
V
= 0 V
GS
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
V
= 5 V
10
1
DS
o
T = 150 C
J
o
T
= 150 C
J
o
T
= 25
o
C
J
0.1
o
T
= 25
o
C
J
T
J
= −55 C
0.01
1E−3
T
= −55 C
J
0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
3
4
5
6
7
8
V , GATE TO SOURCE VOLTAGE (V)
GS
V
, BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
10
8
10000
1000
100
V
DD = 30 V
ID = 24 A
Ciss
VDD = 50 V
VDD = 40 V
6
Coss
Crss
4
2
f = 1 MHz
V
GS = 0 V
10
5
0
0.1
1
10
80
0
20
40
60
80
VDS, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain
to Source Voltage
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STMFSC3D1N08M7
160
100
10
1
V
GS= 10 V
TJ = 25 oC
TJ = 100oC
100
80
Limited by Package
qJC = 1.0oC/W
= 8 V
60
40
20
0
R
TJ = 125 o
C
0.01
0.1
1
10
100 500
25
50
75
100
125
150
o
tAV, TIME IN AVALANCHE (ms)
TC, CASE TEMPERATURE C()
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
1000
100
10
10000
1000
100
10
SINGLE PULSE
RqJA = 81oC/W
T
A = 25 oC
100 us
THIS AREA IS
LIMITED BY r
1 ms
1
DS(on)
SINGLE PULSE
10 ms
100 ms
1 s
T
J = MAX RATED
RqJA = 81 oC/W
A = 25 oC
0.1
CURVE BENT TO
MEASURED DATA
10 s
DC
T
0.01
1
10−4
10−3
10−2
t, PULSE WIDTH (sec)
10−1
100
101
100 1000
0.01
0.1
1
10
100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.01
0.1
P
DM
0.05
0.02
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
SINGLE PULSE
Z
qJA
qJA
0.001
0.0001
R
= 81 5C/W
qJA
Peak T = P
x Z
(t) + T
qJA A
J
DM
Duty Cycle, D = t / t
1
2
10−4
10−3
10−2
10−1
t, RECTANGULAR PULSE DURATION (sec)
100
101
100
1000
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH and DUAL COOL are registered trademarks and SyncFET is a trademark of Semiconductor Components Industries, LLC
(SCILLC) or its subsidiaries in the United States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN8 5x6.15, 1.27P, DUAL COOL
CASE 506EG
ISSUE D
DATE 25 AUG 2020
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXX
XXXX = Specific Device Code
*This information is generic. Please refer to
A
Y
= Assembly Location
= Year
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
WW = Work Week
ZZ
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON84257G
DFN8 5x6.15, 1.27P, DUAL COOL
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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