TCP-3168H-DT [ONSEMI]
6.8 pF Passive Tunable Integrated Circuits;
| 型号： | TCP-3168H-DT |
| 厂家： | 
ONSEMI |
| 描述： | 6.8 pF Passive Tunable Integrated Circuits |
| 文件： | 总7页 (文件大小：216K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TCP-3168H
6.8 pF Passive Tunable
Integrated Circuits (PTIC)
Introduction
ON Semiconductor’s PTICs have excellent RF performance and
power consumption, making them suitable for any mobile handset or
radio application. The fundamental building block of our PTIC
product line is a tunable material called ParaScant, based on Barium
Strontium Titanate (BST). PTICs have the ability to change their
capacitance from a supplied bias voltage generated by the Control IC.
The 6.8 pF PTICs are available as wafer-level chip scale packages
(WLCSP).
www.onsemi.com
WLCSP12
1.13x0.65
CASE 567KG
Key Features
• High Tuning Range and Operation up to 20 V
• Usable Frequency Range: from 700 MHz to 2.7 GHz
• High Quality Factor (Q) for Low Loss
• High Power Handling Capability
MARKING DIAGRAM
• Compatible with PTIC Control IC TCC-10x, 20x
• WLCSP Package: 0.652 x 1.134 x 0.285 mm (12 bump)
• These devices are Pb−Free and RoHS Compliant
Typical Applications
FUNCTIONAL BLOCK DIAGRAM
• Multi-band, Multi-standard, Advanced and Simple Mobile Phones
• Tunable Antenna Matching Networks
• Tunable RF Filters
PTIC
RF1
RF2
• Active Antennas
Bias
PTIC Functional Block Diagram
ORDERING INFORMATION
†
Device
Package
Shipping
TCP−3168H−DT
WLCSP12
(Pb−Free)
4000 Units /
7” Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
July, 2015 − Rev. 2
TCP−3168H/D
TCP−3168H
DC Bias 1
A1
A2
NC
RF2
RF2
B1
C1
B2
C2
RF1
RF1
Figure 1. PTIC Functional Block Diagram (Top Level View)
Table 1. SIGNAL DESCRIPTIONS
Ball / Pad Number
Pin Name
DC Bias 1
RF2
Description
DC Bias Voltage
A1
B1
RF Input / Output
RF Input / Output
Not Connected
C1*
A2
RF2
NC
B2
RF1
RF Input / Output
RF Input / Output
C2*
RF1
*Ball/pad contains multiple connections. Please see packaging information on last page for more information.
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2
TCP−3168H
TYPICAL SPECIFICATIONS
Representative Performance Data at 255C
Table 2. PERFORMANCE DATA
Parameter
Min
2.0
Typ
Max
20
Units
V
Operating Bias Voltage
Capacitance (V
Capacitance (V
= 2 V)
6.12
1.564
3.60
6.80
1.70
4.00
7.48
1.836
4.50
2.0
pF
bias
bias
= 20 V)
pF
Tuning Range (2 V - 20 V)
Leakage Current (WLCSP)
Operating Frequency
mA
700
2700
MHz
Quality Factor @ 700 MHz, 10 V
100
75
Quality Factor @ 2.4 GHz, 10 V
[1,3]
IP3 (V
IP3 (V
= 2 V)
70
dBm
dBm
dBm
dBm
dBm
dBm
ms
bias
bias
[1,3]
= 20 V)
85
[2,3]
2nd Harmonic (V
2nd Harmonic (V
= 2 V)
-70
-80
-40
-70
80
bias
bias
bias
bias
[2,3]
= 20 V)
[2,3]
3rd Harmonic (V
3rd Harmonic (V
= 2 V)
[2,3]
= 20 V)
[4]
[4]
Transition Time (Cmin ³ Cmax)
Transition Time (Cmax ³ Cmin)
70
ms
1. f = 850 MHz, f = 860 MHz, Pin 25 dBm/Tone
1
2
2. 850 MHz, Pin +34 dBm
3. IP3 and Harmonics are measured in the shunt configuration in a 50 W environment
4. RF and RF are both connected to DC ground
IN
OUT
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3
TCP−3168H
Representative performance data at 255C for 6.8 pF WLCSP Package
Figure 2. Capacitance
Figure 3. Harmonic Power
Figure 4. IP3
Figure 5. Q
Table 3. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
+40
Units
dBm
V
Input Power
Bias Voltage
+25 (Note 5)
−30 to +85
−55 to +125
Operating Temperature Range
Storage Temperature Range
°C
°C
ESD − Human Body Model
Class 1A JEDEC HBM Standard (Note 6)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
5. WLCSP: Recommended Bias Voltage not to exceed 20 V
6. Class 1A defined as passing 250 V, but may fail after exposure to 500 V ESD pulse
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4
TCP−3168H
ASSEMBLY CONSIDERATIONS AND REFLOW PROFILE
The following assembly considerations should be observed:
Cleanliness
These chips should be handled in a clean environment.
Electro-static Sensitivity
ON Semiconductor’s PTICs are ESD Class 1A sensitive.
The proper ESD handling procedures should be used.
Mounting
The WLCSP PTIC is fabricated for Flip Chip solder
mounting. Connectivity to the RF and Bias terminations on
the PTIC die is established through SAC305 solder balls
with 65 mm nominal height (45 mm to 85 mm height
variation). The PTIC die is RoHS-compliant and compatible
with lead-free soldering profile.
Molding
The PTIC die is compatible for over-molding or
under-fill.
Figure 6. Reflow Profile
ORIENTATION OF THE PTIC FOR OPTIMUM LOSSES
RF
ANT
When configuring the PTIC in your specific circuit
design, at least one of the RF terminals must be connected
to DC ground. If minimum transition times are required, DC
ground on both RF terminals is recommended. To minimize
losses, the PTIC should be oriented such that RF2 is at the
lower RF impedance of the two RF nodes. A shunt PTIC, for
example, should have RF2 connected to RF ground.
RF1
(PTIC Pad)
RF2
(PTIC Pad)
Bias
Figure 7. PTIC Orientation Functional Block
Diagram
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5
TCP−3168H
PART NUMBER DEFINITION
Table 4. PART NUMBERS
Capacitance
2 V
20 V
Part Number
Package*
TCP−3168H-DT
6.80
1.70
12-bump WLCSP
*See PTIC package dimensions on following page.
For information on device numbering and ordering codes,
please download the Device Nomenclature technical note
(TND310/D) from www.onsemi.com.
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6
TCP−3168H
PACKAGE DIMENSIONS
WLCSP12, 1.13x0.65
CASE 567KG
ISSUE A
NOTES:
E
A
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
4. BACKSIDE TAPE APPLIED TO IMPROVE
PIN 1 MARKING.
PIN A1
REFERENCE
10X b1
10X b
0.05
0.03
C
C
A B
MILLIMETERS
DIM
A
A1
b
b1
D
E
MIN
0.275
0.045
0.079
0.044
MAX
0.345
0.085
0.129
0.094
DETAIL A
2X
0.05
0.05
C
2X
C
1.134 BSC
TOP VIEW
0.652 BSC
0.150 BSC
0.159 BSC
0.300 BSC
0.460 BSC
0.425 BSC
e
2X b
DETAIL C
e1
e2
e3
e4
2X b1
A
C
0.06
0.05
C
C
0.05
C
C
A B
0.03
DETAIL B
A1
SEATING
PLANE
RECOMMENDED
SOLDERING FOOTPRINT*
NOTE 3
SIDE VIEW
0.57
2X
0.13
e3
DETAIL A
2X
0.15
NOTE 4
TAPE
A1
e
F
E
D
C
B
PACKAGE
OUTLINE
0.52
e1
0.51
e2
2X
0.75
A
DETAIL C
2X
0.13
1
2
DETAIL B
0.59
e4
BOTTOM VIEW
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ParaScan is a trademark of Paratek Microwave, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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TCP−3168H/D
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