UAA2016AD [ONSEMI]
Zero Voltage Switch Power Controller; 零电压开关电源控制器
| 型号： | UAA2016AD |
| 厂家： | 
ONSEMI |
| 描述： | Zero Voltage Switch Power Controller |
| 文件： | 总12页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UAA2016
Zero Voltage Switch
Power Controller
The UAA2016 is designed to drive triacs with the Zero Voltage
technique which allows RFI−free power regulation of resistive loads.
Operating directly on the AC power line, its main application is the
precision regulation of electrical heating systems such as panel heaters
or irons.
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A built−in digital sawtooth waveform permits proportional
temperature regulation action over a 1°C band around the set point.
For energy savings there is a programmable temperature reduction
function, and for security a sensor failsafe inhibits output pulses when
the sensor connection is broken. Preset temperature (i.e. defrost)
application is also possible. In applications where high hysteresis is
needed, its value can be adjusted up to 5°C around the set point. All
these features are implemented with a very low external component
count.
ZERO VOLTAGE SWITCH
POWER CONTROLLER
MARKING
DIAGRAMS
PDIP−8
UAA2016P
P SUFFIX
CASE 626
AWL
YYWWG
8
1
Features
• Zero Voltage Switch for Triacs, up to 2.0 kW (MAC212A8)
• Direct AC Line Operation
• Proportional Regulation of Temperature over a 1°C Band
• Programmable Temperature Reduction
• Preset Temperature (i.e. Defrost)
• Sensor Failsafe
• Adjustable Hysteresis
• Low External Component Count
• Pb−Free Packages are Available
8
1
SOIC−8
D SUFFIX
CASE 751
8
2016x
ALYW
G
1
x
A
= A or D
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G, G
= Pb−Free Package
(Note: Microdot may be in either location)
UAA2016
Failsafe
3
Sampling
Full Wave
Logic
PIN CONNECTIONS
6
Pulse
Amplifier
+
−
Sense Input
Output
V
1
2
Sync
8
7
6
5
ref
7
4
V
Internal
Reference
Hys. Adj.
Sensor
CC
+
+
1/2
+
+V
Temperature
Reduction
CC
3
4
Output
V
Temp. Reduc.
EE
Synchronization
4−Bit DAC
2
(Top View)
Supply
Voltage
Hysteresis
Adjust
11−Bit Counter
(Sawtooth
Generator)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
1
Voltage
Reference
8
5
Sync
V
EE
Figure 1. Representative Block Diagram
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
January, 2006 − Rev. 9
UAA2016/D
UAA2016
MAXIMUM RATINGS (Voltages referenced to Pin 7)
Rating
Symbol
Value
15
Unit
mA
mA
mA
V
Supply Current (I
)
I
CC
Pin 5
Non−Repetitive Supply Current, (Pulse Width = 1.0 ms)
AC Synchronization Current
I
I
200
3.0
CCP
sync
Pin Voltages
V
V
V
V
0; V
0; V
0; V
Pin 2
Pin 3
Pin 4
Pin 6
ref
ref
ref
EE
0; V
V
Current Sink
I
1.0
150
mA
mA
ref
Pin 1
Output Current (Pin 6), (Pulse Width < 400 ms)
Power Dissipation
I
O
P
625
mW
°C/W
°C
D
Thermal Resistance, Junction−to−Air
Operating Temperature Range
R
100
q
JA
T
A
− 20 to + 85
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS (T = 25°C, V = −7.0 V, voltages referred to Pin 7, unless otherwise noted.)
A
EE
Characteristic
Symbol
Min
−
Typ
0.9
−9.0
−5.5
100
−
Max
1.5
−8.0
−4.5
130
10
Unit
mA
V
Supply Current (Pins 6, 8 not connected), (T = − 20° to + 85°C)
I
A
CC
Stabilized Supply Voltage (Pin 5), (I = 2.0 mA)
V
−10
−6.5
90
CC
EE
Reference Voltage (Pin 1)
V
I
V
ref
Output Pulse Current (T = − 20° to + 85°C), (R = 60 W, V = − 8.0 V)
mA
mA
A
out
EE
O
Output Leakage Current (V = 0 V)
I
−
out
OL
Output Pulse Width (T = − 20° to + 85°C) (Note 1), (Mains = 220 Vrms, R
= 220 kW)
T
P
50
−
100
+10
0.1
−
ms
A
sync
Comparator Offset (Note 5)
Sensor Input Bias Current
Sawtooth Period (Note 2)
Sawtooth Amplitude (Note 6)
V
−10
−
−
mV
mA
off
IB
I
−
T
A
−
40.96
70
sec
mV
mV
mV
mV
mV
S
50
90
S
Temperature Reduction Voltage (Note 3), (Pin 4 Connected to V
Internal Hysteresis Voltage, (Pin 2 Not Connected)
)
CC
V
280
−
350
10
420
−
TR
V
IH
Additional Hysteresis (Note 4), (Pin 2 Connected to V
)
CC
V
280
180
350
−
420
300
H
Failsafe Threshold (T = − 20° to + 85°C) (Note 7)
V
FSth
A
1. Output pulses are centered with respect to zero crossing point. Pulse width is adjusted by the value of R . Refer to application curves.
sync
2. The actual sawtooth period depends on the AC power line frequency. It is exactly 2048 times the corresponding period. For the 50 Hz case
it is 40.96 sec. For the 60 Hz case it is 34.13 sec. This is to comply with the European standard, namely that 2.0 kW loads cannot be connected
or removed from the line more than once every 30 sec. The inertia of most heating systems combined with the UAA2016 will comply with
the European Standard.
3. 350 mV corresponds to 5°C temperature reduction. This is tested at probe using internal test pad. Smaller temperature reduction can be
obtained by adding an external resistor between Pin 4 and V . Refer to application curves.
CC
4. 350 mV corresponds to a hysteresis of 5°C. This is tested at probe using internal test pad. Smaller additional hysteresis can be obtained
by adding an external resistor between Pin 2 and V . Refer to application curves.
CC
5. Parameter guaranteed but not tested. Worst case 10 mV corresponds to 0.15°C shift on set point.
6. Measured at probe by internal test pad. 70 mV corresponds to 1°C. Note that the proportional band is independent of the NTC value.
7. At very low temperature the NTC resistor increases quickly. This can cause the sensor input voltage to reach the failsafe threshold, thus inhibiting
output pulses; refer to application schematics. The corresponding temperature is the limit at which the circuit works in the typical application.
By setting this threshold at 0.05 V , the NTC value can increase up to 20 times its nominal value, thus the application works below − 20°C.
ref
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2
UAA2016
S2
S1
R
S
UAA2016
Failsafe
R
R
R
R
3
def
2
1
MAC212A8
3
Sampling
Full Wave
Logic
R
6
7
out
+
−
Pulse
Amplifier
Sense Input
Output
4
Internal
Reference
+
+
+
1/2
+V
CC
Temp. Red.
C
F
4−Bit DAC
2
Supply
Voltage
Hys
Adj
Load
11−Bit Counter
Synchronization
1
V
ref
5
8
Sync
V
EE
R
R
S
sync
Figure 1. Application Schematic
APPLICATION INFORMATION
(For simplicity, the LED in series with R is omitted in
The load current is then:
out
the following calculations.)
Ǹ
I
+ (Vrms 2 sin(2pft)–V )ńR
Load
TM
L
Triac Choice and Rout Determination
where V is the maximum on state voltage of the triac, f is
the line frequency.
TM
Depending on the power in the load, choose the triac that
has the lowest peak gate trigger current. This will limit the
output current of the UAA2016 and thus its power
Set ILoad = ILatch for t = TP/2 to calculate TP.
consumption. Use Figure 4 to determine R according to
Figures 6 and 7 give the value of T which corresponds to
P
out
the triac maximum gate current (I ) and the application
the higher of the values of I
and I
, assuming that
GT
Hold
Latch
low temperature limit. For a 2.0 kW load at 220 Vrms, a good
triac choice is the ON Semiconductor MAC212A8. Its
maximum peak gate trigger current at 25°C is 50 mA.
V
= 1.6 V. Figure 8 gives the R
that produces the
TM
sync
corresponding T .
P
RSupply and Filter Capacitor
For an application to work down to − 20°C, R should be
out
With the output current and the pulse width determined as
above, use Figures 9 and 10 to determine R , assuming
that the sinking current at V pin (including NTC bridge
60 W. It is assumed that: I (T) = I (25°C) ꢀ exp (−T/125)
GT
GT
Supply
with T in °C, which applies to the MAC212A8.
ref
Output Pulse Width, Rsync
current) is less than 0.5 mA. Then use Figure 11 and 12 to
The pulse with T is determined by the triac’s I
, I
determine the filter capacitor (C ) according to the ripple
P
Hold Latch
F
together with the load value and working conditions
(frequency and voltage):
desired on supply voltage. The maximum ripple allowed is
1.0 V.
Given the RMS AC voltage and the load power, the load
value is:
Temperature Reduction Determined by R1
RL = V2rms/POWER
(Refer to Figures 13 and 14.)
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3
UAA2016
Overshoot
Proportional Band
Room
Temperature
T (°C)
Time (minutes, Typ.)
Time (minutes, Typ.)
Heating
Power
P(W)
Time (minutes, Typ.)
Time (minutes, Typ.)
Proportional Temperature Control
ON/OFF Temperature Control
DꢀReduced Overshoot
DꢀLarge Overshoot
DꢀGood Stability
DꢀMarginal Stability
Figure 2. Comparison Between Proportional Control and ON/OFF Control
T
is centered on the zero−crossing.
P
T
P
AC Line
Waveform
I
Hold
I
Latch
Gate Current
Pulse
f = AC Line Frequency (Hz)
Vrms = AC Line RMS Voltage (V)
R = Synchronization Resistor (W)
sync
5
14ꢁxꢁR
syncꢁ )ꢁ 7ꢁ ꢁ 10
T
+
(μs)
P
Vrmsꢁ ꢁ Ǹ
2ꢁ xꢁpf
Figure 3. Zero Voltage Technique
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4
UAA2016
CIRCUIT FUNCTIONAL DESCRIPTION
Sawtooth Generator
Power Supply (Pin 5 and Pin 7)
The application uses a current source supplied by a single
high voltage rectifier in series with a power dropping
In order to comply with European norms, the ON/OFF
period on the load must exceed 30 seconds. This is achieved
by an internal digital sawtooth which performs the
proportional regulation without any additional components.
The sawtooth signal is added to the reference applied to the
comparator inverting input. Figure 2 shows the regulation
improvement using the proportional band action. Figure 4
displays a timing diagram of typical system performance
using the UAA2016. The internal sawtooth generator runs
at a typical 40.96 sec period. The output duty cycle drive
waveform is adjusted depending on the time within the
40.96 sec period the drive needs to turn on. This occurs when
the voltage on the sawtooth waveform is above the voltage
provided at the Sense Input.
resistor. An integrated shunt regulator delivers a V
EE
voltage of − 8.6 V with respect to Pin 7. The current used by
the total regulating system can be shared in four functional
blocks: IC supply, sensing bridge, triac gate firing pulses and
zener current. The integrated zener, as in any shunt
regulator, absorbs the excess supply current. The 50 Hz
pulsed supply current is smoothed by the large value
capacitor connected between Pins 5 and 7.
Temperature Sensing (Pin 3)
The actual temperature is sensed by a negative
temperature coefficient element connected in a resistor
divider fashion. This two element network is connected
between the ground terminal Pin 5 and the reference voltage
− 5.5 V available on Pin 1. The resulting voltage, a function
of the measured temperature, is applied to Pin 3 and
internally compared to a control voltage whose value
depends on several elements: Sawtooth, Temperature
Reduction and Hysteresis Adjust. (Refer to Application
Information.)
Noise Immunity
The noisy environment requires good immunity. Both the
voltage reference and the comparator hysteresis minimize
the noise effect on the comparator input. In addition the
effective triac triggering is enabled every 1/3 sec.
Failsafe
Output pulses are inhibited by the “failsafe” circuit if the
comparator input voltage exceeds the specified threshold
voltage. This would occur if the temperature sensor circuit
is open.
Temperature Reduction
For energy saving, a remotely programmable temperature
reduction is available on Pin 4. The choice of resistor R
1
connected between Pin 4 and V
reduction level.
sets the temperature
CC
Sampling Full Wave Logic
Two consecutive zero−crossing trigger pulses are
generated at every positive mains half−cycle. This ensures
that the number of delivered pulses is even in every case. The
pulse length is selectable by R
pulse is centered on the zero−crossing mains waveform.
Comparator
When the noninverting input (Pin 3) receives a voltage
less than the internal reference value, the comparator allows
the triggering logic to deliver pulses to the triac gate. To
improve the noise immunity, the comparator has an
adjustable hysteresis. The external resistor R connected to
Pin 2 sets the hysteresis level. Setting Pin 2 open makes a
10 mV hysteresis level, corresponding to 0.15°C. Maximum
hysteresis is obtained by connecting Pin 2 to V . In that
case the level is set at 5°C. This configuration can be useful
for low temperature inertia systems.
connected on Pin 8. The
sync
Pulse Amplifier
3
The pulse amplifier circuit sinks current pulses from Pin
6 to V . The minimum amplitude is 70 mA. The triac is
EE
then triggered in quadrants II and III. The effective output
current amplitude is given by the external resistor R
Eventually, an LED can be inserted in series with the Triac
gate (see Figure 1).
CC
.
out
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5
UAA2016
Triac On
Load Voltage
Triac Off
Output Pin
1/2 V
CC
40.96 sec
From Temperature
Sensor (Sense Input)
Figure 4.
200
180
160
140
120
100
80
100
80
60
40
20
0
T
= +10°C
A
T
A
= 0°C
T
= + 85°C
A
T
A
= − 20°C
T
A
= − 20°C
60
T
= −10°C
A
40
20
30
40
50
60
40
60
80
100
120
140
160
180 200
I , TRIAC GATE CURRENT SPECIFIED AT 25°C (mA)
GT
R , OUTPUT RESISTOR (W)
out
Figure 5. Output Resistor versus
Triac Gate Current
Figure 6. Minimum Output Current
versus Output Resistor
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6
UAA2016
120
100
80
120
F = 50 Hz
2.0 kW Loads
100
80
60
40
20
V
T
= 1.6 V
TM
= 25°C
A
110 Vrms
220 Vrms
110 Vrms
220 Vrms
60
F = 50 Hz
1.0 kW Loads
40
20
V
T
= 1.6 V
TM
= 25°C
A
0
10
20
30
40
50
60
0
10
20
30
40
50
60
I
, MAXIMUM TRIAC LATCH CURRENT (mA)
I
, MAXIMUM TRIAC LATCH CURRENT (mA)
Latch(max)
Latch(max)
Figure 7. Output Pulse Width versus
Maximum Triac Latch Current
Figure 8. Output Pulse Width versus
Maximum Triac Latch Current
400
60
50
40
30
F = 50 Hz
V = 220 Vrms
F = 50 Hz
300
200
100
0
220 Vrms
110 Vrms
80
T
= 50 ms
P
100 ms
150 ms
200 ms
20
0
20
40
60
100
25
50
I , OUTPUT CURRENT (mA)
75
100
T , OUTPUT PULSE WIDTH (ms)
P
O
Figure 9. Synchronization Resistor
versus Output Pulse Width
Figure 10. Maximum Supply
Resistor versus Output Current
30
90
80
70
60
50
Ripple = 1.0 Vp−p
F = 50 Hz
V = 110 Vrms
F = 50 Hz
25
20
15
10
200 ms
T
= 50 ms
P
150 ms
100 ms
100 ms
150 ms
T
= 50 ms
P
200 ms
40
0
0
25
50
I , OUTPUT CURRENT (mA)
75
100
20
40
60
80
100
I , OUTPUT CURRENT (mA)
O
O
Figure 11. Maximum Supply Resistor
versus Output Current
Figure 12. Minimum Filter Capacitor
versus Output Current
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7
UAA2016
7.0
180
160
140
120
100
80
Setpoint = 20°C
Ripple = 0.5 V
F = 50 Hz
p−p
6.0
5.0
4.0
3.0
2.0
200 ms
150 ms
100 ms
10 kW NTC
1.0
0
100 kW NTC
T
= 50 ms
P
0
20
40
60
80
100
0
10
20
30
40 50
60
70
80 90 100
I , OUTPUT CURRENT (mA)
O
R , TEMPERATURE REDUCTION RESISTOR (kW)
1
Figure 13. Minimum Filter Capacitor
versus Output Current
Figure 14. Temperature Reduction versus R1
4
3
2
6.0
5.6
5.2
R = 0
1
100 kW NTC
10 kW NTC
10 kW NTC
4.8
100 kW NTC
1
0
4.4
4.0
10
14
18
22
26
30
0
5
10
T , PRESET TEMPERATURE (°C)
DEF
15
20
25
30
T , TEMPERATURE SETPOINT (°C)
S
Figure 15. Temperature Reduction versus
Temperature Setpoint
Figure 16. RDEF versus Preset Temperature
8
6
4
2
0
0.5
T
= 4°C
DEF
0.4
0.3
0.2
0.1
10 kW NTC
= 29 kW
R
DEF
100 kW NTC
= 310 kW
R
DEF
0
0
100
200
300
400
10
14
18
22
26
30
34
R , HYSTERESIS ADJUST RESISTOR (kW)
3
T , TEMPERATURE SETPOINT (°C)
S
Figure 17. RS + R2 versus Preset Setpoint
Figure 18. Comparator Hysteresis versus R3
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8
UAA2016
ORDERING INFORMATION
Device
†
Operating Temperature Range
Package
Shipping
UAA2016D
SOIC−8
98 Units / Rail
98 Units / Rail
UAA2016DG
SOIC−8
(Pb−Free)
UAA2016AD
SOIC−8
98 Units / Rail
98 Units / Rail
T = −20° to +85°C
A
UAA2016ADG
SOIC−8
(Pb−Free)
UAA2016P
PDIP−8
1000 Units / Rail
1000 Units / Rail
UAA2016PG
PDIP−8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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9
UAA2016
PACKAGE DIMENSIONS
PDIP−8
P SUFFIX
CASE 626−05
ISSUE L
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
8
5
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−B−
MILLIMETERS
DIM MIN MAX
INCHES
MIN
1
4
MAX
0.400
0.260
0.175
0.020
0.070
A
B
C
D
F
9.40
6.10
3.94
0.38
1.02
10.16 0.370
6.60 0.240
4.45 0.155
0.51 0.015
1.78 0.040
F
−A−
NOTE 2
L
G
H
J
2.54 BSC
0.100 BSC
0.76
0.20
2.92
1.27 0.030
0.30 0.008
3.43
0.050
0.012
0.135
K
L
0.115
C
7.62 BSC
0.300 BSC
M
N
−−−
0.76
10
−−−
1.01 0.030
10
0.040
_
_
J
−T−
SEATING
PLANE
N
M
D
K
G
H
M
M
M
B
0.13 (0.005)
T
A
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10
UAA2016
PACKAGE DIMENSIONS
SOIC−8
D SUFFIX
CASE 751−07
ISSUE AG
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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11
UAA2016
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
UAA2016/D
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