AN8013SH [PANASONIC]

Single-channel step-up or step-down DC-DC converter control IC; 单通道升压或降压型DC -DC转换器控制IC
AN8013SH
型号: AN8013SH
厂家: PANASONIC    PANASONIC
描述:

Single-channel step-up or step-down DC-DC converter control IC
单通道升压或降压型DC -DC转换器控制IC

转换器
文件: 总15页 (文件大小:126K)
中文:  中文翻译
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Voltage Regulators  
AN8013SH  
Single-channel step-up or step-down  
DC-DC converter control IC  
Unit: mm  
Overview  
The AN8013SH is a single-channel PWM DC-DC  
converter control IC. This IC implements DC-DC con-  
verters that provide a single arbitrary output voltage that  
is either a stepped-up or stepped-down level. It features a  
wide operating supply voltage range, low power, and a  
built-in overcurrent protection circuit to protect the  
switching transistor from damage or destruction. The  
AN8013SH is provided in a 0.5 mm pitch 10-pin surface  
mounting package and is optimal for use in miniature  
high-efficiency portable power supplies.  
1
5
10  
6
0.5±0.2  
4.3±0.30  
6.3±0.30  
Features  
SSOP010-P-0225  
Wide operating supply voltage range (3.6 V to 34 V)  
Small consumption current (2.4 mA typical)  
Supports control over a wide output frequency range:  
20 kHz to 500 kHz.  
Built-in pulse-by-pulse overcurrent protection circuit  
(Detection voltage: VCC 100 mV)  
Pin Descriptions  
CLM  
RT  
1
2
3
10 VCC  
9
8
7
6
Out  
GND  
IN−  
FB  
CT  
S.C.P. 4  
DTC  
Built-in timer latch short-circuit protection circuit  
(charge current 1.3 µA typical)  
5
Incorporating the under-voltage lock-out (U.V.L.O.) circuit  
Built-in reference voltage circuit (Error amplifier reference input: 0.75 V (allowance: ±4%))  
Output block is open-collector (darlington) type.  
High absolute maximum rating of output current (100 mA)  
Duty ratio with small sample-to-sample variations (55% ± 5%).  
Adopts a 0.5-mm lead pitch 10-pin small outline package  
Applications  
Switching mode power supply units (in portable equipment and other applications)  
1
AN8013SH  
Voltage Regulators  
Block Diagram  
OSC  
VREF  
RT  
PWM  
9
Out  
0.1 V  
VREF  
S
R
Latch  
VREF  
RT  
6
7
FB  
VREF  
8
GND  
Error amp.  
0.75 V  
S.C.P. comp.  
1.90 V  
R
0.75 V  
S
R
IN−  
S
Q
Latch  
U.V.L.O.  
Absolute Maximum Ratings at Ta = 25°C  
Parameter  
Supply voltage  
Symbol  
Rating  
35  
Unit  
V
VCC  
CLM pin allowable application voltage VCLM  
Error amplifier allowable input voltage VIN−  
35  
V
0.3 to +2.5  
2.5  
V
DTC pin allowable input voltage  
Out pin allowable application voltage  
Collector output current  
VDTC  
VOUT  
IOUT  
PD  
V
35  
V
100  
mA  
mW  
°C  
°C  
Power dissipation (Ta = 85°C)  
Operating ambient temperature  
Storage temperature  
154  
Topr  
Tstg  
30 to +85  
55 to +150  
Recommended Operating Range at Ta = 25°C  
Parameter  
Supply voltage rise time (0 to 3.6 V)  
Collector output voltage  
Collector output current  
Timing capacitance  
Symbol  
Min  
Max  
Unit  
µs  
tr (VCC  
VOUT  
IOUT  
CT  
)
10  
34  
50  
V
mA  
pF  
100  
5.1  
1 800  
15  
Timing resistance  
RT  
kΩ  
kHz  
pF  
Oscillator frequency  
fOUT  
CSCP  
20  
500  
Short-circuit protection time constant setting  
capacitor  
1 000  
2
Voltage Regulators  
AN8013SH  
Electrical Characteristics at Ta = 25°C  
Parameter  
U.V.L.O. block  
Symbol  
Conditions  
Min  
Typ Max Unit  
Circuit operation start voltage  
Hysteresis width  
VUON  
VHYS  
2.8  
3.1  
3.4  
V
100  
200  
300  
mV  
Error amplifier block  
Input threshold voltage  
VTH  
Voltage follower  
0.72 0.75 0.78  
mV  
mV  
Line regulation with input fluctuation Vdv  
Voltage follower,  
2
8
VCC = 3.6 V to 34 V  
Input bias current  
IB  
500 25  
nA  
V
High-level output voltage  
VEH  
VEL  
Vdt1  
2.0  
Low-level output voltage  
Input threshold voltage temperature  
characteristics 1  
0.3  
V
Voltage follower,  
±1  
±1  
%
Ta = 30°C to +25°C  
Voltage follower,  
Input threshold voltage temperature  
characteristics 2  
Vdt2  
%
Ta = 25°C to +85°C  
Output sink current  
Output source current  
Open-loop gain  
ISINK  
VFB = 0.9 V  
8
mA  
µA  
dB  
ISOURCE VFB = 0.9 V  
120  
70  
AV  
PWM Comparator Block  
Input threshold voltage: high  
Input threshold voltage: low  
Input current  
VDT-H Duty: 100%  
VDT-L Duty: 0%  
IDTC  
1.2  
V
V
A
0.6  
12  
11  
10  
Output block  
Oscillation frequency  
Output duty  
fOUT  
Du  
RT = 15 k, CT = 150 pF  
185  
50  
205  
55  
225  
60  
kHz  
%
RDTC = 91 kΩ  
Output saturation voltage  
Output leak current  
RT pin voltage  
VOL  
IO = 50 mA, RT = 15 kΩ  
0.9  
1.2  
10  
V
ILEAK VCC = 34 V, when output Tr is off  
VRT  
µA  
V
0.59  
500  
±1  
Maximum oscillation frequency  
fOUT(max) RT = 5.1 kΩ, CT = 120 pF  
kHz  
%
Frequency supply voltage  
characteristics  
fdV  
fdT1  
fdT2  
fOUT = 200 kHz,  
VCC = 3.6 V to 34 V  
Frequency temperature  
characteristics 1  
fOUT = 200 kHz,  
Ta = −30°C to +25°C  
±3  
±3  
%
%
Frequency temperature  
characteristics 2  
fOUT = 200 kHz,  
Ta = 25°C to 85°C  
Note)  
At VCC = 12 V, RT = 15 k, CT = 15 pF, unless otherwise specified.  
3
AN8013SH  
Voltage Regulators  
Electrical Characteristics at Ta = 25°C (continued)  
Parameter  
Short-circuit protection circuit block  
Input threshold voltage  
Input standby voltage  
Input latch voltage  
Symbol  
Conditions  
Min  
Typ Max Unit  
VTHPC  
VSTBY  
VIN  
0.70 0.75 0.80  
V
V
120  
120  
1.6 1.3 1.0  
1.90  
mV  
µA  
V
Charge current  
ICHG  
VSCP = 0 V  
Comparator threshold voltage  
Overcurrent Protection Block  
Input threshold voltage  
Delay time  
VTHL  
VCLM  
tDLY  
VCC 120 VCC 100 VCC 80 mV  
200  
ns  
Whole device  
Total consumption current 1  
Total consumption current 2  
ICC  
RT = 15 kΩ  
2.4  
3.5  
mA  
mA  
ICC2  
RT = 5.1 kΩ, CT = 150 pF  
3.4  
Note)  
At VCC = 12 V, RT = 15 k, CT = 15 pF, unless otherwise specified.  
Terminal Equivalent Circuits  
Pin No.  
Pin  
I/O  
Function  
Internal equivalent circuit  
1
CLM  
I
Detects the overcurrent state in switching  
transistor.  
1
VCC  
0.1 V  
Insert a resistor with a low resistance between  
this pin and VCC to detect overcurrent states.  
When this pin falls to a level 100 mV or more  
lower than VCC, the PWM output is turned off  
for that period thus narrowing the width of  
the on period.  
CLM  
comp.  
50 µA  
50 µA  
(This implements a pulse-by-pulse  
overcurrent protection technique.)  
VREF  
2
RT  
I
Connection for the timing resistor that deter-  
mines the oscillator frequency.  
Use a resistor in the range 5.1 kto 15 k.  
Thus the pin voltage will be about 0.59 V.  
OSC PWM  
100 Ω  
S.C.P. DTC  
RT (V 0.59 V)  
2
3
CT  
O
Connection for the timing capacitor that  
determines the oscillator frequency.  
VREF  
To PWM input  
IO  
Use a capacitor in the range 100 to 1 800 pF.  
See the "Application Notes, [2] and [3]"  
sections later in this document for details on  
setting the frequency. Use an oscillator  
frequency in the range 20 kHz to 500 kHz.  
OSC  
comp.  
3
2IO  
4
Voltage Regulators  
AN8013SH  
Terminal Equivalent Circuits (continued)  
Pin No.  
Pin  
I/O  
Function  
Internal equivalent circuit  
4
S.C.P.  
O
Connection for the capacitor that determines  
the time constant for soft start and the timer  
latch short-circuit protection circuit.  
Use a capacitor with a value of 1 000 pF or  
higher.  
VREF  
ICHG  
Latch  
S
The charge current ICHG is determined by the  
timing resistor RT, and sample-to-sample and  
temperature variations can be suppressed.  
When RT is 15 k, the current will be about  
1.3 µA.  
Q
U.V.L.O.  
0.75 V  
R
4
VRT  
RT  
1
ICHG  
=
×
[A]  
30  
5
DTC  
I
Connection for the resistor and capacitor that  
determine the PWM output dead-time and the  
soft start period.  
VREF  
PWM  
The input current IDTC is determined by the  
timing resistor RT, and sample-to-sample and  
temperature variations can be suppressed.  
When RT is 15 k, the current will be about  
11 µA.  
IDTC  
U.V.L.O.  
CT  
5
VRT  
RT  
1
ICHG  
=
×
[A]  
3.6  
6
7
8
FB  
O
Error amplifier output  
VREF  
120 µA  
CT  
A source current is about 120 mA and a sink  
current is about 8 mA.  
PWM  
Correct the gain and the phase frequency  
characteristics by inserting a resistor and a  
capacitor between this pin and INpin.  
8 mA  
6
VREF  
IN−  
I
Error amplifier inverting input  
For common-mode input, use in the range  
0.1 V to +0.8 V.  
0.75 V  
7
GND  
Ground  
8
5
AN8013SH  
Voltage Regulators  
Terminal Equivalent Circuits (continued)  
Pin No.  
Pin  
I/O  
Function  
Internal equivalent circuit  
9
Out  
O
Open-collector (darlington) output  
The absolute maximum rating for the output  
current is 100 mA.  
VREF  
9
Use with a constant output current under 50  
mA.  
10  
VCC  
Power supply connection  
10  
Provide the operating supply voltage in  
the range 3.6 V to 34 V.  
Application Notes  
[1] Main characteristics  
Error amplifier input threshold voltage temperature  
characteristics  
Maximum duty ratio temperature characteristics  
0.760  
60  
VCC = 12 V  
VCC = 12 V  
CT = 200 pF  
RT = 15 kΩ  
Voltage follower  
0.758  
58  
56  
54  
52  
0.756  
0.754  
0.752  
0.750  
40 20  
0
20  
40  
60  
80  
100  
40 20  
0
20  
40  
60  
80  
100  
Ambient temperature Ta (°C)  
Ambient temperature Ta C)  
Oscillator frequency temperature characteristics  
Timing capacitance Oscillator frequency  
215  
1M  
VCC = 12 V  
CT = 200 pF  
RT = 15 kΩ  
VCC = 12 V  
Ta = 25°C  
210  
205  
200  
195  
RT = 5.1 kΩ  
100k  
RT = 15 kΩ  
10k  
40 20  
0
20  
40  
60  
80  
100  
100  
1 000  
10 000  
Ambient temperature Ta C)  
Timing capacitance CT (pF)  
6
Voltage Regulators  
AN8013SH  
Application Notes (continued)  
[1] Main characteristics (continued)  
Input threshold voltage line regulation  
Total consumption current line regulation  
0.765  
4.0  
3.5  
3.0  
2.5  
2.0  
Ta = 25°C  
Ta = 25°C  
0.760  
0.755  
0.750  
0.745  
RT = 5.1 kΩ  
RT = 15 kΩ  
0
5
10  
15  
20  
25  
30  
35  
0
5
10  
15  
20  
25  
30  
35  
Supply voltage VCC (V)  
Supply voltage VCC (V)  
Timing resistance  
Total consumption current  
Timing resistance  
Output saturation voltage  
3.5  
0.85  
VCC = 12 V  
VCC = 12 V  
IO = 50 mA  
Ta = 25°C  
T
a = 25°C  
0.84  
0.83  
0.82  
0.81  
0.80  
3.0  
2.5  
2.0  
4
8
12  
16  
20  
4
8
12  
16  
20  
Timing resistance RT (k)  
Timing resistance RT (k)  
7
AN8013SH  
Voltage Regulators  
Application Notes  
[2] Function descriptions  
1. Reference voltage block  
The reference voltage block is based on a band gap circuit, and outputs a temperature corrected reference  
voltage of 2.5 V. This reference voltage is stabilized once the supply voltage exceeds 3.6 V, and is used as the  
power supply for the IC itself.  
2. Triangular wave generator  
This circuit generates a triangular wave with a peak of about 1.45 V and a trough of about 0.35 V using a timing  
capacitor connected to the CT pin (pin 3) and a timing resistor connected to the RT pin (pin 2) respectively. The  
oscillator frequency can be set to arbitrary value by selecting appropriate values for the external capacitor and  
resistor, CT and RT. The triangular wave signal is provided to the inverting input the PWM comparator internally  
to the IC.  
3. Error amplifier  
FB  
This circuit is an PNP-transistor input error ampli-  
fier that detects and amplifies the DC-DC converter  
Internal 2.5 V  
output voltage, and inputs that signal to a PWM com-  
reference voltage  
6
VOUT  
parator.  
PWM  
comparator  
input  
R3  
R1  
A 0.75 V level is created by resistors dividing the  
internal reference voltage. This level is applied to the  
noninverting input.  
Arbitrary gain and phase compensation can be set  
up by inserting a resistor and capacitor in series  
between the error amplifier output pin (pin 6) and the  
inverting input pin (pin 7).  
Error amp.  
0.75 V  
IN−  
7
R4  
R2  
Figure 1. Connection method of error amplifier  
The output voltage VOUT is given by the following  
formula by connecting a resistor divider to the output  
as shown in figure 1.  
R1 + R2  
V
OUT = 0.75 ×  
R2  
4. Timer latch short-circuit protection circuit  
This circuit protects the external main switching element, flywheel diode, choke coil, and other components  
against degradation or destruction if an excessive load or a short circuit of the power supply output continues for  
longer than a certain fixed period.  
The timer latch short-circuit protection circuit detects the output of the error amplifier. If the DC-DC converter  
output voltage drops and an error amplifier output level exceeds 1.90 V, this circuit outputs a low level and the  
timer circuit starts. This starts charging the external protection circuit delay time capacitor.  
If the error amplifier output does not return to the normal voltage range before that capacitor reaches 0.75 V,  
the latch circuit latches, the output drive transistors are turned off, and the dead-time is set to 100%.  
5. Low input voltage malfunction prevention circuit (U.V.L.O.)  
This circuit protects the system against degradation or destruction due to incorrect control operation when the  
power supply voltage falls during power on or power off.  
The low input voltage malfunction prevention circuit detects the internal reference voltage that changes with  
the supply voltage level. While the supply voltage is rising, this circuit cuts off the output drive transistor until the  
reference voltage reaches 3.1 V. It also sets the dead-time to 100%, and at the same time holds the S.C.P. pin (pin  
4) at the low level. During the fall time of the power supply voltage, it has hysteresis width of 200 mV and operates  
2.9 V or less.  
8
Voltage Regulators  
AN8013SH  
Application Notes (continued)  
[2] Function descriptions (continued)  
6. PWM comparator  
The PWM comparator controls the output pulse on-period according to the input voltage. The output transistor  
is turned on during periods when the level of the CT pin (pin 3) triangular wave is lower than both of the error  
amplifier output (pin 6) and the DTC pin (pin 5) voltage.  
The dead-time is set by adding a resistor between the DTC pin and ground.  
Additionally, the AN8013SH can provide soft start operation in which the output pulse on-period is gradually  
lengthened according to an RC time constant when power is first applied by adding a capacitor in parallel with the  
resistor RDTC  
.
7. Overcurrent protection block  
Destruction of the main switching device, the flywheel diode, and the choke coil, which are easily damaged  
by overcurrents, is prevented by limiting the maximum current that flows in the switching device. This is imple-  
mented using the fact that power supply output overcurrents are proportional to the current flowing in the main  
switching device (a bipolar transistor).  
The AN8013SH detects the current by connecting a resistor with a low resistance between the main switching  
device and the VCC pin and monitoring the voltage drop across this resistor at the CLM pin (pin 1). When the main  
switching device (a bipolar transistor) is on and the CLM pin voltage reaches VCC minus 100 mV, which is the  
overcurrent detection threshold voltage, the AN8013SH shuts off the output transistor, thus controlling the main  
switching device so that currents in excess of the limit cannot occur. While this control operation is repeated at  
each period, once an overcurrent is detected the output transistor is turned off for the remainder of that period and  
is not turned on again until the next period. This type of overcurrent protection is called pulse-by-pulse overcurrent  
protection.  
8. Output block  
The output drive transistor is of open-collector type output in which transistors are darlington-connected with  
a grounded common emitter. The breakdown voltage of collector output terminal (pin 5) is 34 V and it is possible  
to obtain up to 100 mA output current.  
5
On at the next period  
3
Output off  
1.4 V  
0.4 V  
Triangle wave (CT)  
Error amplifier output (FB)  
High  
Low  
Output transistor collector  
waveform (Out)  
VCC  
Overcurrent protection input  
(CLM)  
VCC 100 mV  
1
2
Overcurrent detection  
Latch set  
TDLY : Delay time  
High  
Low  
Latch circuit set signal  
High  
Low  
Latch circuit reset signal  
4
Latch reset  
Figure 2. Pulse-by-pulse overcurrent protection operating waveforms  
9
AN8013SH  
Voltage Regulators  
Application Notes (continued)  
[3] Triangular wave oscillation circuit  
1. Setting the oscillator frequency  
The waveform of triangular wave oscillation is obtained by charging and discharging of the constant current  
IO from the external timing capacitor CT which is connected to CT pin (pin 3). The constant current is set by the  
externally attached timing resistor RT.  
The peak value of the wave VCTH and the trough value of the wave VCTL are fixed at about 1.45 V typical and  
0.35 V typical respectively.  
The oscillator frequency fOSC is obtained by the following formula:  
1
IO  
VCTH = 1.4 V typ.  
VCTL = 0.37 V typ.  
fOSC  
=
=
t1 + t2  
2 × CT × (VCTH VCHL)  
VRT  
RT  
0.59  
RT  
whereas IO = 1.8 ×  
= 1.8 ×  
t1  
t2  
because VCTH VCTL = 1.1 V  
Charging Discharging  
1
fOSC  
=
[Hz]  
2.07 × CT × RT  
T
Figure 3. Triangular wave oscillation waveform  
The output frequency fOUT is equal to fOSC since it is PWM-controlled.  
2. Usage notes  
This IC uses the constant current given by the timing resistor RT as the bias current of the triangular wave  
generator and the PWM comparator for consumption current reduction. The total consumption current is about 2.4  
mA typical when RT is 15 k, and it increases to about 3.4 mA typical when RT is 5.1 k. In order to obtain the  
constant output current of 100 mA at the open-collector output, it is necessary to set RT value to 15 kor smaller.  
It is possible to use the circuit in the recommended operating range of 20 kHz to 500 kHz of the oscillator  
frequency. As the AN8013SH is used at increasingly higher frequencies, the amount of overshoot and undershoot  
due to the operation delay in the triangular wave oscillator comparator increases, and discrepancies between the  
values calculated as described previously and the actual values may occur. See the timing capacitance - oscillator  
frequency relationship in the "Application Notes, [1] Main characteristics" section of this document.  
Note that this IC can not be used as an IC for slave when the several ICs are operated in parallel synchronous  
mode.  
[4] Setting the dead-time (maximum duty)  
The dead-time is set, as shown in figure 4, by setting the DTC pin (pin 5) voltage, VDTC. Since the DTC pin  
has a constant current output set with the resistor RT, VDTC is adjusted by adding the external resistor RDTC. The  
output duty, Du, and the DTC pin voltage, VDTC, are expressed by the following formulas. For an oscillator  
frequency of 200 kHz, the output duty will be 0% at VDTC = 0.45 V, and 100% at VDTC = 1.45 V. However, care  
is required here, since the amount of overshoot and undershoot in the triangular wave peak (VCTH) and minimum  
(VCTL) values depends on the oscillator frequency.  
10  
Voltage Regulators  
AN8013SH  
Application Notes (continued)  
[4] Setting the dead-time (maximum duty) (continued)  
CT waveform  
VCTH  
VREF  
IDTC  
DTC  
waveform  
VDTC  
VCTL  
VRT  
RT  
1
3.6  
IDTC  
=
×
[A]  
PWM  
CT  
FB  
tOFF  
Off  
tON  
On  
DTC  
RDTC  
OUT  
waveform  
Off  
CDTC  
tON  
Du  
=
=
× 100 [%]  
× 100 [%]  
tON + tOFF  
VCTH VDTC  
VCTH VCTL  
Example: When fOSC = 200 kHz (R = 15 k, C = 150 pF)  
T
T
VCTH 1.45 V (typ.)  
VRT 0.59 V (typ.)  
VDTC = IDTC × RDTC  
VCTL 0.35 V (typ.)  
IDTC 11 µA (typ.)  
RDTC  
1
×
= VRT  
×
[V]  
RT  
3.6  
Figure 4. Setting the dead-time  
Adding the external resistor RDTC and the capacitor CDTC in parallel implements a soft start function that causes  
the output pulse on width to increase gradually when the power supply is started. Use of this function can prevent  
DC-DC converter output overshoot.  
[5] Setting the time constant of the timer latch short-circuit protection circuit  
The structural block diagram of protection latch circuit is shown in figure 5. The comparator for short-circuit  
protection compares the output of error amplifier VFB with the reference voltage of 1.90 V all the time.  
When the load conditions of DC-DC converter output are stabilized, there is no fluctuation of error amplifier output,  
and the short-circuit protection comparator also keeps the balance. At this moment, the output transistor Q1 is in the  
conductive state and the S.C.P. pin is hold to about 30 mV through the clamp circuit.  
When the load conditions suddenly change, and high-level signal (1.90 V or higher) is input from the error amplifier  
to the non-inverted input of the short-circuit protection comparator, the short-circuit protection comparator outputs  
the low-level signal. Since this signal cuts off the output transistor Q1, the S.C.P. pin voltage VPE is released, and the  
externally connected capacitor CS starts charging according to the following equation :  
When the external capacitor CS has been charged up to about 0.75 V, it sets the latch circuit, cuts off the output drive  
transistor by enabling the low input voltage malfunction prevention circuit, and sets the dead-time at 100%.  
tPE  
VPE = VSTBY + ICHG  
×
[V]  
CS  
tPE  
0.75 V = 0.03 V + ICHG  
×
CS  
tPE  
CS = ICHG  
×
[F]  
0.72  
11  
AN8013SH  
Voltage Regulators  
Application Notes (continued)  
[5] Setting the time constant of the timer latch short-circuit protection circuit (continued)  
ICHG is the constant current determined by the oscillation timing resistor RT, and its dispersion and fluctuation with  
temperature are small. ICHO is expressed in the following equation :  
VRT  
RT  
1
ICHG  
=
×
[A]  
30  
VRT is about 0.5 V and ICHO becomes about 1.1 µA at RT = 15 k.  
Once the low input voltage malfunction prevention circuit is enabled, the S.C.P. pin voltage is discharged to about  
30 mV but the latch circuit is not reset unless the power is turned off.  
VREF  
ICHG  
PWM comparator input  
FB 6  
0.75 V  
Error amp.  
0.75 V  
Output cut-off  
S.C.P. comp.  
1.90 V  
R
S
R
IN−  
7
U.V.L.O.  
Latch  
Q1  
Q2  
4
S.C.P.  
CS  
Figure 5. Short-circuit protection circuit  
When the power supply is started, the output appears to be shorted. The error amplifier output goes to the high  
state, the S.C.P. pin voltage, VPE, is released, and charging starts. The external capacitor value must be set so that DC-  
DC converter voltage output starts before the latch circuit in the later stage is set. If the soft start function is used,  
special care is required to assure that the start time does not become excessive.  
12  
Voltage Regulators  
AN8013SH  
Application Notes (continued)  
[6] Timing chart  
VCC (0 V3.6 V)  
rise time  
tr (VCC) 10 [µs]  
Supply voltage (VCC  
)
3.6 V  
2.5 V  
3.1 V typ.  
Lock-out  
release  
Internal reference voltage  
Error amplifier output (FB)  
1.90 V  
1.40 V  
DTC pin voltage  
Triangular wave (CT)  
Power supply on  
0.40 V  
0.03 V  
High  
S.C.P. pin voltage  
Output transistor  
collector waveform  
(Out)  
Low  
Soft start operation  
Maximum duty  
Figure 6. PWM comparator operation waveform  
2.5 V  
Internal reference voltage  
Short-circuit protection input threshold level  
Comparator threshold level  
1.90 V  
1.40 V  
0.40 V  
Dead-time voltage (VDT  
)
Error amplifier output (FB)  
Triangular wave(CT)  
High  
Output transistor collector waveform  
(Out)  
Low  
0.75 V  
S.C.P. pin voltage  
0.03 V  
High  
Short-circuit protection comparator  
output  
tPE  
Low  
Figure 7. Short-circuit protection operation waveform  
13  
AN8013SH  
Voltage Regulators  
Application Circuit Examples  
1. Step-down circuit  
In  
Out  
+5 V  
62 kΩ  
11 kΩ  
SBD  
100 kΩ  
0.001µF  
f = 200 kHz  
Dumax = 80%  
R
DTC = 110 kΩ  
15 kΩ  
150 pF  
0.01 µF  
0.033 µF  
110 kΩ  
2. Step-up circuit  
SBD  
In  
Out  
+12 V  
150 kΩ  
10 kΩ  
100 kΩ  
0.001 µF  
f = 200 kHz  
Dumax = 80%  
RDTC = 110 kΩ  
15 kΩ  
150 pF  
0.01 µF  
0.033 µF  
110 kΩ  
14  
Voltage Regulators  
AN8013SH  
Application Circuit Examples (continued)  
3. On/off circuit example  
1) Cutting the power supply line  
Q3  
Q1  
In  
VO  
SBD  
ICC  
C10  
Q2  
On/off  
Standby current 0 µA  
2) Cutting the IC VCC line  
Q3  
SBD  
In  
VO  
Q1  
ICC  
C10  
Q2  
On/off  
Standby current 0 µA  
4. Usage  
Since this IC does not include an on/off circuit, an external circuit must be added to implement a standby function.  
If a switch (Q1) is inserted in the power supply line as shown in on/off circuit example 1, the standby current can  
be held to 0. In this circuit, a transistor essentially equivalent to the one used for the main switching device (Q3) is  
required.  
If a switch (Q1) is inserted between the power supply line and the IC VCC pin (pin 10) as shown in on/off circuit  
example 2, the size of the switching device (Q1) can be reduced. However, the sample-to-sample variations in the Q1  
saturation voltage will result in sample-to-sample variations in the overcurrent protection threshold level.  
5. Usage Notes  
If an external on/off circuit is added, the VCC rise time may become excessively steep and the IC internal latch circuit  
may be set at that time, causing problems at power supply startup. To avoid such problems, set the value of C10 so that  
the VCC (pin 10) rise time is at least 10 µs.  
15  

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