J3303 [PANASONIC]
Silicon P-channel MOS FET;
| 型号： | J3303 |
| 厂家： | 
PANASONIC |
| 描述： | Silicon P-channel MOS FET |
| 文件： | 总5页 (文件大小：579K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
This product complies with the RoHS Directive (EU 2002/95/EC).
FJ330301
Silicon P-channel MOS FET
For switching circuits
Overview
Package
FJ330301 is P-channel small signal MOS FET employed small size surface
mounting package.
ꢀCode
SSSMini3-F2-B
ꢀPin Name
1: Gate
Features
Low drain-source ON resistance: RDS(on) typ. = 4 W (VGS = -4.0 V)
High-speed switching
2: Source
3: Drain
Small size surface mounting package: SSSMini3-F2-B
Contributes to miniaturization of sets, reduction of component count.
Eco-friendly Halogen-free package
Marking Symbol: U1
Internal Connection
Packaging
(D)
3
Embossed type (Thermo-compression sealing): 10000 pcs / reel (standard)
Absolute Maximum Ratings Ta = 25°C
Parameter
Drain-source surrender voltage
Gate-source surrender voltage
Drain current
Symbol
VDSS
VGSS
ID
Rating
-30
Unit
V
1
2
V
±12
(G)
(S)
mA
mA
mW
°C
-100
Peak drain current
IDP
-200
Power dissipation
PD
100
Channel temperature
Storage temperature
T
ch
150
T
stg
–55 to +150
°C
Publication date: January 2011
Ver. CED
1
This product complies with the RoHS Directive (EU 2002/95/EC).
FJ330301
Electrical Characteristics Ta = 25°C±3°C
Parameter
Drain-source surrender voltage
Drain-source cutoff current
Gate-source cutoff current
Gate threshold voltage
Symbol
Conditions
ID = -1 mA, VGS = 0
Min
Typ
Max
Unit
V
VDSS
IDSS
IGSS
VTH
-30
VDS = -30 V, VGS = 0
VGS = ±10 V, VDS = 0
-1.0
±10
mA
mA
ID = -1.0 mA, VDS = -3.0 V
ID = -10 mA, VGS = -2.5 V
ID = -10 mA, VGS = -4.0 V
ID = -10 mA, VDS = -3 V
V
W
- 0.5
- 1.0
7
-1.5
17
7
Drain-source ON resistance
RDS(on)
4
W
Forward transfer admittance
20
40
mS
Yfs
Ciss
Short-circuit input capacitance (Common source)
Short-circuit output capacitance (Common source)
Reverse transfer capacitance (Common source)
12
7
pF
pF
pF
Coss
Crss
VDS = -3 V, VGS = 0, f = 1 MHz
3
VDD = -3 V, VGS = 0 V to -3 V,
ID = -10 mA
Turn-on time *
Turn-off time *
ton
100
100
ns
ns
VDD = -3 V, VGS = -3 V to 0 V,
ID = -10 mA
toff
Note) 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors.
2. : Test circuit
*
V
DD = −3 V
10%
I
D = −10 mA
VIN
R
L = 300 Ω
90%
VOUT
D
V
GS = 0 V to −3 V
90%
G
VIN
VOUT
10%
50 Ω
S
td(on) tr
td(off) tf
Ver. CED
2
This product complies with the RoHS Directive (EU 2002/95/EC).
FJ330301
ID VDS
ID VGS
RDS(on) VGS
103
−102
−10
−100
−80
−60
−40
−20
0
Ta = 25°C
ID = 0.01 A
Ta = 25°C
VGS = −4.5 V
VDS = −3 V
−2.5 V
102
10
1
Ta = 85°C
−1
25°C
−10−1
−30°C
−10−2
−10−3
−1.5 V
0
− 0.1 − 0.2 − 0.3 − 0.4 − 0.5
0
0
− 0.5
−1.0
−1.5
−2.0
−2
−4
−6
−8
−10
Drain-source voltage VDS (V)
Gate-source voltage VGS (V)
Gate-source voltage VGS (V)
RDS(on) ID
PD T
Safe operation area
a
102
10
120
100
80
−103
−102
−10
−1
Ta = 25°C
Ta = 25°C
Glass epoxy board
(25.4 mm× 25.4 mm × t0.8 mm) coated with
copper foil, which has more than 300 mm2.
IDP = − 0.2 A
Limited by
10 ms
RDS(on) = 7 Ω (max)
(VGS = −4.0 V)
VGS = −2.5 V
−4.0 V
1 s
100 ms
60
DC
1
40
20
0
10−1
−10−1
−1
−10
−102
0
−10−2
−10−1
−1
−10
−102
40
80
120
160
Drain-source voltage VDS (V)
Ambient temperature Ta (°C)
Drain current ID (mA)
Ciss , Crss , Coss VDS
Yfs ID
1
25
Ta = 25°C
Ta = 25°C
VDS = −3 V
20
15
10
5
10−1
10−2
10−3
Ciss
Coss
Crss
0
0
−10−1
−1
−10
−102
−5
−10
−15
−20
Drain current ID (mA)
(
)
Drain-source voltage VDS
V
Ver. CED
3
This product complies with the RoHS Directive (EU 2002/95/EC).
FJ330301
SSSMini3-F2-B
Unit: mm
1.20 ±0.05
0.30 +−00..0025
3
2
1
0.13 +−00..0025
0.20 +−00..0025
(0.4)
(0.4)
0.80 ±0.05
(5°)
Ver. CED
4
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semiconductors described in this book
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