MN101DP02JAC [PANASONIC]

Microcontroller, 8-Bit, UVPROM, 14.32MHz, CMOS, PQFP100, 18 X 18 MM, PLASTIC, QFP-100;


型号：	MN101DP02JAC
厂家：	PANASONIC
描述：	Microcontroller, 8-Bit, UVPROM, 14.32MHz, CMOS, PQFP100, 18 X 18 MM, PLASTIC, QFP-100 可编程只读存储器时钟微控制器外围集成电路
文件：	总4页 (文件大小：53K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ROM (

RAM (

8-bit)

MN101D02D , MN101D02F , MN101D02G ,

MN101D02H

VTR Servo

MN101D02D

72 K

MN101D02F

96 K

MN101D02G

128 K

MN101D02H

160 K

Type

2 K

3 K

4 K

5 K

QFP100-P-1818B ^{*Pb free}

Package

Minimum Instruction

Execution Time

With main clock operated

When sub-clock operated

0.1397 µs (at 4.0 V to 5.5 V, 14.32 MHz)

71.5 µs (at 2.2 V to 5.5 V fixed to 14.32 MHz internal frequency division)

61 µs (at 2.2 V to 5.5 V, 32.768 kHz)

• RESET • Runaway • External 0, 1, 2, 3, 4/key input (P50 to 54) • Timer 0 • Timer 1 • Timer 2 • Timer 3

• Timer 4 • Timer 6 • Capstan FG • Control • HSW • Cylinder FG • Servo VSYNC • Synchronous output

• OSD • XDS • Serial 0 • Serial 1 • Serial 2 • A/D (common with PWM 14 reference frequency)

• OSDVSYNC

Interrupts

Timer counter 0: 16-bit × 1

Timer Counter

(timer function, clock function [max. 2 s or max. 36 h at cascade-connecting with timer 6])

Clock source ····················· 1/2, 1/4, 1/8, 1/16 of system clock frequency; overflow of timer counter 6;

1/512 of XI oscillation clock or OSC oscillation clock frequency

Interrupt source ················ overflow of timer counter 0

Timer counter 1: 16-bit × 1 (timer function, linear timer counter function)

Clock source ····················· 1/2, 1/4, 1/8, 1/16 of system clock frequency; CTL signal

Interrupt source ················ overflow of timer counter 1

Timer counter 2: 16-bit × 1 (timer function, input capture (DCTL specified edge), duty judgment of DCTL

signal)

Clock source ····················· 1/2, 1/4, 1/8, 1/12, 1/16, 1/24 of system clock frequency

Interrupt source ················ overflow of timer counter 2; input of DCTL specified edge; underflow of timer

2 shift register 4-bit counter; coincidence of timer 2 shift register with timer 2

shift register compare register

Timer counter 3: 16-bit × 1

(timer function, detection of serial indexing, generation of remote control output carrier frequency)

Clock source ····················· 1/2, 1/4, 1/8, 1/16 of system clock frequency

Interrupt source ················ overflow of timer counter 3

Timer counter 4: 16-bit × 1 (timer function, event count [P15 input], generation of serial transmission clock)

Clock source ····················· 1/8, 1/16 of system clock frequency; external clock input

Interrupt source ················ overflow of timer counter 4; coincidence of timer counter 4 with OCR4

Timer counter 5: 19-bit × 1 (watchdog, stable oscillation waiting function)

Clock source ····················· system clock

Watchdog interrupt source ······· 1/2¹⁶, 1/2¹⁹of timer counter 5 frequency

Clear by stable oscillation ········ after 256 counts by timer counter 5 (2¹⁸counts of OSC oscillation clock)

Timer counter 6: 16-bit × 1 (clock function [max. 2 s])

Clock source ····················· 1/512 of OSC oscillation clock frequency; XI oscillation clock;

1/4, 1/8, 1/64, 1/128 of system clock frequency

Interrupt source ················ 1/2¹³, 1/2¹⁴, 1/2¹⁵overflow of timer counter 6

Serial 0: 8-bit × 1 (synchronous type/start-stop synchronous type) (transfer direction of MSB/LSB selectable)

Synchronous type clock source · 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency;

2-division timer 4 output; SBT0 pin input

Serial Interface

Clock for UART ··············· 8-division of above clock; 2-division timer 4 output; SBT0 pin input

Serial 1: 8-bit × 1

(synchronous type/remote control transmission/simple remote control receive) (transfer direction of MSB/LSB

selectable, start condition function)

Clock source ····················· 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency;

2-division timer 4 output; SBT1 pin input

Remote control clock ······ 2-division timer 4 output

MAD00028BEM

102

MN101D02D , MN101D02F , MN101D02G

MN101D02H

Serial 2: 8-bit × 1 (I²C) (master transmission/reception, slave transmission/reception)

Serial Interface (Continue)

OSD

Clock source ····················· 1/72, 1/80, 1/84, 1/96, 1/102, 1/112, 1/128, 1/144, 1/160, 1/168,

1/192, 1/224, 1/256, 1/320 of system clock; SCK pin input

Accommodation with menu or super impose display

Applicable broadcasting system

Screen configuration

Character type

: NTSC, PAL, PAL-M, PAL-N

: 24 characters × 2n rows (n = 1 to 6)

: max. 512 character types (variable)

: 12 × 18 dots

Character size

Enlarged characters

Character interpolation

Background color

Background intensity

Character color

: each × 2, × 3 or × 4 settings in horizontal and vertical

: none

: 8-hue settable (settable in the row unit at menu display)

: 8 gradations settable in the row unit

: white

Character intensity

Frame function

: 8 gradations settable in the row unit

: 1-dot frame in 4 or 8 directions

Frame intensity

: 4 gradations settable in the row unit

: settable in the character unit (only at composite output with 128 character

types or more)

Box shade function

Blinking

: none (covered by software)

Inverted character

Halftone

: settable in the character unit

: settable in the row unit in 2 intensity gradations (setting in the row unit)

: composite video signal input (output level: 1 V[p-p] / 2 V[p-p])

: sync chip clamp, clamp level in 4 levels

: composite video output

Input

Clamp method

Output

: digital output (6 pins)

8 character and background colors each settable at digital output.

Measure against image fluctuation : built-in AFC circuit

Sync signal detection function : detection functions for horizontal and vertical sync signals (integral system)

with horizontal sync signal interpolation function

Built-in U.S. closed caption data slicer (optional 2 line data can be extracted.)

XDS

Correcting address designation: up to 2 addresses possible

ROM Correction

Correction method: correction program being saved in internal RAM

• Common use: 73 ports 0, 1, 2, 4, 5, 6, 7, A, B (by bit)

• Common use: 4

I/O Pins

I/O

Input

8-bit × 12-ch. (without S/H)

A/D Inputs

PWM

13-bit × 2-ch. (at repetition cycle 572 µs, 14.32 MHz),

10-bit × 2-ch. (at repetition cycle 71.5 µs, 14.32 MHz),

14-bit × 1-ch. (at repetition cycle 1144 µs, 14.32 MHz)

18-bit × 6-ch.

ICR

16-bit × 7-ch. , 8-bit × 1-ch.

OCR

Buzzer output; 3-state output (PTO) VLP pin; synchronous output: 7; 3-state synchronous output: 4;

remote control receive; CTL amp; built-in FG amp;

Special Ports

output of 1/2 OSC oscillation clock (2 V[p-p]); output of 1/4 OSC oscillation clock (1 V[p-p])

VISS/VASS detection function

Notes

See the next page for electrical characteristics, pin assignment and support tool.

MAD00028BEM

103

Electrical Characteristics

Supply current

Limit

typ

Parameter

Symbol

Condition

Unit

min

max

100

IDD1

IDD2

14.32 MHz operation without load, VDD = 5 V

1/1024 of 14.32 MHz operation without load, VDD = 2.7 V

Stop of 14.32 MHz oscillation, VDD = 2.7 V

32 kHz oscillation operation without load

Operating supply current

IDD3

100

µ A

Supply current at STOP

Supply current at HALT

IDSP

Stop of oscillation without load, VDD = 5 V

14.32 MHz oscillation without load, VDD = 5 V

Stop of 14.32 MHz oscillation, VDD = 2.7 V

32 kHz oscillation operation without load

µ A

IDHT0

IDHT1

µ A

(Ta = 25°C 2°C , VSS = 0 V)

A/D Converter Performance

Parameter

Limit

Unit

Symbol

Condition

min

typ

max

Conversion relative error

A/D Conversion Time

Analog Input Voltage

∆NLAD

LSB

µ s

tAD

fosc = 14.32 MHz

(Ta = 25°C 2°C , VDD = 5.0 V , VSS = 0 V)

MAD00028BEM

104

MN101D02D , MN101D02F , MN101D02G

MN101D02H

Pin Assignment

CVIN2(PB4↔)

CVIN(PB5↔)

VSS2

100

TPZ(→P90)

AD11(↔PC3)

AD10(↔PC2)

AD9(↔PC1)

AD8(↔PC0)

AD7(↔P87)

AD6(↔P86)

AD5(↔P85)

AD4(↔P84)

AD3(↔P83)

AD2(↔P82)

AD1(↔P81)

AD0(↔P80)

LED7(↔P77)

LED6(↔P76)

LED5(↔P75)

LED4(↔P74)

LED3(↔P73)

LED2(↔P72)

LED1(↔P71)

LED0(↔P70)

ROTA(↔P67)

HAMP(↔P66)

DENV(↔P65)

CVOUT(PB6↔)

HSYNC(PB7↔)

VSYN(P20↔)

OSCO2(P21↔)

OSCI2(P22↔)

SXI

XO(P23↔)

XI(P24↔)

VSS

MN101D02D

MN101D02F

MN101D02G

MN101D02H

OSCI

OSCO

VDD

PWM14(P25↔)

PWM0

PWM1

SBUFD1(P11/PWM2↔)

SBUFD2(P12/PWM3↔)

SBUFD3(P13/FF15↔)

SBUFD4(P14/TC3O↔)

SBUFD5(P15/TC4I↔)

SBUFD6(OSDH/P16/XDSCK)

SBUFD7(OSDV/P17/OSCDIV/XDSDAT)

QFP100-P-1818B ^{*Pb free}

Support Tool

PX-ICE101C / D + PX-PRB101D02-QFP100-P-1818B

In-circuit Emulator

EPROM Built-in Type

Type

OTP: MN101DP02JAF [ES (Engineering Sample) available]

ATP: MN101DP02JAC [ES (Engineering Sample) available]

ROM (× 8-bit)

192 K

RAM (× 8-bit)

5 K

Minimum instruction execution time

0.1397 µs (at 4.0 V to 5.5 V, 14.32 MHz)

71.5 µs (at 2.2 V to 5.5 V, fixed to 14.32 MHz internal division)

OTP: QFP100-P-1818B ^{*Pb free}

ATP: with ceramic window

Package

MAD00028BEM

105

MN101DP02JAC [PANASONIC]

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