MN39571PT [PANASONIC]
9.2mm (type-1/2) 2,310k pixel CCD Area Image Sensor; 9.2毫米（类型1 /2） 2,310k像素的CCD面积图像传感器
| 型号： | MN39571PT |
| 厂家： | 
PANASONIC |
| 描述： | 9.2mm (type-1/2) 2,310k pixel CCD Area Image Sensor |
| 文件： | 总4页 (文件大小：49K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CCD Area Image Sensor
MN39571PT
9.2mm (type-1/2) 2,310k pixel CCD Area Image Sensor
■ Overview
The MN39571PT is a super high resolution CCD area
image sensor which includes 2,310k pixels in type-1/2
image format size.
Adopting RGB Bayer arrangement in primary color filter
array on chip provides excellent color reproduction. As
the aspect ratio of image area is 3:2 which is the same as
that of 35mm film, pictures can be taken in similar fram-
ing manner to use of a usual film camera.
As The MN39571PT has also a skipping readout mode
for image monitoring by LCD panel,you can fix the com-
position in real time.
Part Number
Size
System Color or B/W
IS Color
MN39571PT 9.2mm(type-1/2)
■ Features
• Photographic grade super high resolution by 2,310k
pixels in type-1/2 format
• Responds to 5:1 skipping readout mode for LCD moni-
toring
• The same aspect ratio of 3:2 as a 35mm film
• Newly developed small plastic package
Outline dimensions : 14.0mm(W) × 12.4mm(D) ×
3.4mm(t)(Without lead pins)
■ Applications
• Digital still camera
• FA, OA cameras
■ Device Configuration Diagram
Vertical dummy bit (No PD)
Al shielding (PD exists)
For transient (PD exists)
Valid pixels
OB part
81
2
1800
8
2
8
Vertical dummy bit (No PD)
Effective horizontal CCD
13
1901
1
Horizontal dummy bit
Horizontal dummy bit
1
MN39571PT
CCD Area Image Sensor
■ Pin Assignments
PW
RG
1
2
3
4
5
20
19
18
17
16
φV1
φV2
RD
OD
VO
φV3
φV4
φV5
LG
6
7
15
14
13
12
11
φV6
φV7
φV8
PT
OG
φH1
φH2
Sub
8
9
10
IS
(Top View)
■ Pin Descriptions
Pin No. Symbol
Descriptions
Pin No. Symbol
Descriptions
1
2
PW
RG
RD
OD
VO
LG
OG
φH1
φH2
Sub
IS
P-well
14
15
16
17
18
19
20
φV7
φV6
φV5
φV4
φV3
φV2
φV1
Vertical shift register
clock pulse 7
Reset gate
3
Reset drain
Vertical shift register
clock pulse 6
4
Output drain
5
Video output
Vertical shift register
clock pulse 5
6
Output load transistor gate
Output gate
7
Vertical shift register
clock pulse 4
8
Horizontal register clock pulse (1)
Horizontal register clock pulse (2)
Substrate
9
Vertical shift register
clock pulse 3
10
11
12
13
Horizontal CCD input source
P-well for protection circuit
Vertical shift register
clock pulse 2
PT
φV8
Vertical shift register
clock pulse 8
Vertical shift register
clock pulse 1
2
CCD Area Image Sensor
MN39571PT
■ Absolute Maximum Ratings and Operating Conditions
Rating
Operating condition
Parameter
Symbol
Unit
min
− 0.2
− 0.2
− 0.2
− 10.0
max
18.0
18.0
18.0
0.2
min
15.2
15.2
15.2
− 9.3
typ
15.5
15.5
15.5
− 9.0
0
max
15.8
15.8
15.8
− 8.7
Output drain voltage
Reset drain voltage
Input source voltage
Protection P-well voltage
P-well voltage
VOD
VRD
VIS
V
V
V
V
V
V
*2
VPT
VPW
VLG
Reference voltage
Output load transistor
gate voltage
Supplied internally
Output gate voltage
VOG
Supplied internally
V
V
V
V
*3
Resetꢀ
H-L
Bias
VφRG(H-L)
8.0
3.0
3.3
3.6
*3
pulse voltage
VφRG(Bias)
VφH1(H)
VφH1(L)
VφH2(H)
VφH2(L)
− 0.5
Supplied internally
Horizontal register
clock pulse voltage 1
Horizontal register
clock pulse voltage 2
Vertical shift register
8.0
3.0
3.3
0
3.6
− 0.2
− 0.2
3.0
0.2
3.6
8.0
3.3
0
V
V
− 0.2
18.0
− 0.2
15.2
− 0.2
− 9.3
15.2
− 0.2
− 9.3
− 0.2
− 9.3
− 0.2
− 9.3
0.2
*2
*2
*2
*2
*2
*2
*2
*2
*2
*2
VφV1,5(H)
VφV1,5(M)
VφV1,5(L)
VφV3,7(H)
VφV3,7(M)
VφV3,7(L)
VφV2,6(M)
VφV2,6(L)
VφV4,8(M)
VφV4,8(L)
15.5
0
15.8
0.2
clock pulse voltage 1,5
− 10.0
− 9.0
15.5
0
− 8.7
15.8
0.2
Vertical shift register
18.0
V
clock pulse voltage 3,7
− 10.0
15.0
− 9.0
0
− 8.7
0.2
Vertical shift register
clock pulse voltage 2,6
Vertical shift register
clock pulse voltage 4,8
Substrate voltage
V
V
V
− 10.0
15.0
− 9.0
0
− 8.7
0.2
− 10.0
− 9.0
− 8.7
*2
VSub
Supplied internally
45.0 26.5 27.0
25
*4,*5
φVSub
Topr
Tstg
− 0.2
− 10
− 30
27.5
Operating temperature
Storage temperature
60
70
°C
°C
Note)1. Standard light input defines
Standard light input is the one when the exposure is done at a lens aperture of F8, using a light source of 2856 K and 1050 nt, and
placing a color temperature conversion filter LB-40 (HOYA) and an IR cutting filter CAW-500 (t = 2.5 mm) in the light path.
2. *1: VSub internal settings guarantee blooming at 400 times light input of the standard light input.
3. *2: VPT is set so that the following conditions are set for VL of the vertical shift clock.
ꢀ
<
VPT VL
=
4. *3:
5. *4: VSub when using electronic shutter function
VφR(H)
H-L
φVSub "H"
φVSub(V)
φVSub "L"
VφR(L)
Bias (Internally)
VSub(V)
E
E
6. *5: Separate powor supply is recommended for φVSub
3
MN39571PT
CCD Area Image Sensor
■ Optical Characteristics
Saturatio Sensitivity Vertical
Horizontal Vertical
Image lag
output n
F8
smear
Sm
resolution resolution
Effective
Color
or
S/N
Part Number
pixelsꢀ typ
typ
typ
typ
typ
typ
B/W
H
V
(dB)
(mV)
(mV)
typ(%)
(%)
(TV-lines)
(TV-lines)
MN39571PT
Color 1816 1208
500
340
0.01
Note)1. 1/7.5 sec frame storage. Horizontal register clock frequency 24 MHz
2. *1: Mechanical shutter saturation output
ꢀ
■ Package Dimensions (Unit : mm)
• WDIP020-P-0500A
3.90±0.15
3.40±0.30
14.00±0.08
7.00±0.08
20
(0.38)
11
1.71±0.10
1
10
12.60±0.10
(0.60)
R0.15 ns
1.27
0.30±0.05
0.46 M
4
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