PI6C2408-4WIEX [PERICOM]
PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, SOIC-16;型号: | PI6C2408-4WIEX |
厂家: | PERICOM SEMICONDUCTOR CORPORATION |
描述: | PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, SOIC-16 驱动 光电二极管 逻辑集成电路 |
文件: | 总11页 (文件大小:406K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PI6C2408
Zero-Delay Clock Buffer
Features
Description
• Maximumratedfrequency:140MHz
• Lowcycle-to-cyclejitter
• Input to output delay, less than 150ps
• External feedback pin allows outputs to be synchronized
to the clock input
The PI6C2408 is a PLL-based, zero-delay buffer, with the ability
to distribute eight outputs of up to 140 MHz at 3.3 V. Two banks of
four outputs exist, and, depending on product option ordered, can
supply either reference frequency, prescaled half frequency, or
multiplied2xor4xinputclockfrequencies. ThePI6C2408familyhas
a power-sparing feature: when input SEL2 is 0, the component will
3-state one or both banks of outputs depending on the state of input
SEL1. A PLL bypass test mode also exists. This product line is
available in high-drive and industrial environment versions.
• 5VtolerantCLKINinput
• Operatesat3.3VVDD
• Test mode allows bypass of the PLL for system testing
purposes (e.g., IBIS measurements)
An external feedback pin is used to synchronize the outputs to the
input; the relationship between loading of this signal and the other
outputs determines the input-output delay.
• Clock frequency multipliers ½x to 4x dependent on option
• Packaging(Pb-freeandGreenavailable):
-16-pin,150-milSOIC (W)
The PI6C2408 is characterized for both commercial and industrial
operation.
-16-pin173-milTSSOP (L)
BlockDiagram
PinConfiguration
FB_IN
CLKIN
÷2
PLL
16
15 OUTA4
OUTA1
OUTA2
OUTA3
OUTA4
CLKIN
OUTA1
OUTA2
MUX
1
FB_IN
2
Option (-3, -4)
14
13
3
OUTA3
V
4 16-Pin
V
DD
DD
SEL1
SEL2
Decode
Logic
W, L 12
GND
GND
OUTB1
OUTB2
SEL2
5
6
7
8
11
10
9
OUTB4
OUTB3
SEL1
÷2
OUTB1
OUTB2
OUTB3
OUTB4
Option (-2, -3)
PI6C2408 (-1, -1H, -2, -3, -4)
FB_IN
PLL
OUTA1
OUTA2
OUTA3
OUTA4
MUX
CLKIN
SEL2
SEL1
Decode
Logic
÷2
MUX
PI6C2408-6
OUTB1
OUTB2
OUTB3
OUTB4
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PS8589K
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PI6C2408
Zero-DelayClockBuffer
Input Select Decoding for PI6C2408 (-1, -1H,-4)
SEL2
SEL1
OUTA [1-4]
3-State
PLL
OUTB [1-4]
3-State
3-State
CLKIN
PLL
Output Source
PLL
OFF
ON
0
0
1
1
0
1
0
1
PLL
PLL
CLKIN
PLL
CLKIN
PLL
OFF
ON
Input Select Decoding for PI6C2408 (-2,-3)
SEL2
SEL1
OUTA [1-4]
3-State
PLL
OUTB [1-4]
3-State
Output Source
PLL
PLL
OFF
ON
0
0
1
1
0
1
0
1
3-State
PLL
CLKIN
PLL
CLKIN/2
PLL
CLKIN
PLL
OFF
ON
Input Select Decoding for PI6C2408-6
SEL2
SEL1
OUTA [1-4]
OUTB [1-4]
3-State
Output Source
PLL
PLL
OFF
OFF
ON
0
0
1
1
0
1
0
1
3-State
CLKIN
PLL
CLKIN/2
PLL
CLKIN
PLL
PLL
PLL/2
PLL
ON
PI6C2408Configurations
Device
Feedback From
OUTA [1-4] Frequency
CLKIN
OUTB [1-4] Frequency
CLKIN
PI6C2408-1
OUTA or OUTB
OUTA or OUTB
OUTA
PI6C2408-1H
PI6C2408-2
CLKIN
CLKIN
CLKIN
CLKIN/2
PI6C2408-2
OUTB
2X CLKIN
2X CLKIN
4X CLKIN
2X CLKIN
CLKIN
CLKIN
PI6C2408-3
OUTA
CLKIN or CLKIN(1 )
PI6C2408-3
OUTB
2X CLKIN
PI6C2408-4
OUTA or OUTB
OUTA
2XCLKIN
PI6C2408-6
CLKIN or CLKIN/2
CLKIN
PI6C2408-6
OUTB
CLKIN or 2X CLKIN
Note:
1. Outputphaseisindeterminant(0°or180°fromCLKIN)
08-0298
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PI6C2408
Zero-DelayClockBuffer
PinDescription
Pin
Signal
Description
1
CLKIN
Input clock reference frequency (weak pull-down)
Clock output, Bank A (weak pull-down)
3.3V supply
2, 3, 14, 15
OUTA[1-4]
VDD
4, 13
5, 12
GND
Ground
6, 7, 10 ,11
OUTB[1-4]
SEL2
Clock output, Bank B (weak pull-down)
Select input, bit 2 (weak pull-up)
Select input, bit 1 (weak pull-up)
PLL feedback input
8
9
SEL1
16
FB_IN
ZeroDelayandSkewControl
CLKINInputtoOutputBankDelayvs.DifferenceinLoadingbetweenFB_INpinandOUTA/OUTBpins
800
600
400
200
0
0
5
10
15
20
25
-25
-20
-15
-10
-5
-200
-400
PI6C2408-1H
-600
-800
PI6C2408-1,2,3,4,6
-900
-1000
Output Load Difference: FB_IN Load - OUTA/OUTB Load (pF)
The relationship between loading of the FB_IN signal and other outputs determines the input-output delay. Zero delay is achieved when
all outputs, including feedback, are loaded equally.
MaximumRatings
Supply Voltage to Ground Potential ............................................................................................................................. –0.5Vto+7.0V
DCInputVoltage(ExceptCLKIN) ........................................................................................................................ –0.5VtoV +0.5V
DD
DCInputVoltageCLKIN ......................................................................................................................................................–0.5to7V
Storage Temperature................................................................................................................................................... –65ºCto+150ºC
MaximumSolderingTemperature(10seconds)........................................................................................................................... 260ºC
Junction Temperature .................................................................................................................................................................. 150ºC
StaticDischargeVoltage(perMIL-STD-883,Method3015) .................................................................................................... >2000V
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PI6C2408
Zero-DelayClockBuffer
OperatingConditions
Parameter
Description
Commercial
Industrial
Min.
3.0
3.135
0
Max.
3.6
3.465
70
Units
VDD
TA
Supply Voltage
V
Commerical Operating Temperature
Industrial Operating Temperature
Load Capacitance, below 100 MHz
Load Capacitance, from 100 MHz to 140MHz
Input Capacitance
ºC
pF
–40
⎯
85
30
CL
15
⎯
CIN
7
⎯
DCElectricalCharacteristicsforIndustrialTemperatureDevices
Parameter
VIL
Description
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Test Conditions
Min.
Max.
Units
0.8
V
VIH
IIL
2.0
VIN = 0V
50.0
100.0
0.4
μA
IIH
VIN = VDD
VOL
VOH
IOL = 8mA (–1, –2, –3,–4, –6); IOL = 12mA (–1H)
IOH = –8mA (–1, –2, –3,–4, –6); IOH = –12mA (–1H)
V
2.4
IDD (PD mode) Pwr Dwn Supply Current SEL1 = 0 (–1, –2, –3, –4, –1H); SEL2 = 0 (–6)
25.0
54.0
μA
IDD
Supply Current
Unloaded outputs 100 MHz,
Select inputs at VDD or GND
70.0 (–1H)
39.0
mA
Unloaded outputs 66 MHz, CLKIN, except (–1H)
Unloaded outputs 33MHz, CLKIN, except (–1H)
20.0
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PI6C2408
Zero-DelayClockBuffer
ACElectricalCharacteristicsforIndustrialTemperatureDevices
Parameters
Name
Test Conditions
Min. Typ. Max. Units
30pF load
15pF load
100
FO
Output Frequency
10
40
MHz
140
tDC
Duty Cycle(1)
(–1, –2, –3, –4, –6)
Measured at VDD/2, FOUT <66.67MHz 30pF load
Measured at VDD/2, FOUT <140 MHz 15pF load
Measured at VDD/2, FOUT <45 MHz 30pF load
Measured at VDD/2, FOUT <66.67MHz 30pF load
Measured at VDD/2, FOUT <140 MHz 15pF load
Measured at VDD/2, FOUT <45MHz 30pF load
Measured between 0.8V and 2.0V, 30pF load
Measured between 0.8V and 2.0V, 15pF load
Measured between 0.8V and 2.0V, 30pF load
Measured between 0.8V and 2.0V, 30pF load
Measured between 0.8V and 2.0V, 15pF load
Measured between 0.8V and 2.0V, 30pF load
60
45
45
40
45
50
55
%
Duty Cycle(1) (–1H)
60
55
Rise Time(1) (–1, –2, –4, –6)
tR
2.5
1.8
1.6
2.2
1.5
1.25
Rise Time(1) (–1H)
ns
Fall Time(1) (–1, –2, –4, –6)
tF
Fall Time(1) (–1H)
tSK(O)
Output to Output Skew(1) within All outputs equally loaded
same Bank
250
400
Output Bank A to Output Bank
B Skew(1)
ps
t0
Measured at VDD/2
Delay, CLKIN Rising Edge
900
500
to FB_IN Rising Edge(1)
tSK(D)
tSLEW
Device-to-Device Skew(1)
Output Slew Rate(1)
Measured at VDD/2 on FB_IN pins of devices
0
Measured between 0.8V & 2.0V on –1H device
using Test Crt #2
1
V/ns
ps
tJIT
Cycle-to-Cycle Jitter(1)
(–1, –1H, –4)
Measured at 66.67 MHz, loaded 30pF load
Measured at 140 MHz, loaded 15pF load
250
150
Cycle-to-Cycle Jitter(1)
(–2, –6)
PLL Lock Time(1)
Measured at 66.67 MHz, loaded 30pF load
400
1.0
tLOCK
Stable power supply, valid clocks
presented on CLKIN and FB_IN pins
ms
Notes:
1. See Switching Waveforms on page 7.
08-0298
PS8589K
11/06/08
5
PI6C2408
Zero-DelayClockBuffer
DCElectricalCharacteristicsforCommercialTemperatureDevices
Parameter
VIL
Description
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Test Conditions
Min. Max. Units
⎯
⎯
⎯
2.0
⎯
⎯
⎯
2.4
⎯
⎯
⎯
0.8
⎯
V
VIH
IIL
VIN = 0V
50
μA
IIH
VIN = VDD
100
0.4
⎯
VOL
VOH
IOL = 8mA (–1, –2, –3,–4, –6); IOL = 12mA (–1H)
IOH = –8mA (–1, –2, –3,–4, –6); IOH = –12mA (–1H)
V
IDD (PD mode) Power Down Supply Current SEL1 = 0 (-1,-2,-3,-4,-1H); SEL2 = 0 (-6)
12
μA
mA
IDD
IDD
Supply Current
Supply Current
Unloaded outputs, 66.67 MHz, Select inputs at VDD or GND
Unloaded outputs 100 MHz Select Inputs @ VDD or GND
39
54
ACElectrialCharacteristicsforCommercialTemperatureDevice
Parameters
Name
Test Conditions
Min. Typ. Max. Units
30pF load
15pF load
10
100
140
55
FO
Output Frequency
MHz
%
tDC
Duty Cycle(1) (–1H)
Measured at VDD/2, for high drive output
Measured at VDD/2, for normal drive output
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
45
40
50
50
Duty Cycle (–1, –2, –3, –4, –6)
Rise Time(1) @30pF
Rise Time(1) @15pF
Rise Time(1) @30pF (–1H)
Fall Time(1) @30pF
Fall Time(1) @15pF
60
tR
2.5
1.8
1.5
2.2
1.5
1.25
ns
tF
Fall Time(1) @30pF (–1H)
tSK(O)
Output-to-Output Skew(1) within same
bank
All outputs equally loaded, VDD/2
All outputs equally loaded, VDD/2
250
400
Output Bank A to Output Bank B
Skew
ps
t0
Input-to-Output Delay, CLKIN
Measured at VDD/2
900
500
Rising Edge to FB_IN Rising Edge(1)
tSK(D)
tSLEW
Device to Device Skew(1)
Output Slew Rate(1)
Measured at VDD/2 on FB_IN pins of devices
0
Measured between 0.8V and 2.0V on –1H
device using Test Circuit #2
1
V/ns
ps
tJIT
Cycle-to-Cycle Jitter (1)(–1,–1H,–4)
Measured at 66.67 MHz, loaded 30pF outputs
Measured at 140 MHz, loaded 15pF outputs
Measured at 66.7 MHz, loaded 30pF outputs
250
150
400
Cycle-to-Cycle Jitter(1) (–2,–3,–6)
PLL Lock Time(1)
tLOCK
Stable power supply, valid clocks
presented on CLKIN and FB_IN pins
1.0
ms
Notes:
1. See Switching Waveforms on page 7.
08-0298
PS8589K
11/06/08
6
PI6C2408
Zero-DelayClockBuffer
SwitchingWaveforms
t
t
LOW
Duty Cycle Timing
HIGH
/2
t
HIGH
t
t
DC =
V
/2
V
V
/2
t
+
LOW
DD
DD
DD
HIGH
All Outputs Rise/Fall Time
3.3V
2.0V
0.8V
2.0V
0.8V
OUTPUT
0V
t
t
F
R
Output-Output Skew
V
/2
DD
OUTPUT
OUTPUT
V
t
/2
DD
SK(O)
Device-Device Skew
V
/2
DD
OUTPUT Device 1
OUTPUT Device 2
V
/2
DD
t
SK(D)
Input-Output Propagation Delay
V
/2
DD
INPUT
FB_IN
V
/2
DD
t
0
Test Circuit 1
Test Circuit 2
0.1μF
0.1μF
0.1μF
V
V
DD
DD
OUTPUTS
1kW
CLK out
CLK out
10pF
OUTPUTS
C
LOAD
1kW
V
V
0.1μF
DD
DD
GND GND
GND GND
Test Circuit for all parameters except tSLEW
Test Circuit for tSLEW Output slew rate on –1H device
,
08-0298
PS8589K
11/06/08
7
PI6C2408
Zero-DelayClockBuffer
16-PinSOIC(W)Package
DOCUMENT CONTROL NO.
PD - 1004
16
REVISION: E
DATE: 03/09/05
3.78
3.99
.149
.157
1
0.25
0.50
.0099
.0196
[ꢃꢄꢅÛ
.386
.393
9.80
10.00
0.19
0.25
.0075
.0098
ꢀꢁꢂÛ
1.35
1.75
.053
.068
.0155
.0260
0.41
1.27
.016
.050
0.393
0.660
SEATING PLANE
.2284
REF
.2440
5.80
6.20
0.10
0.25
.0040
.0098
.050
BSC
.013
.020
1.27
0.330
0.508
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
Notes:
1) Controlling dimensions in millimeters.
2) Ref: JEDEC MS-012D/AC
DESCRIPTION: 16-Pin, 150-Mil Wide, SOIC
PACKAGE CODE: W
08-0298
PS8589K
11/06/08
8
PI6C2408
Zero-DelayClockBuffer
16-PinTSSOP(L)Package
DOCUMENT CONTROL NO.
PD - 1310
REVISION: E
16
DATE: 03/09/05
.169
.177
4.3
4.5
1
0.09
0.20
.193
.201
.004
.008
4.9
5.1
.047
max.
0.45 .018
0.75 .030
1.20
SEATING
PLANE
.252
BSC
6.4
.002
.006
0.05
0.15
.0256
BSC
.007
.012
0.65
0.19
0.30
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AB
DESCRIPTION: 16-Pin, 173-Mil Wide,TSSOP
PACKAGE CODE: L
08-0298
PS8589K
11/06/08
9
PI6C2408
Zero-DelayClockBuffer
OrderingInformation (CommercialTemperatureDevice)
OrderingCode
PI6C2408-1WE
PI6C2408-1HWE
PI6C2408-2WE
PI6C2408-3W
Package
Description
OperatingRange
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
W
W
W
W
W
W
W
W
W
L
Pb-free&Green,16-pin150-milSOIC
Pb-free&Green,16-pin150-milSOIC
Pb-free&Green,16-pin150-milSOIC
16-pin150-milSOIC
PI6C2408-3WE
PI6C2408-4W
Pb-free&Green,16-pin150-milSOIC
16-pin150-milSOIC
PI6C2408-4WE
PI6C2408-1WE
PI6C2408-1HWE
PI6C2408-1LE
PI6C2408-1HLE
PI6C2408-4LE
PI6C2408-1LE
PI6C2408-1HLE
PI6C2408-1HLEX
Pb-free&Green,16-pin150-milSOIC
Pb-free&Green16-pin150-milSOIC
Pb-free&Green16-pin150-milSOIC
Pb-free&Green,16-pin173-milTSSOP
Pb-free&Green,16-pin173-milTSSOP
Pb-free&Green,16-pin173-milTSSOP
Pb-free&Green16-pin173-milTSSOP
Pb-free&Green16-pin173-milTSSOP
Pb-free&Green,16-pin173-milTSSOP
L
L
L
L
L
08-0298
PS8589K
11/06/08
10
PI6C2408
Zero-DelayClockBuffer
OrderingInformation(Industrial TemperatureDevice)
OrderingCode
PI6C2408-1WIE
PI6C2408-1HWIE
PI6C2408-2WE
PI6C2408-2WIE
PI6C2408-3WIE
PI6C2408-4WIE
PI6C2408-1LI
Package
Description
OperatingRange
Industrial
W
W
W
W
W
W
L
Pb-free&Green,16-pin150-milSOIC
Pb-free&Green,16-pin150-milSOIC
Pb-free&Green,16-pin150-milSOIC
Pb-free&Green,16-pin150-milSOIC
Pb-free&Green,16-pin150-milSOIC
Pb-free&Green,16-pin150-milSOIC
16-pin173-milTSSOP
Industrial
Commercial
Industrial
Industrial
Industrial
Industrial
PI6C2408-1LIE
L
Pb-free&Green,16-pin173-milTSSOP
Industrial
Notes:
1.
2.
3.
Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
E = Pb-free and Green
Adding an X suffix = Tape/Reel
PericomSemiconductorCorporation • 1-800-435-2336 • www.pericom.com
11
08-0298
PS8589K
11/06/08
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